2023-05-15 08:51:29 +00:00
|
|
|
/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
|
|
|
|
|
│ vi: set noet ft=asm ts=8 sw=8 fenc=utf-8 :vi │
|
|
|
|
|
╚──────────────────────────────────────────────────────────────────────────────╝
|
|
|
|
|
│ │
|
|
|
|
|
│ Optimized Routines │
|
2024-02-25 22:57:28 +00:00
|
|
|
│ Copyright (c) 2018-2024, Arm Limited. │
|
2023-05-15 08:51:29 +00:00
|
|
|
│ │
|
|
|
|
|
│ Permission is hereby granted, free of charge, to any person obtaining │
|
|
|
|
|
│ a copy of this software and associated documentation files (the │
|
|
|
|
|
│ "Software"), to deal in the Software without restriction, including │
|
|
|
|
|
│ without limitation the rights to use, copy, modify, merge, publish, │
|
|
|
|
|
│ distribute, sublicense, and/or sell copies of the Software, and to │
|
|
|
|
|
│ permit persons to whom the Software is furnished to do so, subject to │
|
|
|
|
|
│ the following conditions: │
|
|
|
|
|
│ │
|
|
|
|
|
│ The above copyright notice and this permission notice shall be │
|
|
|
|
|
│ included in all copies or substantial portions of the Software. │
|
|
|
|
|
│ │
|
|
|
|
|
│ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, │
|
|
|
|
|
│ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF │
|
|
|
|
|
│ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. │
|
|
|
|
|
│ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY │
|
|
|
|
|
│ CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, │
|
|
|
|
|
│ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE │
|
|
|
|
|
│ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. │
|
|
|
|
|
│ │
|
|
|
|
|
╚─────────────────────────────────────────────────────────────────────────────*/
|
2023-06-06 06:35:31 +00:00
|
|
|
#include "libc/intrin/aarch64/asmdefs.internal.h"
|
Release Cosmopolitan v3.3
This change upgrades to GCC 12.3 and GNU binutils 2.42. The GNU linker
appears to have changed things so that only a single de-duplicated str
table is present in the binary, and it gets placed wherever the linker
wants, regardless of what the linker script says. To cope with that we
need to stop using .ident to embed licenses. As such, this change does
significant work to revamp how third party licenses are defined in the
codebase, using `.section .notice,"aR",@progbits`.
This new GCC 12.3 toolchain has support for GNU indirect functions. It
lets us support __target_clones__ for the first time. This is used for
optimizing the performance of libc string functions such as strlen and
friends so far on x86, by ensuring AVX systems favor a second codepath
that uses VEX encoding. It shaves some latency off certain operations.
It's a useful feature to have for scientific computing for the reasons
explained by the test/libcxx/openmp_test.cc example which compiles for
fifteen different microarchitectures. Thanks to the upgrades, it's now
also possible to use newer instruction sets, such as AVX512FP16, VNNI.
Cosmo now uses the %gs register on x86 by default for TLS. Doing it is
helpful for any program that links `cosmo_dlopen()`. Such programs had
to recompile their binaries at startup to change the TLS instructions.
That's not great, since it means every page in the executable needs to
be faulted. The work of rewriting TLS-related x86 opcodes, is moved to
fixupobj.com instead. This is great news for MacOS x86 users, since we
previously needed to morph the binary every time for that platform but
now that's no longer necessary. The only platforms where we need fixup
of TLS x86 opcodes at runtime are now Windows, OpenBSD, and NetBSD. On
Windows we morph TLS to point deeper into the TIB, based on a TlsAlloc
assignment, and on OpenBSD/NetBSD we morph %gs back into %fs since the
kernels do not allow us to specify a value for the %gs register.
OpenBSD users are now required to use APE Loader to run Cosmo binaries
and assimilation is no longer possible. OpenBSD kernel needs to change
to allow programs to specify a value for the %gs register, or it needs
to stop marking executable pages loaded by the kernel as mimmutable().
This release fixes __constructor__, .ctor, .init_array, and lastly the
.preinit_array so they behave the exact same way as glibc.
We no longer use hex constants to define math.h symbols like M_PI.
2024-02-20 19:12:09 +00:00
|
|
|
.yoink arm_optimized_routines_notice
|
2023-05-15 08:51:29 +00:00
|
|
|
|
|
|
|
|
#define __strcmp_aarch64 strcmp
|
|
|
|
|
|
|
|
|
|
/* Assumptions:
|
|
|
|
|
*
|
|
|
|
|
* ARMv8-a, AArch64.
|
|
|
|
|
* MTE compatible.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define REP8_01 0x0101010101010101
|
|
|
|
|
#define REP8_7f 0x7f7f7f7f7f7f7f7f
|
|
|
|
|
|
|
|
|
|
#define src1 x0
|
|
|
|
|
#define src2 x1
|
|
|
|
|
#define result x0
|
|
|
|
|
|
|
|
|
|
#define data1 x2
|
|
|
|
|
#define data1w w2
|
|
|
|
|
#define data2 x3
|
|
|
|
|
#define data2w w3
|
|
|
|
|
#define has_nul x4
|
|
|
|
|
#define diff x5
|
|
|
|
|
#define off1 x5
|
|
|
|
|
#define syndrome x6
|
|
|
|
|
#define tmp x6
|
|
|
|
|
#define data3 x7
|
|
|
|
|
#define zeroones x8
|
|
|
|
|
#define shift x9
|
|
|
|
|
#define off2 x10
|
|
|
|
|
|
|
|
|
|
/* On big-endian early bytes are at MSB and on little-endian LSB.
|
|
|
|
|
LS_FW means shifting towards early bytes. */
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
# define LS_FW lsl
|
|
|
|
|
#else
|
|
|
|
|
# define LS_FW lsr
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
|
|
|
|
|
(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
|
|
|
|
|
can be done in parallel across the entire word.
|
|
|
|
|
Since carry propagation makes 0x1 bytes before a NUL byte appear
|
|
|
|
|
NUL too in big-endian, byte-reverse the data before the NUL check. */
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
ENTRY (__strcmp_aarch64)
|
|
|
|
|
PTR_ARG (0)
|
|
|
|
|
PTR_ARG (1)
|
|
|
|
|
sub off2, src2, src1
|
|
|
|
|
mov zeroones, REP8_01
|
|
|
|
|
and tmp, src1, 7
|
|
|
|
|
tst off2, 7
|
|
|
|
|
b.ne L(misaligned8)
|
|
|
|
|
cbnz tmp, L(mutual_align)
|
|
|
|
|
|
|
|
|
|
.p2align 4
|
|
|
|
|
|
|
|
|
|
L(loop_aligned):
|
|
|
|
|
ldr data2, [src1, off2]
|
|
|
|
|
ldr data1, [src1], 8
|
|
|
|
|
L(start_realigned):
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev tmp, data1
|
|
|
|
|
sub has_nul, tmp, zeroones
|
|
|
|
|
orr tmp, tmp, REP8_7f
|
|
|
|
|
#else
|
|
|
|
|
sub has_nul, data1, zeroones
|
|
|
|
|
orr tmp, data1, REP8_7f
|
|
|
|
|
#endif
|
|
|
|
|
bics has_nul, has_nul, tmp /* Non-zero if NUL terminator. */
|
|
|
|
|
ccmp data1, data2, 0, eq
|
|
|
|
|
b.eq L(loop_aligned)
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev has_nul, has_nul
|
|
|
|
|
#endif
|
|
|
|
|
eor diff, data1, data2
|
|
|
|
|
orr syndrome, diff, has_nul
|
|
|
|
|
L(end):
|
|
|
|
|
#ifndef __AARCH64EB__
|
|
|
|
|
rev syndrome, syndrome
|
|
|
|
|
rev data1, data1
|
|
|
|
|
rev data2, data2
|
|
|
|
|
#endif
|
|
|
|
|
clz shift, syndrome
|
|
|
|
|
/* The most-significant-non-zero bit of the syndrome marks either the
|
|
|
|
|
first bit that is different, or the top bit of the first zero byte.
|
|
|
|
|
Shifting left now will bring the critical information into the
|
|
|
|
|
top bits. */
|
|
|
|
|
lsl data1, data1, shift
|
|
|
|
|
lsl data2, data2, shift
|
|
|
|
|
/* But we need to zero-extend (char is unsigned) the value and then
|
|
|
|
|
perform a signed 32-bit subtraction. */
|
|
|
|
|
lsr data1, data1, 56
|
|
|
|
|
sub result, data1, data2, lsr 56
|
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
.p2align 4
|
|
|
|
|
|
|
|
|
|
L(mutual_align):
|
|
|
|
|
/* Sources are mutually aligned, but are not currently at an
|
|
|
|
|
alignment boundary. Round down the addresses and then mask off
|
|
|
|
|
the bytes that precede the start point. */
|
|
|
|
|
bic src1, src1, 7
|
|
|
|
|
ldr data2, [src1, off2]
|
|
|
|
|
ldr data1, [src1], 8
|
|
|
|
|
neg shift, src2, lsl 3 /* Bits to alignment -64. */
|
|
|
|
|
mov tmp, -1
|
|
|
|
|
LS_FW tmp, tmp, shift
|
|
|
|
|
orr data1, data1, tmp
|
|
|
|
|
orr data2, data2, tmp
|
|
|
|
|
b L(start_realigned)
|
|
|
|
|
|
|
|
|
|
L(misaligned8):
|
|
|
|
|
/* Align SRC1 to 8 bytes and then compare 8 bytes at a time, always
|
|
|
|
|
checking to make sure that we don't access beyond the end of SRC2. */
|
|
|
|
|
cbz tmp, L(src1_aligned)
|
|
|
|
|
L(do_misaligned):
|
|
|
|
|
ldrb data1w, [src1], 1
|
|
|
|
|
ldrb data2w, [src2], 1
|
|
|
|
|
cmp data1w, 0
|
|
|
|
|
ccmp data1w, data2w, 0, ne /* NZCV = 0b0000. */
|
|
|
|
|
b.ne L(done)
|
|
|
|
|
tst src1, 7
|
|
|
|
|
b.ne L(do_misaligned)
|
|
|
|
|
|
|
|
|
|
L(src1_aligned):
|
|
|
|
|
neg shift, src2, lsl 3
|
|
|
|
|
bic src2, src2, 7
|
|
|
|
|
ldr data3, [src2], 8
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev data3, data3
|
|
|
|
|
#endif
|
|
|
|
|
lsr tmp, zeroones, shift
|
|
|
|
|
orr data3, data3, tmp
|
|
|
|
|
sub has_nul, data3, zeroones
|
|
|
|
|
orr tmp, data3, REP8_7f
|
|
|
|
|
bics has_nul, has_nul, tmp
|
|
|
|
|
b.ne L(tail)
|
|
|
|
|
|
|
|
|
|
sub off1, src2, src1
|
|
|
|
|
|
|
|
|
|
.p2align 4
|
|
|
|
|
|
|
|
|
|
L(loop_unaligned):
|
|
|
|
|
ldr data3, [src1, off1]
|
|
|
|
|
ldr data2, [src1, off2]
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev data3, data3
|
|
|
|
|
#endif
|
|
|
|
|
sub has_nul, data3, zeroones
|
|
|
|
|
orr tmp, data3, REP8_7f
|
|
|
|
|
ldr data1, [src1], 8
|
|
|
|
|
bics has_nul, has_nul, tmp
|
|
|
|
|
ccmp data1, data2, 0, eq
|
|
|
|
|
b.eq L(loop_unaligned)
|
|
|
|
|
|
|
|
|
|
lsl tmp, has_nul, shift
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev tmp, tmp
|
|
|
|
|
#endif
|
|
|
|
|
eor diff, data1, data2
|
|
|
|
|
orr syndrome, diff, tmp
|
|
|
|
|
cbnz syndrome, L(end)
|
|
|
|
|
L(tail):
|
|
|
|
|
ldr data1, [src1]
|
|
|
|
|
neg shift, shift
|
|
|
|
|
lsr data2, data3, shift
|
|
|
|
|
lsr has_nul, has_nul, shift
|
|
|
|
|
#ifdef __AARCH64EB__
|
|
|
|
|
rev data2, data2
|
|
|
|
|
rev has_nul, has_nul
|
|
|
|
|
#endif
|
|
|
|
|
eor diff, data1, data2
|
|
|
|
|
orr syndrome, diff, has_nul
|
|
|
|
|
b L(end)
|
|
|
|
|
|
|
|
|
|
L(done):
|
|
|
|
|
sub result, data1, data2
|
|
|
|
|
ret
|
|
|
|
|
|
|
|
|
|
END (__strcmp_aarch64)
|