2023-04-27 09:56:41 +00:00
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#ifndef _IMMINTRIN_H_INCLUDED
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#error "Never use <avx512vbmiintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef _AVX512VBMIINTRIN_H_INCLUDED
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#define _AVX512VBMIINTRIN_H_INCLUDED
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#ifndef __AVX512VBMI__
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#pragma GCC push_options
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#pragma GCC target("avx512vbmi")
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#define __DISABLE_AVX512VBMI__
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#endif /* __AVX512VBMI__ */
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_mask_multishift_epi64_epi8(__m512i __W, __mmask64 __M,
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__m512i __X, __m512i __Y) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpmultishiftqb512_mask(
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(__v64qi)__X, (__v64qi)__Y, (__v64qi)__W, (__mmask64)__M);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_maskz_multishift_epi64_epi8(__mmask64 __M, __m512i __X,
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__m512i __Y) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpmultishiftqb512_mask(
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(__v64qi)__X, (__v64qi)__Y, (__v64qi)_mm512_setzero_si512(),
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(__mmask64)__M);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_multishift_epi64_epi8(__m512i __X, __m512i __Y) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpmultishiftqb512_mask(
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(__v64qi)__X, (__v64qi)__Y, (__v64qi)_mm512_undefined_epi32(),
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(__mmask64)-1);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_permutexvar_epi8(__m512i __A, __m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_permvarqi512_mask(
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(__v64qi)__B, (__v64qi)__A, (__v64qi)_mm512_undefined_epi32(),
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(__mmask64)-1);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_maskz_permutexvar_epi8(__mmask64 __M, __m512i __A,
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__m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_permvarqi512_mask(
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(__v64qi)__B, (__v64qi)__A, (__v64qi)_mm512_setzero_si512(),
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(__mmask64)__M);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_mask_permutexvar_epi8(__m512i __W, __mmask64 __M,
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__m512i __A, __m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_permvarqi512_mask(
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(__v64qi)__B, (__v64qi)__A, (__v64qi)__W, (__mmask64)__M);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_permutex2var_epi8(__m512i __A, __m512i __I,
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__m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpermt2varqi512_mask(
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(__v64qi)__I
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/* idx */,
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(__v64qi)__A, (__v64qi)__B, (__mmask64)-1);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_mask_permutex2var_epi8(__m512i __A, __mmask64 __U,
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__m512i __I, __m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpermt2varqi512_mask(
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(__v64qi)__I
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/* idx */,
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(__v64qi)__A, (__v64qi)__B, (__mmask64)__U);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_mask2_permutex2var_epi8(__m512i __A, __m512i __I,
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__mmask64 __U, __m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpermi2varqi512_mask((__v64qi)__A,
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(__v64qi)__I
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/* idx */,
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(__v64qi)__B,
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(__mmask64)__U);
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}
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2023-05-16 06:11:47 +00:00
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__funline __m512i _mm512_maskz_permutex2var_epi8(__mmask64 __U, __m512i __A,
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__m512i __I, __m512i __B) {
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2023-04-27 09:56:41 +00:00
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return (__m512i)__builtin_ia32_vpermt2varqi512_maskz(
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(__v64qi)__I
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/* idx */,
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(__v64qi)__A, (__v64qi)__B, (__mmask64)__U);
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}
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#ifdef __DISABLE_AVX512VBMI__
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#undef __DISABLE_AVX512VBMI__
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#pragma GCC pop_options
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#endif /* __DISABLE_AVX512VBMI__ */
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#endif /* _AVX512VBMIINTRIN_H_INCLUDED */
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