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Introduce native support for MacOS ARM64

Browse source 
There's a new program named ape/ape-m1.c which will be used to build an
embeddable binary that can load ape and elf executables. The support is
mostly working so far, but still chasing down ABI issues.
This commit is contained in:
Justine Tunney 2023-05-18 19:05:08 -07:00
parent b852650c08
commit 1422e96b4e
No known key found for this signature in database
GPG key ID: BE714B4575D6E328
757 changed files with 2988 additions and 1321 deletions
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4
libc/log/countbranch.h
View file

@ -12,7 +12,7 @@ COSMOPOLITAN_C_START_
bool Cond; \
struct countbranch *Info; \
asm(".section .rodata.str1.1,\"aMS\",@progbits,1\n\t" \
".align\t1\n" \
".balign\t1\n" \
"31338:\t" \
".asciz\t" xs "\n" \
"31339:\t" \
@ -24,7 +24,7 @@ COSMOPOLITAN_C_START_
"nopl\tcountbranch_data(%%rip)\n\t" \
".previous\n\t" \
".section .sort.data.countbranch.2,\"a\",@progbits\n\t" \
".align\t8\n31337:\t" \
".balign\t8\n31337:\t" \
".quad\t0\n\t" \
".quad\t0\n\t" \
".quad\t31338b\n\t" \

4
libc/log/countexpr.h
View file

@ -40,7 +40,7 @@ COSMOPOLITAN_C_START_
t2_ = stop(); \
TiCkS = t2_ >= t1_ ? t2_ - t1_ : ~t1_ + t2_ + 1; \
asm(".section .rodata.str1.1,\"aMS\",@progbits,1\n\t" \
".align\t1\n" \
".balign\t1\n" \
"31340:\t.asciz\t" file "\n\t" \
"31338:\t.asciz\t" code "\n" \
"31332:\t.asciz\t" macro "\n" \
@ -49,7 +49,7 @@ COSMOPOLITAN_C_START_
"nopl\tcountexpr_data(%%rip)\n\t" \
".previous\n\t" \
".section .sort.data.countexpr.2,\"a\",@progbits\n\t" \
".align\t8\n31337:\t" \
".balign\t8\n31337:\t" \
".quad\t" #line "\n\t" \
".quad\t31340b\n\t" \
".quad\t31338b\n\t" \

49
libc/log/libfatal.internal.h
View file

@ -19,12 +19,13 @@ forceinline long __sysv_exit(long rc) {
: "memory", "cc");
#elif defined(__aarch64__)
register long r0 asm("x0") = rc;
register long r8 asm("x8") = __NR_exit_group;
register long r8 asm("x8") = __NR_exit_group & 0x7ff;
register long r16 asm("x16") = __NR_exit_group & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0" : "=r"(res_x0) : "r"(r0), "r"(r8) : "memory");
asm volatile("svc\t0" : "=r"(res_x0) : "r"(r0), "r"(r8), "r"(r16) : "memory");
ax = res_x0;
#else
ax = syscall(__NR_exit_group, rc);
ax = syscall(__NR_exit_group & 0x7ff, rc);
#endif
return ax;
}
@ -38,16 +39,17 @@ forceinline int __sysv_close(long fd) {
: "rdx", "memory", "cc");
#elif defined(__aarch64__)
register long r0 asm("x0") = fd;
register long r8 asm("x8") = __NR_close;
register long r8 asm("x8") = __NR_close & 0x7ff;
register long r16 asm("x16") = __NR_close & 0x7ff;
register long res_x0 asm("x0");
asm volatile("mov\tx8,%1\n\t"
"svc\t0"
: "=r"(res_x0)
: "r"(r0), "r"(r8)
: "r"(r0), "r"(r8), "r"(r16)
: "memory");
ax = res_x0;
#else
ax = syscall(__NR_close, fd);
ax = syscall(__NR_close & 0x7ff, fd);
#endif
return ax;
}
@ -64,15 +66,16 @@ forceinline int __sysv_open(const char *path, long flags, long mode) {
register long r1 asm("x1") = (long)path;
register long r2 asm("x2") = (long)flags;
register long r3 asm("x3") = (long)mode;
register long r8 asm("x8") = (long)__NR_open;
register long r8 asm("x8") = (long)__NR_open & 0x7ff;
register long r16 asm("x16") = (long)__NR_open & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0"
: "=r"(res_x0)
: "r"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r8)
: "r"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r8), "r"(r16)
: "memory");
ax = res_x0;
#else
ax = syscall(__NR_open, path, flags, mode);
ax = syscall(__NR_open & 0x7ff, path, flags, mode);
#endif
return ax;
}
@ -88,15 +91,16 @@ forceinline long __sysv_read(long fd, void *data, unsigned long size) {
register long r0 asm("x0") = (long)fd;
register long r1 asm("x1") = (long)data;
register long r2 asm("x2") = (long)size;
register long r8 asm("x8") = (long)__NR_read;
register long r8 asm("x8") = (long)__NR_read & 0x7ff;
register long r16 asm("x16") = (long)__NR_read & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0"
: "=r"(res_x0)
: "r"(r0), "r"(r1), "r"(r2), "r"(r8)
: "r"(r0), "r"(r1), "r"(r2), "r"(r8), "r"(r16)
: "memory");
ax = res_x0;
#else
ax = syscall(__NR_read, fd, data, size);
ax = syscall(__NR_read & 0x7ff, fd, data, size);
#endif
return ax;
}
@ -112,15 +116,16 @@ forceinline long __sysv_write(long fd, const void *data, unsigned long size) {
register long r0 asm("x0") = (long)fd;
register long r1 asm("x1") = (long)data;
register long r2 asm("x2") = (long)size;
register long r8 asm("x8") = (long)__NR_write;
register long r8 asm("x8") = (long)__NR_write & 0x7ff;
register long r16 asm("x16") = (long)__NR_write & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0"
: "=r"(res_x0)
: "i"(64), "r"(r0), "r"(r1), "r"(r2), "r"(r8)
: "i"(64), "r"(r0), "r"(r1), "r"(r2), "r"(r8), "r"(r16)
: "memory");
ax = res_x0;
#else
ax = syscall(__NR_write, fd, data, size);
ax = syscall(__NR_write & 0x7ff, fd, data, size);
#endif
return ax;
}
@ -136,15 +141,16 @@ forceinline long __sysv_mprotect(void *addr, size_t size, long prot) {
register long r0 asm("x0") = (long)addr;
register long r1 asm("x1") = (long)size;
register long r2 asm("x2") = (long)prot;
register long r8 asm("x8") = (long)__NR_mprotect;
register long r8 asm("x8") = (long)__NR_mprotect & 0x7ff;
register long r16 asm("x16") = (long)__NR_mprotect & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0"
: "=r"(res_x0)
: "r"(r0), "r"(r1), "r"(r2), "r"(r8)
: "r"(r0), "r"(r1), "r"(r2), "r"(r8), "r"(r16)
: "memory");
ax = res_x0;
#else
ax = syscall(__NR_mprotect, addr, size, prot);
ax = syscall(__NR_mprotect & 0x7ff, addr, size, prot);
#endif
return ax;
}
@ -157,12 +163,13 @@ forceinline int __sysv_getpid(void) {
: "0"(__NR_getpid)
: "rdx", "memory", "cc");
#elif defined(__aarch64__)
register long r8 asm("x8") = (long)__NR_getpid;
register long r8 asm("x8") = (long)__NR_getpid & 0x7ff;
register long r16 asm("x16") = (long)__NR_getpid & 0x7ff;
register long res_x0 asm("x0");
asm volatile("svc\t0" : "=r"(res_x0) : "r"(r8) : "memory");
asm volatile("svc\t0" : "=r"(res_x0) : "r"(r8), "r"(r16) : "memory");
ax = res_x0;
#else
ax = syscall(__NR_getpid);
ax = syscall(__NR_getpid & 0x7ff);
#endif
return ax;
}

2
libc/log/oncrash_amd64.c
View file

@ -317,7 +317,7 @@ relegated void __oncrash_amd64(int sig, struct siginfo *si, void *arg) {
// RestoreDefaultCrashSignalHandlers();
gdbpid = AttachDebugger(
((sig == SIGTRAP || sig == SIGQUIT) &&
(rip >= (intptr_t)&_base && rip < (intptr_t)&_etext))
(rip >= (intptr_t)&__executable_start && rip < (intptr_t)&_etext))
? rip
: 0);
}

5
libc/log/oncrash_arm64.c
View file

@ -58,7 +58,7 @@ struct Buffer {
};
static bool IsCode(uintptr_t p) {
return _base <= (uint8_t *)p && (uint8_t *)p < _etext;
return __executable_start <= (uint8_t *)p && (uint8_t *)p < _etext;
}
static void Append(struct Buffer *b, const char *fmt, ...) {
@ -97,8 +97,9 @@ static const char *ColorRegister(int r) {
case 25: // saved
case 26: // saved
case 27: // saved
case 28: // saved
return MAGENTA;
case 18: // platform register
case 28: // our tls register
case 29: // frame pointer
case 30: // return pointer
case 31: // stack pointer