mirror of
https://github.com/jart/cosmopolitan.git
synced 2025-06-27 14:58:30 +00:00
Upgrade to Cosmopolitan GCC 11.2.0 for x86_64
This commit is contained in:
Justine Tunney
parent
682b74ed88
commit
39f20dbb13
137 changed files with 48523 additions and 34001 deletions
317
third_party/intel/cpuid.internal.h
vendored
317
third_party/intel/cpuid.internal.h
vendored
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@ -1,237 +1,220 @@
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#ifndef COSMOPOLITAN_THIRD_PARTY_INTEL_CPUID_INTERNAL_H_
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#define COSMOPOLITAN_THIRD_PARTY_INTEL_CPUID_INTERNAL_H_
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#ifdef __x86_64__
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#if !(__ASSEMBLER__ + __LINKER__ + 0)
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#define bit_SSE3 (1 << 0)
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#define bit_PCLMUL (1 << 1)
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#define bit_LZCNT (1 << 5)
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#define bit_SSSE3 (1 << 9)
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#define bit_FMA (1 << 12)
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/* clang-format off */
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#if defined(__x86_64__) && !(__ASSEMBLER__ + __LINKER__ + 0)
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#ifndef _CPUID_H_INCLUDED
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#define _CPUID_H_INCLUDED
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#define bit_AVXVNNI (1 << 4)
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#define bit_AVX512BF16 (1 << 5)
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#define bit_HRESET (1 << 22)
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#define bit_SSE3 (1 << 0)
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#define bit_PCLMUL (1 << 1)
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#define bit_LZCNT (1 << 5)
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#define bit_SSSE3 (1 << 9)
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#define bit_FMA (1 << 12)
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#define bit_CMPXCHG16B (1 << 13)
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#define bit_SSE4_1 (1 << 19)
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#define bit_SSE4_2 (1 << 20)
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#define bit_MOVBE (1 << 22)
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#define bit_POPCNT (1 << 23)
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#define bit_AES (1 << 25)
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#define bit_XSAVE (1 << 26)
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#define bit_OSXSAVE (1 << 27)
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#define bit_AVX (1 << 28)
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#define bit_F16C (1 << 29)
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#define bit_RDRND (1 << 30)
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#define bit_SSE4_1 (1 << 19)
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#define bit_SSE4_2 (1 << 20)
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#define bit_MOVBE (1 << 22)
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#define bit_POPCNT (1 << 23)
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#define bit_AES (1 << 25)
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#define bit_XSAVE (1 << 26)
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#define bit_OSXSAVE (1 << 27)
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#define bit_AVX (1 << 28)
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#define bit_F16C (1 << 29)
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#define bit_RDRND (1 << 30)
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#define bit_CMPXCHG8B (1 << 8)
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#define bit_CMOV (1 << 15)
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#define bit_MMX (1 << 23)
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#define bit_FXSAVE (1 << 24)
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#define bit_SSE (1 << 25)
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#define bit_SSE2 (1 << 26)
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#define bit_CMOV (1 << 15)
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#define bit_MMX (1 << 23)
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#define bit_FXSAVE (1 << 24)
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#define bit_SSE (1 << 25)
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#define bit_SSE2 (1 << 26)
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#define bit_LAHF_LM (1 << 0)
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#define bit_ABM (1 << 5)
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#define bit_SSE4a (1 << 6)
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#define bit_PRFCHW (1 << 8)
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#define bit_XOP (1 << 11)
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#define bit_LWP (1 << 15)
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#define bit_FMA4 (1 << 16)
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#define bit_TBM (1 << 21)
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#define bit_MWAITX (1 << 29)
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#define bit_ABM (1 << 5)
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#define bit_SSE4a (1 << 6)
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#define bit_PRFCHW (1 << 8)
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#define bit_XOP (1 << 11)
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#define bit_LWP (1 << 15)
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#define bit_FMA4 (1 << 16)
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#define bit_TBM (1 << 21)
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#define bit_MWAITX (1 << 29)
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#define bit_MMXEXT (1 << 22)
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#define bit_LM (1 << 29)
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#define bit_LM (1 << 29)
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#define bit_3DNOWP (1 << 30)
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#define bit_3DNOW (1u << 31)
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#define bit_CLZERO (1 << 0)
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#define bit_3DNOW (1u << 31)
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#define bit_CLZERO (1 << 0)
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#define bit_WBNOINVD (1 << 9)
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#define bit_FSGSBASE (1 << 0)
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#define bit_SGX (1 << 2)
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#define bit_BMI (1 << 3)
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#define bit_HLE (1 << 4)
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#define bit_AVX2 (1 << 5)
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#define bit_BMI2 (1 << 8)
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#define bit_RTM (1 << 11)
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#define bit_MPX (1 << 14)
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#define bit_AVX512F (1 << 16)
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#define bit_AVX512DQ (1 << 17)
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#define bit_RDSEED (1 << 18)
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#define bit_ADX (1 << 19)
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#define bit_FSGSBASE (1 << 0)
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#define bit_SGX (1 << 2)
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#define bit_BMI (1 << 3)
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#define bit_HLE (1 << 4)
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#define bit_AVX2 (1 << 5)
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#define bit_BMI2 (1 << 8)
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#define bit_RTM (1 << 11)
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#define bit_MPX (1 << 14)
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#define bit_AVX512F (1 << 16)
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#define bit_AVX512DQ (1 << 17)
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#define bit_RDSEED (1 << 18)
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#define bit_ADX (1 << 19)
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#define bit_AVX512IFMA (1 << 21)
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#define bit_CLFLUSHOPT (1 << 23)
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#define bit_CLWB (1 << 24)
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#define bit_AVX512PF (1 << 26)
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#define bit_AVX512ER (1 << 27)
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#define bit_AVX512CD (1 << 28)
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#define bit_SHA (1 << 29)
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#define bit_AVX512BW (1 << 30)
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#define bit_AVX512VL (1u << 31)
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#define bit_PREFETCHWT1 (1 << 0)
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#define bit_AVX512VBMI (1 << 1)
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#define bit_PKU (1 << 3)
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#define bit_OSPKE (1 << 4)
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#define bit_WAITPKG (1 << 5)
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#define bit_AVX512VBMI2 (1 << 6)
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#define bit_SHSTK (1 << 7)
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#define bit_GFNI (1 << 8)
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#define bit_VAES (1 << 9)
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#define bit_AVX512VNNI (1 << 11)
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#define bit_VPCLMULQDQ (1 << 10)
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#define bit_AVX512BITALG (1 << 12)
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#define bit_CLWB (1 << 24)
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#define bit_AVX512PF (1 << 26)
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#define bit_AVX512ER (1 << 27)
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#define bit_AVX512CD (1 << 28)
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#define bit_SHA (1 << 29)
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#define bit_AVX512BW (1 << 30)
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#define bit_AVX512VL (1u << 31)
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#define bit_PREFETCHWT1 (1 << 0)
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#define bit_AVX512VBMI (1 << 1)
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#define bit_PKU (1 << 3)
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#define bit_OSPKE (1 << 4)
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#define bit_WAITPKG (1 << 5)
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#define bit_AVX512VBMI2 (1 << 6)
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#define bit_SHSTK (1 << 7)
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#define bit_GFNI (1 << 8)
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#define bit_VAES (1 << 9)
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#define bit_AVX512VNNI (1 << 11)
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#define bit_VPCLMULQDQ (1 << 10)
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#define bit_AVX512BITALG (1 << 12)
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#define bit_AVX512VPOPCNTDQ (1 << 14)
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#define bit_RDPID (1 << 22)
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#define bit_MOVDIRI (1 << 27)
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#define bit_MOVDIR64B (1 << 28)
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#define bit_CLDEMOTE (1 << 25)
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#define bit_RDPID (1 << 22)
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#define bit_MOVDIRI (1 << 27)
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#define bit_MOVDIR64B (1 << 28)
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#define bit_ENQCMD (1 << 29)
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#define bit_CLDEMOTE (1 << 25)
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#define bit_KL (1 << 23)
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#define bit_AVX5124VNNIW (1 << 2)
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#define bit_AVX5124FMAPS (1 << 3)
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#define bit_IBT (1 << 20)
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#define bit_PCONFIG (1 << 18)
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#define bit_AVX512VP2INTERSECT (1 << 8)
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#define bit_IBT (1 << 20)
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#define bit_UINTR (1 << 5)
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#define bit_PCONFIG (1 << 18)
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#define bit_SERIALIZE (1 << 14)
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#define bit_TSXLDTRK (1 << 16)
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#define bit_AMX_BF16 (1 << 22)
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#define bit_AMX_TILE (1 << 24)
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#define bit_AMX_INT8 (1 << 25)
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#define bit_BNDREGS (1 << 3)
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#define bit_BNDCSR (1 << 4)
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#define bit_BNDCSR (1 << 4)
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#define bit_XSAVEOPT (1 << 0)
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#define bit_XSAVEC (1 << 1)
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#define bit_XSAVES (1 << 3)
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#define bit_XSAVEC (1 << 1)
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#define bit_XSAVES (1 << 3)
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#define bit_PTWRITE (1 << 4)
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#define bit_AESKLE ( 1<<0 )
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#define bit_WIDEKL ( 1<<2 )
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#define signature_AMD_ebx 0x68747541
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#define signature_AMD_ecx 0x444d4163
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#define signature_AMD_edx 0x69746e65
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#define signature_CENTAUR_ebx 0x746e6543
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#define signature_CENTAUR_ecx 0x736c7561
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#define signature_CENTAUR_edx 0x48727561
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#define signature_CYRIX_ebx 0x69727943
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#define signature_CYRIX_ecx 0x64616574
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#define signature_CYRIX_edx 0x736e4978
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#define signature_INTEL_ebx 0x756e6547
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#define signature_INTEL_ecx 0x6c65746e
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#define signature_INTEL_edx 0x49656e69
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#define signature_TM1_ebx 0x6e617254
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#define signature_TM1_ecx 0x55504361
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#define signature_TM1_edx 0x74656d73
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#define signature_TM2_ebx 0x756e6547
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#define signature_TM2_ecx 0x3638784d
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#define signature_TM2_edx 0x54656e69
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#define signature_NSC_ebx 0x646f6547
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#define signature_NSC_ecx 0x43534e20
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#define signature_NSC_edx 0x79622065
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#define signature_NEXGEN_ebx 0x4778654e
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#define signature_NEXGEN_ecx 0x6e657669
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#define signature_NEXGEN_edx 0x72446e65
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#define signature_RISE_ebx 0x65736952
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#define signature_RISE_ecx 0x65736952
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#define signature_RISE_edx 0x65736952
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#define signature_SIS_ebx 0x20536953
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#define signature_SIS_ecx 0x20536953
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#define signature_SIS_edx 0x20536953
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#define signature_UMC_ebx 0x20434d55
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#define signature_UMC_ecx 0x20434d55
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#define signature_UMC_edx 0x20434d55
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#define signature_VIA_ebx 0x20414956
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#define signature_VIA_ecx 0x20414956
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#define signature_VIA_edx 0x20414956
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#define signature_VORTEX_ebx 0x74726f56
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#define signature_VORTEX_ecx 0x436f5320
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#define signature_VORTEX_edx 0x36387865
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#ifndef __x86_64__
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#define __cpuid(level, a, b, c, d) \
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do { \
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if (__builtin_constant_p(level) && (level) != 1) \
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__asm__("cpuid\n\t" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(level)); \
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else \
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__asm__("cpuid\n\t" \
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: "=a"(a), "=b"(b), "=c"(c), "=d"(d) \
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: "0"(level), "1"(0), "2"(0)); \
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} while (0)
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#define __cpuid(level, a, b, c, d) do { if (__builtin_constant_p (level) && (level) != 1) __asm__ __volatile__ ("cpuid\n\t" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "0" (level)); else __asm__ __volatile__ ("cpuid\n\t" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "0" (level), "1" (0), "2" (0)); } while (0)
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#else
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#define __cpuid(level, a, b, c, d) \
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__asm__("cpuid\n\t" : "=a"(a), "=b"(b), "=c"(c), "=d"(d) : "0"(level))
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#define __cpuid(level, a, b, c, d) __asm__ __volatile__ ("cpuid\n\t" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "0" (level))
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#endif
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#define __cpuid_count(level, count, a, b, c, d) \
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__asm__("cpuid\n\t" \
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: "=a"(a), "=b"(b), "=c"(c), "=d"(d) \
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: "0"(level), "2"(count))
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static __inline unsigned int __get_cpuid_max(unsigned int __ext,
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unsigned int *__sig) {
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#define __cpuid_count(level, count, a, b, c, d) __asm__ __volatile__ ("cpuid\n\t" : "=a" (a), "=b" (b), "=c" (c), "=d" (d) : "0" (level), "2" (count))
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static __inline unsigned int
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__get_cpuid_max (unsigned int __ext, unsigned int *__sig)
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{
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unsigned int __eax, __ebx, __ecx, __edx;
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#ifndef __x86_64__
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#if __GNUC__ >= 3
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__asm__("pushf{l|d}\n\t"
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"pushf{l|d}\n\t"
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"pop{l}\t%0\n\t"
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"mov{l}\t{%0, %1|%1, %0}\n\t"
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"xor{l}\t{%2, %0|%0, %2}\n\t"
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"push{l}\t%0\n\t"
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"popf{l|d}\n\t"
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"pushf{l|d}\n\t"
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"pop{l}\t%0\n\t"
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"popf{l|d}\n\t"
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: "=&r"(__eax), "=&r"(__ebx)
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: "i"(0x00200000));
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__asm__ ("pushf{l|d}\n\t"
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"pushf{l|d}\n\t"
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"pop{l}\t%0\n\t"
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"mov{l}\t{%0, %1|%1, %0}\n\t"
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"xor{l}\t{%2, %0|%0, %2}\n\t"
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"push{l}\t%0\n\t"
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"popf{l|d}\n\t"
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"pushf{l|d}\n\t"
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"pop{l}\t%0\n\t"
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"popf{l|d}\n\t"
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: "=&r" (__eax), "=&r" (__ebx)
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: "i" (0x00200000));
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#else
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__asm__("pushfl\n\t"
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"pushfl\n\t"
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"popl\t%0\n\t"
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"movl\t%0, %1\n\t"
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"xorl\t%2, %0\n\t"
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"pushl\t%0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl\t%0\n\t"
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"popfl\n\t"
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: "=&r"(__eax), "=&r"(__ebx)
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: "i"(0x00200000));
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__asm__ ("pushfl\n\t"
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"pushfl\n\t"
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"popl\t%0\n\t"
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"movl\t%0, %1\n\t"
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"xorl\t%2, %0\n\t"
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"pushl\t%0\n\t"
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"popfl\n\t"
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"pushfl\n\t"
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"popl\t%0\n\t"
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"popfl\n\t"
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: "=&r" (__eax), "=&r" (__ebx)
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: "i" (0x00200000));
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#endif
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if (!((__eax ^ __ebx) & 0x00200000)) return 0;
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if (!((__eax ^ __ebx) & 0x00200000))
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return 0;
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#endif
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__cpuid(__ext, __eax, __ebx, __ecx, __edx);
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if (__sig) *__sig = __ebx;
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__cpuid (__ext, __eax, __ebx, __ecx, __edx);
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if (__sig)
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*__sig = __ebx;
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return __eax;
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}
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static __inline int __get_cpuid(unsigned int __leaf, unsigned int *__eax,
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unsigned int *__ebx, unsigned int *__ecx,
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unsigned int *__edx) {
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static __inline int
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__get_cpuid (unsigned int __leaf,
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unsigned int *__eax, unsigned int *__ebx,
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unsigned int *__ecx, unsigned int *__edx)
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{
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unsigned int __ext = __leaf & 0x80000000;
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unsigned int __maxlevel = __get_cpuid_max(__ext, 0);
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if (__maxlevel == 0 || __maxlevel < __leaf) return 0;
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__cpuid(__leaf, *__eax, *__ebx, *__ecx, *__edx);
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unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
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if (__maxlevel == 0 || __maxlevel < __leaf)
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return 0;
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__cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx);
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return 1;
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}
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static __inline int __get_cpuid_count(unsigned int __leaf,
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unsigned int __subleaf,
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unsigned int *__eax, unsigned int *__ebx,
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unsigned int *__ecx,
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unsigned int *__edx) {
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static __inline int
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__get_cpuid_count (unsigned int __leaf, unsigned int __subleaf,
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unsigned int *__eax, unsigned int *__ebx,
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unsigned int *__ecx, unsigned int *__edx)
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{
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unsigned int __ext = __leaf & 0x80000000;
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unsigned int __maxlevel = __get_cpuid_max(__ext, 0);
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if (__maxlevel == 0 || __maxlevel < __leaf) return 0;
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__cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
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unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
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if (__maxlevel == 0 || __maxlevel < __leaf)
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return 0;
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__cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
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return 1;
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}
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||||
|
||||
#endif /* !(__ASSEMBLER__ + __LINKER__ + 0) */
|
||||
#endif /* __x86_64__ */
|
||||
#endif /* COSMOPOLITAN_THIRD_PARTY_INTEL_CPUID_INTERNAL_H_ */
|
||||
static __inline void
|
||||
__cpuidex (int __cpuid_info[4], int __leaf, int __subleaf)
|
||||
{
|
||||
__cpuid_count (__leaf, __subleaf, __cpuid_info[0], __cpuid_info[1],
|
||||
__cpuid_info[2], __cpuid_info[3]);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue