mirror of
https://github.com/jart/cosmopolitan.git
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Release Cosmopolitan v3.6.0
This release is an atomic upgrade to GCC 14.1.0 with C23 and C++23
This commit is contained in:
Justine Tunney
parent
62ace3623a
commit
5660ec4741
1585 changed files with 117353 additions and 271644 deletions
89
third_party/intel/avx512vbmi2vlintrin.internal.h
vendored
89
third_party/intel/avx512vbmi2vlintrin.internal.h
vendored
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@ -4,9 +4,9 @@
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#endif
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#ifndef _AVX512VBMI2VLINTRIN_H_INCLUDED
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#define _AVX512VBMI2VLINTRIN_H_INCLUDED
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#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__)
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#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || defined (__EVEX512__)
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#pragma GCC push_options
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#pragma GCC target("avx512vbmi2,avx512vl")
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#pragma GCC target("avx512vbmi2,avx512vl,no-evex512")
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#define __DISABLE_AVX512VBMI2VL__
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#endif
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extern __inline __m128i
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@ -21,7 +21,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_compress_epi8 (__mmask16 __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __B,
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(__v16qi) _mm_setzero_si128 (), (__mmask16) __A);
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(__v16qi) _mm_avx512_setzero_si128 (), (__mmask16) __A);
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}
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -42,7 +42,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_compress_epi16 (__mmask8 __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __B,
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(__v8hi) _mm_setzero_si128 (), (__mmask8) __A);
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(__v8hi) _mm_avx512_setzero_si128 (), (__mmask8) __A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -56,7 +56,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_compress_epi16 (__mmask16 __A, __m256i __B)
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{
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return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __B,
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(__v16hi) _mm256_setzero_si256 (), (__mmask16) __A);
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(__v16hi) _mm256_avx512_setzero_si256 (), (__mmask16) __A);
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}
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extern __inline void
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -85,7 +85,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_expand_epi8 (__mmask16 __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_expandqi128_maskz ((__v16qi) __B,
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(__v16qi) _mm_setzero_si128 (), (__mmask16) __A);
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(__v16qi) _mm_avx512_setzero_si128 (), (__mmask16) __A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -99,7 +99,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_expandloadu_epi8 (__mmask16 __A, const void * __B)
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{
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return (__m128i) __builtin_ia32_expandloadqi128_maskz ((const __v16qi *) __B,
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(__v16qi) _mm_setzero_si128 (), (__mmask16) __A);
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(__v16qi) _mm_avx512_setzero_si128 (), (__mmask16) __A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -114,7 +114,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_expand_epi16 (__mmask8 __A, __m128i __B)
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{
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return (__m128i) __builtin_ia32_expandhi128_maskz ((__v8hi) __B,
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(__v8hi) _mm_setzero_si128 (), (__mmask8) __A);
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(__v8hi) _mm_avx512_setzero_si128 (), (__mmask8) __A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -128,7 +128,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_expandloadu_epi16 (__mmask8 __A, const void * __B)
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{
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return (__m128i) __builtin_ia32_expandloadhi128_maskz ((const __v8hi *) __B,
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(__v8hi) _mm_setzero_si128 (), (__mmask8) __A);
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(__v8hi) _mm_avx512_setzero_si128 (), (__mmask8) __A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -143,7 +143,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_expand_epi16 (__mmask16 __A, __m256i __B)
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{
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return (__m256i) __builtin_ia32_expandhi256_maskz ((__v16hi) __B,
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(__v16hi) _mm256_setzero_si256 (), (__mmask16) __A);
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(__v16hi) _mm256_avx512_setzero_si256 (), (__mmask16) __A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -157,7 +157,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_expandloadu_epi16 (__mmask16 __A, const void * __B)
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{
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return (__m256i) __builtin_ia32_expandloadhi256_maskz ((const __v16hi *) __B,
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(__v16hi) _mm256_setzero_si256 (), (__mmask16) __A);
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(__v16hi) _mm256_avx512_setzero_si256 (), (__mmask16) __A);
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}
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#ifdef __OPTIMIZE__
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extern __inline __m256i
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@ -180,7 +180,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shrdi_epi16 (__mmask16 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshrd_v16hi_mask ((__v16hi)__B,
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(__v16hi) __C, __D, (__v16hi) _mm256_setzero_si256 (), (__mmask16)__A);
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(__v16hi) __C, __D, (__v16hi) _mm256_avx512_setzero_si256 (), (__mmask16)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -195,7 +195,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shrdi_epi32 (__mmask8 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshrd_v8si_mask ((__v8si)__B, (__v8si) __C,
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__D, (__v8si) _mm256_setzero_si256 (), (__mmask8)__A);
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__D, (__v8si) _mm256_avx512_setzero_si256 (), (__mmask8)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -216,7 +216,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shrdi_epi64 (__mmask8 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshrd_v4di_mask ((__v4di)__B, (__v4di) __C,
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__D, (__v4di) _mm256_setzero_si256 (), (__mmask8)__A);
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__D, (__v4di) _mm256_avx512_setzero_si256 (), (__mmask8)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -237,7 +237,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shrdi_epi16 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshrd_v8hi_mask ((__v8hi)__B, (__v8hi) __C,
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__D, (__v8hi) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v8hi) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -258,7 +258,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shrdi_epi32 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshrd_v4si_mask ((__v4si)__B, (__v4si) __C,
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__D, (__v4si) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v4si) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -279,7 +279,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shrdi_epi64 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshrd_v2di_mask ((__v2di)__B, (__v2di) __C,
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__D, (__v2di) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v2di) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -307,7 +307,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shldi_epi16 (__mmask16 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshld_v16hi_mask ((__v16hi)__B,
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(__v16hi) __C, __D, (__v16hi) _mm256_setzero_si256 (), (__mmask16)__A);
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(__v16hi) __C, __D, (__v16hi) _mm256_avx512_setzero_si256 (), (__mmask16)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -322,7 +322,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shldi_epi32 (__mmask8 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshld_v8si_mask ((__v8si)__B, (__v8si) __C,
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__D, (__v8si) _mm256_setzero_si256 (), (__mmask8)__A);
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__D, (__v8si) _mm256_avx512_setzero_si256 (), (__mmask8)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -343,7 +343,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm256_maskz_shldi_epi64 (__mmask8 __A, __m256i __B, __m256i __C, int __D)
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{
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return (__m256i)__builtin_ia32_vpshld_v4di_mask ((__v4di)__B, (__v4di) __C,
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__D, (__v4di) _mm256_setzero_si256 (), (__mmask8)__A);
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__D, (__v4di) _mm256_avx512_setzero_si256 (), (__mmask8)__A);
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}
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extern __inline __m256i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -364,7 +364,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shldi_epi16 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshld_v8hi_mask ((__v8hi)__B, (__v8hi) __C,
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__D, (__v8hi) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v8hi) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -385,7 +385,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shldi_epi32 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshld_v4si_mask ((__v4si)__B, (__v4si) __C,
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__D, (__v4si) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v4si) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -406,7 +406,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
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_mm_maskz_shldi_epi64 (__mmask8 __A, __m128i __B, __m128i __C, int __D)
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{
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return (__m128i)__builtin_ia32_vpshld_v2di_mask ((__v2di)__B, (__v2di) __C,
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__D, (__v2di) _mm_setzero_si128 (), (__mmask8)__A);
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__D, (__v2di) _mm_avx512_setzero_si128 (), (__mmask8)__A);
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}
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extern __inline __m128i
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__attribute__((__gnu_inline__, __always_inline__, __artificial__))
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@ -417,40 +417,40 @@ _mm_shldi_epi64 (__m128i __A, __m128i __B, int __C)
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#else
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#define _mm256_shrdi_epi16(A, B, C) ((__m256i) __builtin_ia32_vpshrd_v16hi ((__v16hi)(__m256i)(A), (__v16hi)(__m256i)(B),(int)(C)))
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#define _mm256_mask_shrdi_epi16(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(C), (__v16hi)(__m256i)(D), (int)(E), (__v16hi)(__m256i)(A), (__mmask16)(B)))
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#define _mm256_maskz_shrdi_epi16(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(B), (__v16hi)(__m256i)(C),(int)(D), (__v16hi)(__m256i)_mm256_setzero_si256 (), (__mmask16)(A)))
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#define _mm256_maskz_shrdi_epi16(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v16hi_mask ((__v16hi)(__m256i)(B), (__v16hi)(__m256i)(C),(int)(D), (__v16hi)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask16)(A)))
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#define _mm256_shrdi_epi32(A, B, C) ((__m256i) __builtin_ia32_vpshrd_v8si ((__v8si)(__m256i)(A), (__v8si)(__m256i)(B),(int)(C)))
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#define _mm256_mask_shrdi_epi32(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(C), (__v8si)(__m256i)(D), (int)(E), (__v8si)(__m256i)(A), (__mmask8)(B)))
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#define _mm256_maskz_shrdi_epi32(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(B), (__v8si)(__m256i)(C),(int)(D), (__v8si)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A)))
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#define _mm256_maskz_shrdi_epi32(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v8si_mask ((__v8si)(__m256i)(B), (__v8si)(__m256i)(C),(int)(D), (__v8si)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask8)(A)))
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#define _mm256_shrdi_epi64(A, B, C) ((__m256i) __builtin_ia32_vpshrd_v4di ((__v4di)(__m256i)(A), (__v4di)(__m256i)(B),(int)(C)))
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#define _mm256_mask_shrdi_epi64(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(C), (__v4di)(__m256i)(D), (int)(E), (__v4di)(__m256i)(A), (__mmask8)(B)))
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#define _mm256_maskz_shrdi_epi64(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(B), (__v4di)(__m256i)(C),(int)(D), (__v4di)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A)))
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#define _mm256_maskz_shrdi_epi64(A, B, C, D) ((__m256i) __builtin_ia32_vpshrd_v4di_mask ((__v4di)(__m256i)(B), (__v4di)(__m256i)(C),(int)(D), (__v4di)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask8)(A)))
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#define _mm_shrdi_epi16(A, B, C) ((__m128i) __builtin_ia32_vpshrd_v8hi ((__v8hi)(__m128i)(A), (__v8hi)(__m128i)(B),(int)(C)))
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#define _mm_mask_shrdi_epi16(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(C), (__v8hi)(__m128i)(D), (int)(E), (__v8hi)(__m128i)(A), (__mmask8)(B)))
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#define _mm_maskz_shrdi_epi16(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(B), (__v8hi)(__m128i)(C),(int)(D), (__v8hi)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
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#define _mm_maskz_shrdi_epi16(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v8hi_mask ((__v8hi)(__m128i)(B), (__v8hi)(__m128i)(C),(int)(D), (__v8hi)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
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#define _mm_shrdi_epi32(A, B, C) ((__m128i) __builtin_ia32_vpshrd_v4si ((__v4si)(__m128i)(A), (__v4si)(__m128i)(B),(int)(C)))
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#define _mm_mask_shrdi_epi32(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(C), (__v4si)(__m128i)(D), (int)(E), (__v4si)(__m128i)(A), (__mmask8)(B)))
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#define _mm_maskz_shrdi_epi32(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(B), (__v4si)(__m128i)(C),(int)(D), (__v4si)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
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#define _mm_maskz_shrdi_epi32(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v4si_mask ((__v4si)(__m128i)(B), (__v4si)(__m128i)(C),(int)(D), (__v4si)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
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#define _mm_shrdi_epi64(A, B, C) ((__m128i) __builtin_ia32_vpshrd_v2di ((__v2di)(__m128i)(A), (__v2di)(__m128i)(B),(int)(C)))
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#define _mm_mask_shrdi_epi64(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(C), (__v2di)(__m128i)(D), (int)(E), (__v2di)(__m128i)(A), (__mmask8)(B)))
|
||||
#define _mm_maskz_shrdi_epi64(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(B), (__v2di)(__m128i)(C),(int)(D), (__v2di)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_maskz_shrdi_epi64(A, B, C, D) ((__m128i) __builtin_ia32_vpshrd_v2di_mask ((__v2di)(__m128i)(B), (__v2di)(__m128i)(C),(int)(D), (__v2di)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm256_shldi_epi16(A, B, C) ((__m256i) __builtin_ia32_vpshld_v16hi ((__v16hi)(__m256i)(A), (__v16hi)(__m256i)(B),(int)(C)))
|
||||
#define _mm256_mask_shldi_epi16(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(C), (__v16hi)(__m256i)(D), (int)(E), (__v16hi)(__m256i)(A), (__mmask16)(B)))
|
||||
#define _mm256_maskz_shldi_epi16(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(B), (__v16hi)(__m256i)(C),(int)(D), (__v16hi)(__m256i)_mm256_setzero_si256 (), (__mmask16)(A)))
|
||||
#define _mm256_maskz_shldi_epi16(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v16hi_mask ((__v16hi)(__m256i)(B), (__v16hi)(__m256i)(C),(int)(D), (__v16hi)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask16)(A)))
|
||||
#define _mm256_shldi_epi32(A, B, C) ((__m256i) __builtin_ia32_vpshld_v8si ((__v8si)(__m256i)(A), (__v8si)(__m256i)(B),(int)(C)))
|
||||
#define _mm256_mask_shldi_epi32(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(C), (__v8si)(__m256i)(D), (int)(E), (__v8si)(__m256i)(A), (__mmask8)(B)))
|
||||
#define _mm256_maskz_shldi_epi32(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(B), (__v8si)(__m256i)(C),(int)(D), (__v8si)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A)))
|
||||
#define _mm256_maskz_shldi_epi32(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v8si_mask ((__v8si)(__m256i)(B), (__v8si)(__m256i)(C),(int)(D), (__v8si)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask8)(A)))
|
||||
#define _mm256_shldi_epi64(A, B, C) ((__m256i) __builtin_ia32_vpshld_v4di ((__v4di)(__m256i)(A), (__v4di)(__m256i)(B),(int)(C)))
|
||||
#define _mm256_mask_shldi_epi64(A, B, C, D, E) ((__m256i) __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(C), (__v4di)(__m256i)(D), (int)(E), (__v4di)(__m256i)(A), (__mmask8)(B)))
|
||||
#define _mm256_maskz_shldi_epi64(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(B), (__v4di)(__m256i)(C),(int)(D), (__v4di)(__m256i)_mm256_setzero_si256 (), (__mmask8)(A)))
|
||||
#define _mm256_maskz_shldi_epi64(A, B, C, D) ((__m256i) __builtin_ia32_vpshld_v4di_mask ((__v4di)(__m256i)(B), (__v4di)(__m256i)(C),(int)(D), (__v4di)(__m256i)_mm256_avx512_setzero_si256 (), (__mmask8)(A)))
|
||||
#define _mm_shldi_epi16(A, B, C) ((__m128i) __builtin_ia32_vpshld_v8hi ((__v8hi)(__m128i)(A), (__v8hi)(__m128i)(B),(int)(C)))
|
||||
#define _mm_mask_shldi_epi16(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(C), (__v8hi)(__m128i)(D), (int)(E), (__v8hi)(__m128i)(A), (__mmask8)(B)))
|
||||
#define _mm_maskz_shldi_epi16(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(B), (__v8hi)(__m128i)(C),(int)(D), (__v8hi)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_maskz_shldi_epi16(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v8hi_mask ((__v8hi)(__m128i)(B), (__v8hi)(__m128i)(C),(int)(D), (__v8hi)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_shldi_epi32(A, B, C) ((__m128i) __builtin_ia32_vpshld_v4si ((__v4si)(__m128i)(A), (__v4si)(__m128i)(B),(int)(C)))
|
||||
#define _mm_mask_shldi_epi32(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(C), (__v4si)(__m128i)(D), (int)(E), (__v4si)(__m128i)(A), (__mmask8)(B)))
|
||||
#define _mm_maskz_shldi_epi32(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(B), (__v4si)(__m128i)(C),(int)(D), (__v4si)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_maskz_shldi_epi32(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v4si_mask ((__v4si)(__m128i)(B), (__v4si)(__m128i)(C),(int)(D), (__v4si)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_shldi_epi64(A, B, C) ((__m128i) __builtin_ia32_vpshld_v2di ((__v2di)(__m128i)(A), (__v2di)(__m128i)(B),(int)(C)))
|
||||
#define _mm_mask_shldi_epi64(A, B, C, D, E) ((__m128i) __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(C), (__v2di)(__m128i)(D), (int)(E), (__v2di)(__m128i)(A), (__mmask8)(B)))
|
||||
#define _mm_maskz_shldi_epi64(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(B), (__v2di)(__m128i)(C),(int)(D), (__v2di)(__m128i)_mm_setzero_si128 (), (__mmask8)(A)))
|
||||
#define _mm_maskz_shldi_epi64(A, B, C, D) ((__m128i) __builtin_ia32_vpshld_v2di_mask ((__v2di)(__m128i)(B), (__v2di)(__m128i)(C),(int)(D), (__v2di)(__m128i)_mm_avx512_setzero_si128 (), (__mmask8)(A)))
|
||||
#endif
|
||||
extern __inline __m256i
|
||||
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
|
|
@ -704,15 +704,6 @@ _mm_maskz_shldv_epi64 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
|
|||
return (__m128i)__builtin_ia32_vpshldv_v2di_maskz ((__v2di)__B, (__v2di) __C,
|
||||
(__v2di) __D, (__mmask8)__A);
|
||||
}
|
||||
#ifdef __DISABLE_AVX512VBMI2VL__
|
||||
#undef __DISABLE_AVX512VBMI2VL__
|
||||
#pragma GCC pop_options
|
||||
#endif
|
||||
#if !defined(__AVX512VL__) || !defined(__AVX512VBMI2__) || !defined(__AVX512BW__)
|
||||
#pragma GCC push_options
|
||||
#pragma GCC target("avx512vbmi2,avx512vl,avx512bw")
|
||||
#define __DISABLE_AVX512VBMI2VLBW__
|
||||
#endif
|
||||
extern __inline __m256i
|
||||
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
_mm256_mask_compress_epi8 (__m256i __A, __mmask32 __B, __m256i __C)
|
||||
|
|
@ -725,7 +716,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
|||
_mm256_maskz_compress_epi8 (__mmask32 __A, __m256i __B)
|
||||
{
|
||||
return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __B,
|
||||
(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
|
||||
(__v32qi) _mm256_avx512_setzero_si256 (), (__mmask32) __A);
|
||||
}
|
||||
extern __inline void
|
||||
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
|
|
@ -747,7 +738,7 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
|||
_mm256_maskz_expand_epi8 (__mmask32 __A, __m256i __B)
|
||||
{
|
||||
return (__m256i) __builtin_ia32_expandqi256_maskz ((__v32qi) __B,
|
||||
(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
|
||||
(__v32qi) _mm256_avx512_setzero_si256 (), (__mmask32) __A);
|
||||
}
|
||||
extern __inline __m256i
|
||||
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
||||
|
|
@ -761,10 +752,10 @@ __attribute__((__gnu_inline__, __always_inline__, __artificial__))
|
|||
_mm256_maskz_expandloadu_epi8 (__mmask32 __A, const void * __B)
|
||||
{
|
||||
return (__m256i) __builtin_ia32_expandloadqi256_maskz ((const __v32qi *) __B,
|
||||
(__v32qi) _mm256_setzero_si256 (), (__mmask32) __A);
|
||||
(__v32qi) _mm256_avx512_setzero_si256 (), (__mmask32) __A);
|
||||
}
|
||||
#ifdef __DISABLE_AVX512VBMI2VLBW__
|
||||
#undef __DISABLE_AVX512VBMI2VLBW__
|
||||
#ifdef __DISABLE_AVX512VBMI2VL__
|
||||
#undef __DISABLE_AVX512VBMI2VL__
|
||||
#pragma GCC pop_options
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue