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Fix naming for redbean shared memory atomics
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a5b483f2d4
commit
60b68d7152
4 changed files with 18 additions and 12 deletions
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@ -54,7 +54,7 @@ function Lock()
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end
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end
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function Unlock()
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local old = mem:add(LOCK, -1)
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local old = mem:fetch_add(LOCK, -1)
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if old == 2 then
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mem:store(LOCK, 0)
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mem:wake(LOCK, 1)
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@ -45,15 +45,21 @@ ok, old = mem:cmpxchg(0, 0, 1)
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assert(ok and old == 0)
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ok, old = mem:cmpxchg(0, 666, 777)
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assert(not ok and old == 1)
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assert(mem:add(0, 3) == 1)
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assert(mem:load(0) == 4)
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assert(mem:fetch_add(0, 3) == 1)
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assert(mem:load(0) == 0b00000100)
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assert(mem:fetch_xor(0,0b00000110) == 0b00000100)
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assert(mem:load(0) == 0b00000010)
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assert(mem:fetch_and(0,0b00000110) == 0b00000010)
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assert(mem:load(0) == 0b00000010)
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assert(mem:fetch_or(0, 0b00000110) == 0b00000010)
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assert(mem:load(0) == 0b00000110)
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--------------------------------------------------------------------------------
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-- test atomic addition across concurrent processes
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function Worker()
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for i = 1,iterations do
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mem:add(0, 1)
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mem:fetch_add(0, 1)
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end
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end
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8
third_party/lua/lunix.c
vendored
8
third_party/lua/lunix.c
vendored
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@ -2882,10 +2882,10 @@ static const luaL_Reg kLuaUnixMemoryMeth[] = {
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{"store", LuaUnixMemoryStore}, //
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{"xchg", LuaUnixMemoryXchg}, //
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{"cmpxchg", LuaUnixMemoryCmpxchg}, //
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{"add", LuaUnixMemoryAdd}, //
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{"and", LuaUnixMemoryAnd}, //
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{"or", LuaUnixMemoryOr}, //
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{"xor", LuaUnixMemoryXor}, //
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{"fetch_add", LuaUnixMemoryAdd}, //
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{"fetch_and", LuaUnixMemoryAnd}, //
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{"fetch_or", LuaUnixMemoryOr}, //
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{"fetch_xor", LuaUnixMemoryXor}, //
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{"wait", LuaUnixMemoryWait}, //
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{"wake", LuaUnixMemoryWake}, //
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{0}, //
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@ -4620,7 +4620,7 @@ UNIX MODULE
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This operation happens atomically and provides the same memory
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barrier semantics as the aligned x86 LOCK CMPXCHG instruction.
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unix.Memory:add(word_index:int, value:int)
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unix.Memory:fetch_add(word_index:int, value:int)
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└─→ old:int
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Fetches then adds value.
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@ -4632,7 +4632,7 @@ UNIX MODULE
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This operation is atomic and provides the same memory barrier
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semantics as the aligned x86 LOCK XADD instruction.
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unix.Memory:and(word_index:int, value:int)
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unix.Memory:fetch_and(word_index:int, value:int)
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└─→ int
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Fetches and bitwise ands value.
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@ -4640,7 +4640,7 @@ UNIX MODULE
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This operation happens atomically and provides the same memory
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barrier ordering semantics as its x86 implementation.
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unix.Memory:or(word_index:int, value:int)
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unix.Memory:fetch_or(word_index:int, value:int)
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└─→ int
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Fetches and bitwise ors value.
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@ -4648,7 +4648,7 @@ UNIX MODULE
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This operation happens atomically and provides the same memory
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barrier ordering semantics as its x86 implementation.
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unix.Memory:xor(word_index:int, value:int)
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unix.Memory:fetch_xor(word_index:int, value:int)
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└─→ int
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Fetches and bitwise xors value.
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