Make improvements

This change progresses our AARCH64 support:

- The AARCH64 build and tests are now passing
- Add 128-bit floating-point support to printf()
- Fix clone() so it initializes cosmo's x28 TLS register
- Fix TLS memory layout issue with aarch64 _Alignas vars
- Revamp microbenchmarking tools so they work on aarch64
- Make some subtle improvements to aarch64 crash reporting
- Make kisdangerous() memory checks more accurate on aarch64
- Remove sys_open() since it's not available on Linux AARCH64

This change makes general improvements to Cosmo and Redbean:

- Introduce GetHostIsa() function in Redbean
- You can now feature check using pledge(0, 0)
- You can now feature check using unveil("",0)
- Refactor some more x86-specific asm comments
- Refactor and write docs for some libm functions
- Make the mmap() API behave more similar to Linux
- Fix WIFSIGNALED() which wrongly returned true for zero
- Rename some obscure cosmo keywords from noFOO to dontFOO
This commit is contained in:
Justine Tunney 2023-06-03 08:12:13 -07:00
parent 5655c9a4e7
commit 8f522cb702
No known key found for this signature in database
GPG key ID: BE714B4575D6E328
116 changed files with 1194 additions and 1025 deletions

View file

@ -45,28 +45,6 @@ TEST(read, eof) {
////////////////////////////////////////////////////////////////////////////////
static long Read(long fd, void *buf, unsigned long size) {
#ifdef __x86_64__
long ax, di, si, dx;
asm volatile("syscall"
: "=a"(ax), "=D"(di), "=S"(si), "=d"(dx)
: "0"(__NR_read), "1"(fd), "2"(buf), "3"(size)
: "rcx", "r8", "r9", "r10", "r11", "memory", "cc");
return ax;
#elif defined(__aarch64__)
register long r0 asm("x0") = (long)fd;
register long r1 asm("x1") = (long)buf;
register long r2 asm("x2") = (long)size;
register long r8 asm("x8") = (long)__NR_read;
register long res_x0 asm("x0");
asm volatile("svc\t0"
: "=r"(res_x0)
: "r"(r0), "r"(r1), "r"(r2), "r"(r8)
: "memory");
return res_x0;
#endif
}
BENCH(read, bench) {
char buf[16];
ASSERT_SYS(0, 3, open("/dev/zero", O_RDONLY));
@ -80,7 +58,5 @@ BENCH(read, bench) {
preadv(3, (struct iovec[]){{buf, 1}, {buf + 1, 4}}, 2, 0));
EZBENCH2("sys_read", donothing, sys_read(3, buf, 5));
EZBENCH2("sys_readv", donothing, sys_readv(3, &(struct iovec){buf, 5}, 1));
EZBENCH2("Read", donothing, Read(3, buf, 5));
EZBENCH2("Read", donothing, Read(3, buf, 5));
ASSERT_SYS(0, 0, close(3));
}