Release Cosmopolitan v3.3

This change upgrades to GCC 12.3 and GNU binutils 2.42. The GNU linker
appears to have changed things so that only a single de-duplicated str
table is present in the binary, and it gets placed wherever the linker
wants, regardless of what the linker script says. To cope with that we
need to stop using .ident to embed licenses. As such, this change does
significant work to revamp how third party licenses are defined in the
codebase, using `.section .notice,"aR",@progbits`.

This new GCC 12.3 toolchain has support for GNU indirect functions. It
lets us support __target_clones__ for the first time. This is used for
optimizing the performance of libc string functions such as strlen and
friends so far on x86, by ensuring AVX systems favor a second codepath
that uses VEX encoding. It shaves some latency off certain operations.
It's a useful feature to have for scientific computing for the reasons
explained by the test/libcxx/openmp_test.cc example which compiles for
fifteen different microarchitectures. Thanks to the upgrades, it's now
also possible to use newer instruction sets, such as AVX512FP16, VNNI.

Cosmo now uses the %gs register on x86 by default for TLS. Doing it is
helpful for any program that links `cosmo_dlopen()`. Such programs had
to recompile their binaries at startup to change the TLS instructions.
That's not great, since it means every page in the executable needs to
be faulted. The work of rewriting TLS-related x86 opcodes, is moved to
fixupobj.com instead. This is great news for MacOS x86 users, since we
previously needed to morph the binary every time for that platform but
now that's no longer necessary. The only platforms where we need fixup
of TLS x86 opcodes at runtime are now Windows, OpenBSD, and NetBSD. On
Windows we morph TLS to point deeper into the TIB, based on a TlsAlloc
assignment, and on OpenBSD/NetBSD we morph %gs back into %fs since the
kernels do not allow us to specify a value for the %gs register.

OpenBSD users are now required to use APE Loader to run Cosmo binaries
and assimilation is no longer possible. OpenBSD kernel needs to change
to allow programs to specify a value for the %gs register, or it needs
to stop marking executable pages loaded by the kernel as mimmutable().

This release fixes __constructor__, .ctor, .init_array, and lastly the
.preinit_array so they behave the exact same way as glibc.

We no longer use hex constants to define math.h symbols like M_PI.

third_party/intel/amxbf16intrin.internal.h

@@ -9,7 +9,7 @@
 #pragma GCC target("amx-bf16")
 #define __DISABLE_AMX_BF16__
 #endif
-#if defined(__x86_64__) && defined(__AMX_BF16__)
+#if defined(__x86_64__)
 #define _tile_dpbf16ps_internal(dst,src1,src2) __asm__ volatile ("{tdpbf16ps\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|tdpbf16ps\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
 #define _tile_dpbf16ps(dst,src1,src2) _tile_dpbf16ps_internal (dst, src1, src2)
 #endif

third_party/intel/amxint8intrin.internal.h

@@ -9,7 +9,7 @@
 #pragma GCC target("amx-int8")
 #define __DISABLE_AMX_INT8__
 #endif
-#if defined(__x86_64__) && defined(__AMX_INT8__)
+#if defined(__x86_64__)
 #define _tile_int8_dp_internal(name,dst,src1,src2) __asm__ volatile ("{"#name"\t%%tmm"#src2", %%tmm"#src1", %%tmm"#dst"|"#name"\t%%tmm"#dst", %%tmm"#src1", %%tmm"#src2"}" ::)
 #define _tile_dpbssd(dst,src1,src2) _tile_int8_dp_internal (tdpbssd, dst, src1, src2)
 #define _tile_dpbsud(dst,src1,src2) _tile_int8_dp_internal (tdpbsud, dst, src1, src2)

third_party/intel/amxtileintrin.internal.h

@@ -9,7 +9,7 @@
 #pragma GCC target("amx-tile")
 #define __DISABLE_AMX_TILE__
 #endif
-#if defined(__x86_64__) && defined(__AMX_TILE__)
+#if defined(__x86_64__)
 extern __inline void
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _tile_loadconfig (const void *__config)
@@ -29,11 +29,11 @@ _tile_release (void)
   __asm__ volatile ("tilerelease" ::);
 }
 #define _tile_loadd(dst,base,stride) _tile_loadd_internal (dst, base, stride)
-#define _tile_loadd_internal(dst,base,stride) __asm__ volatile ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" :: "r" ((const void*) base), "r" ((long) stride))
+#define _tile_loadd_internal(dst,base,stride) __asm__ volatile ("{tileloadd\t(%0,%1,1), %%tmm"#dst"|tileloadd\t%%tmm"#dst", [%0+%1*1]}" :: "r" ((const void*) (base)), "r" ((long) (stride)))
 #define _tile_stream_loadd(dst,base,stride) _tile_stream_loadd_internal (dst, base, stride)
-#define _tile_stream_loadd_internal(dst,base,stride) __asm__ volatile ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" :: "r" ((const void*) base), "r" ((long) stride))
+#define _tile_stream_loadd_internal(dst,base,stride) __asm__ volatile ("{tileloaddt1\t(%0,%1,1), %%tmm"#dst"|tileloaddt1\t%%tmm"#dst", [%0+%1*1]}" :: "r" ((const void*) (base)), "r" ((long) (stride)))
 #define _tile_stored(dst,base,stride) _tile_stored_internal (dst, base, stride)
-#define _tile_stored_internal(src,base,stride) __asm__ volatile ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" :: "r" ((void*) base), "r" ((long) stride) : "memory")
+#define _tile_stored_internal(src,base,stride) __asm__ volatile ("{tilestored\t%%tmm"#src", (%0,%1,1)|tilestored\t[%0+%1*1], %%tmm"#src"}" :: "r" ((void*) (base)), "r" ((long) (stride)) : "memory")
 #define _tile_zero(dst) _tile_zero_internal (dst)
 #define _tile_zero_internal(dst) __asm__ volatile ("tilezero\t%%tmm"#dst ::)
 #endif

third_party/intel/avx512bf16intrin.internal.h

@@ -11,6 +11,14 @@
 #endif
 typedef short __v32bh __attribute__ ((__vector_size__ (64)));
 typedef short __m512bh __attribute__ ((__vector_size__ (64), __may_alias__));
+extern __inline float
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtsbh_ss (__bfloat16 __A)
+{
+  union{ float a; unsigned int b;} __tmp;
+  __tmp.b = ((unsigned int)(__A)) << 16;
+  return __tmp.a;
+}
 extern __inline __m512bh
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_cvtne2ps_pbh (__m512 __A, __m512 __B)
@@ -65,6 +73,29 @@ _mm512_maskz_dpbf16_ps (__mmask16 __A, __m512 __B, __m512bh __C, __m512bh __D)
 {
   return (__m512)__builtin_ia32_dpbf16ps_v16sf_maskz(__B, __C, __D, __A);
 }
+extern __inline __m512
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_cvtpbh_ps (__m256bh __A)
+{
+  return (__m512)_mm512_castsi512_ps ((__m512i)_mm512_slli_epi32 (
+  (__m512i)_mm512_cvtepi16_epi32 ((__m256i)__A), 16));
+}
+extern __inline __m512
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_cvtpbh_ps (__mmask16 __U, __m256bh __A)
+{
+  return (__m512)_mm512_castsi512_ps ((__m512i) _mm512_slli_epi32 (
+  (__m512i)_mm512_maskz_cvtepi16_epi32 (
+  (__mmask16)__U, (__m256i)__A), 16));
+}
+extern __inline __m512
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_cvtpbh_ps (__m512 __S, __mmask16 __U, __m256bh __A)
+{
+  return (__m512)_mm512_castsi512_ps ((__m512i)(_mm512_mask_slli_epi32 (
+  (__m512i)__S, (__mmask16)__U,
+  (__m512i)_mm512_cvtepi16_epi32 ((__m256i)__A), 16)));
+}
 #ifdef __DISABLE_AVX512BF16__
 #undef __DISABLE_AVX512BF16__
 #pragma GCC pop_options

third_party/intel/avx512bf16vlintrin.internal.h

@@ -13,6 +13,7 @@ typedef short __v16bh __attribute__ ((__vector_size__ (32)));
 typedef short __v8bh __attribute__ ((__vector_size__ (16)));
 typedef short __m256bh __attribute__ ((__vector_size__ (32), __may_alias__));
 typedef short __m128bh __attribute__ ((__vector_size__ (16), __may_alias__));
+typedef unsigned short __bfloat16;
 extern __inline __m256bh
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_cvtne2ps_pbh (__m256 __A, __m256 __B)
@@ -121,6 +122,61 @@ _mm_maskz_dpbf16_ps (__mmask8 __A, __m128 __B, __m128bh __C, __m128bh __D)
 {
   return (__m128)__builtin_ia32_dpbf16ps_v4sf_maskz(__B, __C, __D, __A);
 }
+extern __inline __bfloat16
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtness_sbh (float __A)
+{
+  __v4sf __V = {__A, 0, 0, 0};
+  __v8hi __R = __builtin_ia32_cvtneps2bf16_v4sf_mask ((__v4sf)__V,
+        (__v8hi)_mm_undefined_si128 (), (__mmask8)-1);
+  return __R[0];
+}
+extern __inline __m128
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_cvtpbh_ps (__m128bh __A)
+{
+  return (__m128)_mm_castsi128_ps ((__m128i)_mm_slli_epi32 (
+  (__m128i)_mm_cvtepi16_epi32 ((__m128i)__A), 16));
+}
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_cvtpbh_ps (__m128bh __A)
+{
+  return (__m256)_mm256_castsi256_ps ((__m256i)_mm256_slli_epi32 (
+  (__m256i)_mm256_cvtepi16_epi32 ((__m128i)__A), 16));
+}
+extern __inline __m128
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskz_cvtpbh_ps (__mmask8 __U, __m128bh __A)
+{
+  return (__m128)_mm_castsi128_ps ((__m128i)_mm_slli_epi32 (
+  (__m128i)_mm_maskz_cvtepi16_epi32 (
+  (__mmask8)__U, (__m128i)__A), 16));
+}
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_cvtpbh_ps (__mmask8 __U, __m128bh __A)
+{
+  return (__m256)_mm256_castsi256_ps ((__m256i)_mm256_slli_epi32 (
+  (__m256i)_mm256_maskz_cvtepi16_epi32 (
+  (__mmask8)__U, (__m128i)__A), 16));
+}
+extern __inline __m128
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_cvtpbh_ps (__m128 __S, __mmask8 __U, __m128bh __A)
+{
+  return (__m128)_mm_castsi128_ps ((__m128i)_mm_mask_slli_epi32 (
+  (__m128i)__S, (__mmask8)__U, (__m128i)_mm_cvtepi16_epi32 (
+  (__m128i)__A), 16));
+}
+extern __inline __m256
+__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_cvtpbh_ps (__m256 __S, __mmask8 __U, __m128bh __A)
+{
+  return (__m256)_mm256_castsi256_ps ((__m256i)_mm256_mask_slli_epi32 (
+  (__m256i)__S, (__mmask8)__U, (__m256i)_mm256_cvtepi16_epi32 (
+  (__m128i)__A), 16));
+}
 #ifdef __DISABLE_AVX512BF16VL__
 #undef __DISABLE_AVX512BF16VL__
 #pragma GCC pop_options

third_party/intel/avx512dqintrin.internal.h

@@ -2248,9 +2248,9 @@ _mm512_fpclass_ps_mask (__m512 __A, const int __imm)
 #define _mm_mask_fpclass_ss_mask(X, C, U) ((__mmask8) __builtin_ia32_fpclassss_mask ((__v4sf) (__m128) (X), (int) (C), (__mmask8) (U)))
 #define _mm_mask_fpclass_sd_mask(X, C, U) ((__mmask8) __builtin_ia32_fpclasssd_mask ((__v2df) (__m128d) (X), (int) (C), (__mmask8) (U)))
 #define _mm512_mask_fpclass_pd_mask(u, X, C) ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), (int) (C), (__mmask8)(u)))
-#define _mm512_mask_fpclass_ps_mask(u, x, c) ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (x), (int) (c),(__mmask8)(u)))
+#define _mm512_mask_fpclass_ps_mask(u, x, c) ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (x), (int) (c),(__mmask16)(u)))
 #define _mm512_fpclass_pd_mask(X, C) ((__mmask8) __builtin_ia32_fpclasspd512_mask ((__v8df) (__m512d) (X), (int) (C), (__mmask8)-1))
-#define _mm512_fpclass_ps_mask(x, c) ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (x), (int) (c),(__mmask8)-1))
+#define _mm512_fpclass_ps_mask(x, c) ((__mmask16) __builtin_ia32_fpclassps512_mask ((__v16sf) (__m512) (x), (int) (c),(__mmask16)-1))
 #define _mm_reduce_sd(A, B, C) ((__m128d) __builtin_ia32_reducesd_mask ((__v2df)(__m128d)(A), (__v2df)(__m128d)(B), (int)(C), (__v2df) _mm_setzero_pd (), (__mmask8)-1))
 #define _mm_mask_reduce_sd(W, U, A, B, C) ((__m128d) __builtin_ia32_reducesd_mask ((__v2df)(__m128d)(A), (__v2df)(__m128d)(B), (int)(C), (__v2df)(__m128d)(W), (__mmask8)(U)))
 #define _mm_maskz_reduce_sd(U, A, B, C) ((__m128d) __builtin_ia32_reducesd_mask ((__v2df)(__m128d)(A), (__v2df)(__m128d)(B), (int)(C), (__v2df) _mm_setzero_pd (), (__mmask8)(U)))

third_party/intel/avx512fintrin.internal.h

@@ -1351,74 +1351,92 @@ _mm_maskz_sub_round_ss (__mmask8 __U, __m128 __A, __m128 __B,
 #define _mm_mask_sub_round_ss(W, U, A, B, C) (__m128)__builtin_ia32_subss_mask_round(A, B, W, U, C)
 #define _mm_maskz_sub_round_ss(U, A, B, C) (__m128)__builtin_ia32_subss_mask_round(A, B, (__v4sf)_mm_setzero_ps(), U, C)
 #endif
+typedef enum
+{
+  _MM_TERNLOG_A = 0xF0,
+  _MM_TERNLOG_B = 0xCC,
+  _MM_TERNLOG_C = 0xAA
+} _MM_TERNLOG_ENUM;
 #ifdef __OPTIMIZE__
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_ternarylogic_epi64 (__m512i __A, __m512i __B, __m512i __C,
       const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogq512_mask ((__v8di) __A,
-           (__v8di) __B,
-           (__v8di) __C, __imm,
-           (__mmask8) -1);
+  return (__m512i)
+    __builtin_ia32_pternlogq512_mask ((__v8di) __A,
+          (__v8di) __B,
+          (__v8di) __C,
+          (unsigned char) __imm,
+          (__mmask8) -1);
 }
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_ternarylogic_epi64 (__m512i __A, __mmask8 __U, __m512i __B,
     __m512i __C, const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogq512_mask ((__v8di) __A,
-           (__v8di) __B,
-           (__v8di) __C, __imm,
-           (__mmask8) __U);
+  return (__m512i)
+    __builtin_ia32_pternlogq512_mask ((__v8di) __A,
+          (__v8di) __B,
+          (__v8di) __C,
+          (unsigned char) __imm,
+          (__mmask8) __U);
 }
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_maskz_ternarylogic_epi64 (__mmask8 __U, __m512i __A, __m512i __B,
      __m512i __C, const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogq512_maskz ((__v8di) __A,
-            (__v8di) __B,
-            (__v8di) __C,
-            __imm, (__mmask8) __U);
+  return (__m512i)
+    __builtin_ia32_pternlogq512_maskz ((__v8di) __A,
+           (__v8di) __B,
+           (__v8di) __C,
+           (unsigned char) __imm,
+           (__mmask8) __U);
 }
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_ternarylogic_epi32 (__m512i __A, __m512i __B, __m512i __C,
       const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogd512_mask ((__v16si) __A,
-           (__v16si) __B,
-           (__v16si) __C,
-           __imm, (__mmask16) -1);
+  return (__m512i)
+    __builtin_ia32_pternlogd512_mask ((__v16si) __A,
+          (__v16si) __B,
+          (__v16si) __C,
+          (unsigned char) __imm,
+          (__mmask16) -1);
 }
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_mask_ternarylogic_epi32 (__m512i __A, __mmask16 __U, __m512i __B,
     __m512i __C, const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogd512_mask ((__v16si) __A,
-           (__v16si) __B,
-           (__v16si) __C,
-           __imm, (__mmask16) __U);
+  return (__m512i)
+    __builtin_ia32_pternlogd512_mask ((__v16si) __A,
+          (__v16si) __B,
+          (__v16si) __C,
+          (unsigned char) __imm,
+          (__mmask16) __U);
 }
 extern __inline __m512i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm512_maskz_ternarylogic_epi32 (__mmask16 __U, __m512i __A, __m512i __B,
      __m512i __C, const int __imm)
 {
-  return (__m512i) __builtin_ia32_pternlogd512_maskz ((__v16si) __A,
-            (__v16si) __B,
-            (__v16si) __C,
-            __imm, (__mmask16) __U);
+  return (__m512i)
+    __builtin_ia32_pternlogd512_maskz ((__v16si) __A,
+           (__v16si) __B,
+           (__v16si) __C,
+           (unsigned char) __imm,
+           (__mmask16) __U);
 }
 #else
-#define _mm512_ternarylogic_epi64(A, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_mask ((__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), (int)(I), (__mmask8)-1))
-#define _mm512_mask_ternarylogic_epi64(A, U, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_mask ((__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), (int)(I), (__mmask8)(U)))
-#define _mm512_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_maskz ((__v8di)(__m512i)(A), (__v8di)(__m512i)(B), (__v8di)(__m512i)(C), (int)(I), (__mmask8)(U)))
-#define _mm512_ternarylogic_epi32(A, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_mask ((__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), (int)(I), (__mmask16)-1))
-#define _mm512_mask_ternarylogic_epi32(A, U, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_mask ((__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), (int)(I), (__mmask16)(U)))
-#define _mm512_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_maskz ((__v16si)(__m512i)(A), (__v16si)(__m512i)(B), (__v16si)(__m512i)(C), (int)(I), (__mmask16)(U)))
+#define _mm512_ternarylogic_epi64(A, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_mask ((__v8di) (__m512i) (A), (__v8di) (__m512i) (B), (__v8di) (__m512i) (C), (unsigned char) (I), (__mmask8) -1))
+#define _mm512_mask_ternarylogic_epi64(A, U, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_mask ((__v8di) (__m512i) (A), (__v8di) (__m512i) (B), (__v8di) (__m512i) (C), (unsigned char)(I), (__mmask8) (U)))
+#define _mm512_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m512i) __builtin_ia32_pternlogq512_maskz ((__v8di) (__m512i) (A), (__v8di) (__m512i) (B), (__v8di) (__m512i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm512_ternarylogic_epi32(A, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_mask ((__v16si) (__m512i) (A), (__v16si) (__m512i) (B), (__v16si) (__m512i) (C), (unsigned char) (I), (__mmask16) -1))
+#define _mm512_mask_ternarylogic_epi32(A, U, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_mask ((__v16si) (__m512i) (A), (__v16si) (__m512i) (B), (__v16si) (__m512i) (C), (unsigned char) (I), (__mmask16) (U)))
+#define _mm512_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m512i) __builtin_ia32_pternlogd512_maskz ((__v16si) (__m512i) (A), (__v16si) (__m512i) (B), (__v16si) (__m512i) (C), (unsigned char) (I), (__mmask16) (U)))
 #endif
 extern __inline __m512d
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -2680,14 +2698,18 @@ _mm_maskz_scalef_round_ss (__mmask8 __U, __m128 __A, __m128 __B, const int __R)
             (__mmask8) __U, __R);
 }
 #else
-#define _mm512_scalef_round_pd(A, B, C) (__m512d)__builtin_ia32_scalefpd512_mask(A, B, (__v8df)_mm512_undefined_pd(), -1, C)
-#define _mm512_mask_scalef_round_pd(W, U, A, B, C) (__m512d)__builtin_ia32_scalefpd512_mask(A, B, W, U, C)
-#define _mm512_maskz_scalef_round_pd(U, A, B, C) (__m512d)__builtin_ia32_scalefpd512_mask(A, B, (__v8df)_mm512_setzero_pd(), U, C)
-#define _mm512_scalef_round_ps(A, B, C) (__m512)__builtin_ia32_scalefps512_mask(A, B, (__v16sf)_mm512_undefined_ps(), -1, C)
-#define _mm512_mask_scalef_round_ps(W, U, A, B, C) (__m512)__builtin_ia32_scalefps512_mask(A, B, W, U, C)
-#define _mm512_maskz_scalef_round_ps(U, A, B, C) (__m512)__builtin_ia32_scalefps512_mask(A, B, (__v16sf)_mm512_setzero_ps(), U, C)
-#define _mm_scalef_round_sd(A, B, C) (__m128d)__builtin_ia32_scalefsd_mask_round (A, B, (__v2df)_mm_setzero_pd (), -1, C)
-#define _mm_scalef_round_ss(A, B, C) (__m128)__builtin_ia32_scalefss_mask_round (A, B, (__v4sf)_mm_setzero_ps (), -1, C)
+#define _mm512_scalef_round_pd(A, B, C) ((__m512d) __builtin_ia32_scalefpd512_mask((A), (B), (__v8df) _mm512_undefined_pd(), -1, (C)))
+#define _mm512_mask_scalef_round_pd(W, U, A, B, C) ((__m512d) __builtin_ia32_scalefpd512_mask((A), (B), (W), (U), (C)))
+#define _mm512_maskz_scalef_round_pd(U, A, B, C) ((__m512d) __builtin_ia32_scalefpd512_mask((A), (B), (__v8df) _mm512_setzero_pd(), (U), (C)))
+#define _mm512_scalef_round_ps(A, B, C) ((__m512) __builtin_ia32_scalefps512_mask((A), (B), (__v16sf) _mm512_undefined_ps(), -1, (C)))
+#define _mm512_mask_scalef_round_ps(W, U, A, B, C) ((__m512) __builtin_ia32_scalefps512_mask((A), (B), (W), (U), (C)))
+#define _mm512_maskz_scalef_round_ps(U, A, B, C) ((__m512) __builtin_ia32_scalefps512_mask((A), (B), (__v16sf) _mm512_setzero_ps(), (U), (C)))
+#define _mm_scalef_round_sd(A, B, C) ((__m128d) __builtin_ia32_scalefsd_mask_round ((A), (B), (__v2df) _mm_undefined_pd (), -1, (C)))
+#define _mm_scalef_round_ss(A, B, C) ((__m128) __builtin_ia32_scalefss_mask_round ((A), (B), (__v4sf) _mm_undefined_ps (), -1, (C)))
+#define _mm_mask_scalef_round_sd(W, U, A, B, C) ((__m128d) __builtin_ia32_scalefsd_mask_round ((A), (B), (W), (U), (C)))
+#define _mm_mask_scalef_round_ss(W, U, A, B, C) ((__m128) __builtin_ia32_scalefss_mask_round ((A), (B), (W), (U), (C)))
+#define _mm_maskz_scalef_round_sd(U, A, B, C) ((__m128d) __builtin_ia32_scalefsd_mask_round ((A), (B), (__v2df) _mm_setzero_pd (), (U), (C)))
+#define _mm_maskz_scalef_round_ss(U, A, B, C) ((__m128) __builtin_ia32_scalefss_mask_round ((A), (B), (__v4sf) _mm_setzero_ps (), (U), (C)))
 #endif
 #define _mm_mask_scalef_sd(W, U, A, B) _mm_mask_scalef_round_sd ((W), (U), (A), (B), _MM_FROUND_CUR_DIRECTION)
 #define _mm_maskz_scalef_sd(U, A, B) _mm_maskz_scalef_round_sd ((U), (A), (B), _MM_FROUND_CUR_DIRECTION)

third_party/intel/avx512vlintrin.internal.h

@@ -9486,10 +9486,12 @@ __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_ternarylogic_epi64 (__m256i __A, __m256i __B, __m256i __C,
       const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogq256_mask ((__v4di) __A,
-           (__v4di) __B,
-           (__v4di) __C, __imm,
-           (__mmask8) -1);
+  return (__m256i)
+    __builtin_ia32_pternlogq256_mask ((__v4di) __A,
+          (__v4di) __B,
+          (__v4di) __C,
+          (unsigned char) __imm,
+          (__mmask8) -1);
 }
 extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -9497,10 +9499,12 @@ _mm256_mask_ternarylogic_epi64 (__m256i __A, __mmask8 __U,
     __m256i __B, __m256i __C,
     const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogq256_mask ((__v4di) __A,
-           (__v4di) __B,
-           (__v4di) __C, __imm,
-           (__mmask8) __U);
+  return (__m256i)
+    __builtin_ia32_pternlogq256_mask ((__v4di) __A,
+          (__v4di) __B,
+          (__v4di) __C,
+          (unsigned char) __imm,
+          (__mmask8) __U);
 }
 extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -9508,21 +9512,24 @@ _mm256_maskz_ternarylogic_epi64 (__mmask8 __U, __m256i __A,
      __m256i __B, __m256i __C,
      const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogq256_maskz ((__v4di) __A,
-            (__v4di) __B,
-            (__v4di) __C,
-            __imm,
-            (__mmask8) __U);
+  return (__m256i)
+    __builtin_ia32_pternlogq256_maskz ((__v4di) __A,
+           (__v4di) __B,
+           (__v4di) __C,
+           (unsigned char) __imm,
+           (__mmask8) __U);
 }
 extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm256_ternarylogic_epi32 (__m256i __A, __m256i __B, __m256i __C,
       const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogd256_mask ((__v8si) __A,
-           (__v8si) __B,
-           (__v8si) __C, __imm,
-           (__mmask8) -1);
+  return (__m256i)
+    __builtin_ia32_pternlogd256_mask ((__v8si) __A,
+          (__v8si) __B,
+          (__v8si) __C,
+          (unsigned char) __imm,
+          (__mmask8) -1);
 }
 extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -9530,10 +9537,12 @@ _mm256_mask_ternarylogic_epi32 (__m256i __A, __mmask8 __U,
     __m256i __B, __m256i __C,
     const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogd256_mask ((__v8si) __A,
-           (__v8si) __B,
-           (__v8si) __C, __imm,
-           (__mmask8) __U);
+  return (__m256i)
+    __builtin_ia32_pternlogd256_mask ((__v8si) __A,
+          (__v8si) __B,
+          (__v8si) __C,
+          (unsigned char) __imm,
+          (__mmask8) __U);
 }
 extern __inline __m256i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -9541,73 +9550,88 @@ _mm256_maskz_ternarylogic_epi32 (__mmask8 __U, __m256i __A,
      __m256i __B, __m256i __C,
      const int __imm)
 {
-  return (__m256i) __builtin_ia32_pternlogd256_maskz ((__v8si) __A,
-            (__v8si) __B,
-            (__v8si) __C,
-            __imm,
-            (__mmask8) __U);
+  return (__m256i)
+    __builtin_ia32_pternlogd256_maskz ((__v8si) __A,
+           (__v8si) __B,
+           (__v8si) __C,
+           (unsigned char) __imm,
+           (__mmask8) __U);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_ternarylogic_epi64 (__m128i __A, __m128i __B, __m128i __C,
    const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogq128_mask ((__v2di) __A,
-           (__v2di) __B,
-           (__v2di) __C, __imm,
-           (__mmask8) -1);
+  return (__m128i)
+    __builtin_ia32_pternlogq128_mask ((__v2di) __A,
+          (__v2di) __B,
+          (__v2di) __C,
+          (unsigned char) __imm,
+          (__mmask8) -1);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_mask_ternarylogic_epi64 (__m128i __A, __mmask8 __U,
-        __m128i __B, __m128i __C, const int __imm)
+        __m128i __B, __m128i __C,
+        const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogq128_mask ((__v2di) __A,
-           (__v2di) __B,
-           (__v2di) __C, __imm,
-           (__mmask8) __U);
+  return (__m128i)
+    __builtin_ia32_pternlogq128_mask ((__v2di) __A,
+          (__v2di) __B,
+          (__v2di) __C,
+          (unsigned char) __imm,
+          (__mmask8) __U);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_maskz_ternarylogic_epi64 (__mmask8 __U, __m128i __A,
-         __m128i __B, __m128i __C, const int __imm)
+         __m128i __B, __m128i __C,
+         const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogq128_maskz ((__v2di) __A,
-            (__v2di) __B,
-            (__v2di) __C,
-            __imm,
-            (__mmask8) __U);
+  return (__m128i)
+    __builtin_ia32_pternlogq128_maskz ((__v2di) __A,
+           (__v2di) __B,
+           (__v2di) __C,
+           (unsigned char) __imm,
+           (__mmask8) __U);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_ternarylogic_epi32 (__m128i __A, __m128i __B, __m128i __C,
    const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogd128_mask ((__v4si) __A,
-           (__v4si) __B,
-           (__v4si) __C, __imm,
-           (__mmask8) -1);
+  return (__m128i)
+    __builtin_ia32_pternlogd128_mask ((__v4si) __A,
+          (__v4si) __B,
+          (__v4si) __C,
+          (unsigned char) __imm,
+          (__mmask8) -1);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_mask_ternarylogic_epi32 (__m128i __A, __mmask8 __U,
-        __m128i __B, __m128i __C, const int __imm)
+        __m128i __B, __m128i __C,
+        const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogd128_mask ((__v4si) __A,
-           (__v4si) __B,
-           (__v4si) __C, __imm,
-           (__mmask8) __U);
+  return (__m128i)
+    __builtin_ia32_pternlogd128_mask ((__v4si) __A,
+          (__v4si) __B,
+          (__v4si) __C,
+          (unsigned char) __imm,
+          (__mmask8) __U);
 }
 extern __inline __m128i
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
 _mm_maskz_ternarylogic_epi32 (__mmask8 __U, __m128i __A,
-         __m128i __B, __m128i __C, const int __imm)
+         __m128i __B, __m128i __C,
+         const int __imm)
 {
-  return (__m128i) __builtin_ia32_pternlogd128_maskz ((__v4si) __A,
-            (__v4si) __B,
-            (__v4si) __C,
-            __imm,
-            (__mmask8) __U);
+  return (__m128i)
+    __builtin_ia32_pternlogd128_maskz ((__v4si) __A,
+           (__v4si) __B,
+           (__v4si) __C,
+           (unsigned char) __imm,
+           (__mmask8) __U);
 }
 extern __inline __m256
 __attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
@@ -11335,18 +11359,18 @@ _mm256_permutex_pd (__m256d __X, const int __M)
 #define _mm_maskz_slli_epi32(U, X, C) ((__m128i)__builtin_ia32_pslldi128_mask ((__v4si)(__m128i)(X), (int)(C), (__v4si)(__m128i)_mm_setzero_si128 (), (__mmask8)(U)))
 #define _mm_mask_slli_epi64(W, U, X, C) ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), (int)(C), (__v2di)(__m128i)(W), (__mmask8)(U)))
 #define _mm_maskz_slli_epi64(U, X, C) ((__m128i)__builtin_ia32_psllqi128_mask ((__v2di)(__m128i)(X), (int)(C), (__v2di)(__m128i)_mm_setzero_si128 (), (__mmask8)(U)))
-#define _mm256_ternarylogic_epi64(A, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_mask ((__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), (int)(I), (__mmask8)-1))
-#define _mm256_mask_ternarylogic_epi64(A, U, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_mask ((__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), (int)(I), (__mmask8)(U)))
-#define _mm256_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_maskz ((__v4di)(__m256i)(A), (__v4di)(__m256i)(B), (__v4di)(__m256i)(C), (int)(I), (__mmask8)(U)))
-#define _mm256_ternarylogic_epi32(A, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_mask ((__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), (int)(I), (__mmask8)-1))
-#define _mm256_mask_ternarylogic_epi32(A, U, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_mask ((__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), (int)(I), (__mmask8)(U)))
-#define _mm256_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_maskz ((__v8si)(__m256i)(A), (__v8si)(__m256i)(B), (__v8si)(__m256i)(C), (int)(I), (__mmask8)(U)))
-#define _mm_ternarylogic_epi64(A, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_mask ((__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), (int)(I), (__mmask8)-1))
-#define _mm_mask_ternarylogic_epi64(A, U, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_mask ((__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), (int)(I), (__mmask8)(U)))
-#define _mm_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_maskz ((__v2di)(__m128i)(A), (__v2di)(__m128i)(B), (__v2di)(__m128i)(C), (int)(I), (__mmask8)(U)))
-#define _mm_ternarylogic_epi32(A, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_mask ((__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), (int)(I), (__mmask8)-1))
-#define _mm_mask_ternarylogic_epi32(A, U, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_mask ((__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), (int)(I), (__mmask8)(U)))
-#define _mm_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_maskz ((__v4si)(__m128i)(A), (__v4si)(__m128i)(B), (__v4si)(__m128i)(C), (int)(I), (__mmask8)(U)))
+#define _mm256_ternarylogic_epi64(A, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_mask ((__v4di) (__m256i) (A), (__v4di) (__m256i) (B), (__v4di) (__m256i) (C), (unsigned char) (I), (__mmask8) -1))
+#define _mm256_mask_ternarylogic_epi64(A, U, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_mask ((__v4di) (__m256i) (A), (__v4di) (__m256i) (B), (__v4di) (__m256i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm256_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m256i) __builtin_ia32_pternlogq256_maskz ((__v4di) (__m256i) (A), (__v4di) (__m256i) (B), (__v4di) (__m256i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm256_ternarylogic_epi32(A, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_mask ((__v8si) (__m256i) (A), (__v8si) (__m256i) (B), (__v8si) (__m256i) (C), (unsigned char) (I), (__mmask8) -1))
+#define _mm256_mask_ternarylogic_epi32(A, U, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_mask ((__v8si) (__m256i) (A), (__v8si) (__m256i) (B), (__v8si) (__m256i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm256_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m256i) __builtin_ia32_pternlogd256_maskz ((__v8si) (__m256i) (A), (__v8si) (__m256i) (B), (__v8si) (__m256i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm_ternarylogic_epi64(A, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_mask ((__v2di) (__m128i) (A), (__v2di) (__m128i) (B), (__v2di) (__m128i) (C), (unsigned char) (I), (__mmask8) -1))
+#define _mm_mask_ternarylogic_epi64(A, U, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_mask ((__v2di) (__m128i) (A), (__v2di) (__m128i) (B), (__v2di) (__m128i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm_maskz_ternarylogic_epi64(U, A, B, C, I) ((__m128i) __builtin_ia32_pternlogq128_maskz ((__v2di) (__m128i) (A), (__v2di) (__m128i) (B), (__v2di) (__m128i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm_ternarylogic_epi32(A, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_mask ((__v4si) (__m128i) (A), (__v4si) (__m128i) (B), (__v4si) (__m128i) (C), (unsigned char) (I), (__mmask8) -1))
+#define _mm_mask_ternarylogic_epi32(A, U, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_mask ((__v4si) (__m128i) (A), (__v4si) (__m128i) (B), (__v4si) (__m128i) (C), (unsigned char) (I), (__mmask8) (U)))
+#define _mm_maskz_ternarylogic_epi32(U, A, B, C, I) ((__m128i) __builtin_ia32_pternlogd128_maskz ((__v4si) (__m128i) (A), (__v4si) (__m128i) (B), (__v4si) (__m128i) (C), (unsigned char) (I), (__mmask8) (U)))
 #define _mm256_roundscale_ps(A, B) ((__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf)(__m256)(A), (int)(B), (__v8sf)(__m256)_mm256_setzero_ps (), (__mmask8)-1))
 #define _mm256_mask_roundscale_ps(W, U, A, B) ((__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf)(__m256)(A), (int)(B), (__v8sf)(__m256)(W), (__mmask8)(U)))
 #define _mm256_maskz_roundscale_ps(U, A, B) ((__m256) __builtin_ia32_rndscaleps_256_mask ((__v8sf)(__m256)(A), (int)(B), (__v8sf)(__m256)_mm256_setzero_ps (), (__mmask8)(U)))

third_party/intel/bmiintrin.internal.h

@@ -14,12 +14,22 @@ __tzcnt_u16 (unsigned short __X)
 {
   return __builtin_ia32_tzcnt_u16 (__X);
 }
+extern __inline unsigned short __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_tzcnt_u16 (unsigned short __X)
+{
+  return __builtin_ia32_tzcnt_u16 (__X);
+}
 extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 __andn_u32 (unsigned int __X, unsigned int __Y)
 {
   return ~__X & __Y;
 }
 extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_andn_u32 (unsigned int __X, unsigned int __Y)
+{
+  return __andn_u32 (__X, __Y);
+}
+extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 __bextr_u32 (unsigned int __X, unsigned int __Y)
 {
   return __builtin_ia32_bextr_u32 (__X, __Y);
@@ -76,6 +86,11 @@ __andn_u64 (unsigned long long __X, unsigned long long __Y)
   return ~__X & __Y;
 }
 extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_andn_u64 (unsigned long long __X, unsigned long long __Y)
+{
+  return __andn_u64 (__X, __Y);
+}
+extern __inline unsigned long long __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 __bextr_u64 (unsigned long long __X, unsigned long long __Y)
 {
   return __builtin_ia32_bextr_u64 (__X, __Y);

third_party/intel/cpuid.internal.h

@@ -48,7 +48,6 @@
 #define bit_AVX2 (1 << 5)
 #define bit_BMI2 (1 << 8)
 #define bit_RTM (1 << 11)
-#define bit_MPX (1 << 14)
 #define bit_AVX512F (1 << 16)
 #define bit_AVX512DQ (1 << 17)
 #define bit_RDSEED (1 << 18)
@@ -84,6 +83,7 @@
 #define bit_AVX5124VNNIW (1 << 2)
 #define bit_AVX5124FMAPS (1 << 3)
 #define bit_AVX512VP2INTERSECT (1 << 8)
+#define bit_AVX512FP16 (1 << 23)
 #define bit_IBT (1 << 20)
 #define bit_UINTR (1 << 5)
 #define bit_PCONFIG (1 << 18)
@@ -92,8 +92,6 @@
 #define bit_AMX_BF16 (1 << 22)
 #define bit_AMX_TILE (1 << 24)
 #define bit_AMX_INT8 (1 << 25)
-#define bit_BNDREGS (1 << 3)
-#define bit_BNDCSR (1 << 4)
 #define bit_XSAVEOPT (1 << 0)
 #define bit_XSAVEC (1 << 1)
 #define bit_XSAVES (1 << 3)

third_party/intel/emmintrin.internal.h

@@ -550,13 +550,12 @@ _mm_loadu_si64 (void const *__P)
 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_loadu_si32 (void const *__P)
 {
-  return _mm_set_epi32 (*(int *)__P, (int)0, (int)0, (int)0);
+  return _mm_set_epi32 (0, 0, 0, (*(__m32_u *)__P)[0]);
 }
 extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_loadu_si16 (void const *__P)
 {
-  return _mm_set_epi16 (*(short *)__P, (short)0, (short)0, (short)0,
-   (short)0, (short)0, (short)0, (short)0);
+  return _mm_set_epi16 (0, 0, 0, 0, 0, 0, 0, (*(__m16_u *)__P)[0]);
 }
 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_store_si128 (__m128i *__P, __m128i __B)

third_party/intel/ia32intrin.internal.h

@@ -21,10 +21,10 @@ __bswapd (int __X)
   return __builtin_bswap32 (__X);
 }
 #ifndef __iamcu__
-#ifndef __SSE4_2__
+#ifndef __CRC32__
 #pragma GCC push_options
-#pragma GCC target("sse4.2")
-#define __DISABLE_SSE4_2__
+#pragma GCC target("crc32")
+#define __DISABLE_CRC32__
 #endif
 extern __inline unsigned int
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -44,8 +44,8 @@ __crc32d (unsigned int __C, unsigned int __V)
 {
   return __builtin_ia32_crc32si (__C, __V);
 }
-#ifdef __DISABLE_SSE4_2__
-#undef __DISABLE_SSE4_2__
+#ifdef __DISABLE_CRC32__
+#undef __DISABLE_CRC32__
 #pragma GCC pop_options
 #endif
 #endif
@@ -63,9 +63,19 @@ __rdpmc (int __S)
   return __builtin_ia32_rdpmc (__S);
 }
 #endif
-#define __rdtsc() __builtin_ia32_rdtsc ()
+extern __inline unsigned long long
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__rdtsc (void)
+{
+  return __builtin_ia32_rdtsc ();
+}
 #ifndef __iamcu__
-#define __rdtscp(a) __builtin_ia32_rdtscp (a)
+extern __inline unsigned long long
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+__rdtscp (unsigned int *__A)
+{
+  return __builtin_ia32_rdtscp (__A);
+}
 #endif
 extern __inline unsigned char
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -130,10 +140,10 @@ __bswapq (long long __X)
 {
   return __builtin_bswap64 (__X);
 }
-#ifndef __SSE4_2__
+#ifndef __CRC32__
 #pragma GCC push_options
-#pragma GCC target("sse4.2")
-#define __DISABLE_SSE4_2__
+#pragma GCC target("crc32")
+#define __DISABLE_CRC32__
 #endif
 extern __inline unsigned long long
 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
@@ -141,8 +151,8 @@ __crc32q (unsigned long long __C, unsigned long long __V)
 {
   return __builtin_ia32_crc32di (__C, __V);
 }
-#ifdef __DISABLE_SSE4_2__
-#undef __DISABLE_SSE4_2__
+#ifdef __DISABLE_CRC32__
+#undef __DISABLE_CRC32__
 #pragma GCC pop_options
 #endif
 extern __inline long long

third_party/intel/immintrin.internal.h

@@ -36,6 +36,10 @@
 #include "third_party/intel/avx512bitalgintrin.internal.h"
 #include "third_party/intel/avx512vp2intersectintrin.internal.h"
 #include "third_party/intel/avx512vp2intersectvlintrin.internal.h"
+#ifdef __SSE2__
+#include "third_party/intel/avx512fp16intrin.internal.h"
+#include "third_party/intel/avx512fp16vlintrin.internal.h"
+#endif
 #include "third_party/intel/shaintrin.internal.h"
 #include "third_party/intel/fmaintrin.internal.h"
 #include "third_party/intel/f16cintrin.internal.h"

third_party/intel/mwaitintrin.internal.h

@@ -0,0 +1,26 @@
+#if defined(__x86_64__) && !(__ASSEMBLER__ + __LINKER__ + 0)
+#ifndef _MWAITINTRIN_H_INCLUDED
+#define _MWAITINTRIN_H_INCLUDED
+#ifndef __MWAIT__
+#pragma GCC push_options
+#pragma GCC target("mwait")
+#define __DISABLE_MWAIT__
+#endif
+extern __inline void
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
+{
+  __builtin_ia32_monitor (__P, __E, __H);
+}
+extern __inline void
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mwait (unsigned int __E, unsigned int __H)
+{
+  __builtin_ia32_mwait (__E, __H);
+}
+#ifdef __DISABLE_MWAIT__
+#undef __DISABLE_MWAIT__
+#pragma GCC pop_options
+#endif
+#endif
+#endif

third_party/intel/pmmintrin.internal.h

@@ -2,6 +2,7 @@
 #ifndef _PMMINTRIN_H_INCLUDED
 #define _PMMINTRIN_H_INCLUDED
 #include "third_party/intel/emmintrin.internal.h"
+#include "third_party/intel/mwaitintrin.internal.h"
 #ifndef __SSE3__
 #pragma GCC push_options
 #pragma GCC target("sse3")
@@ -67,16 +68,6 @@ _mm_lddqu_si128 (__m128i const *__P)
 {
   return (__m128i) __builtin_ia32_lddqu ((char const *)__P);
 }
-extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_mm_monitor (void const * __P, unsigned int __E, unsigned int __H)
-{
-  __builtin_ia32_monitor (__P, __E, __H);
-}
-extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
-_mm_mwait (unsigned int __E, unsigned int __H)
-{
-  __builtin_ia32_mwait (__E, __H);
-}
 #ifdef __DISABLE_SSE3__
 #undef __DISABLE_SSE3__
 #pragma GCC pop_options

third_party/intel/serializeintrin.internal.h

@@ -9,7 +9,12 @@
 #pragma GCC target("serialize")
 #define __DISABLE_SERIALIZE__
 #endif
-#define _serialize() __builtin_ia32_serialize ()
+extern __inline void
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_serialize (void)
+{
+  __builtin_ia32_serialize ();
+}
 #ifdef __DISABLE_SERIALIZE__
 #undef __DISABLE_SERIALIZE__
 #pragma GCC pop_options

third_party/intel/smmintrin.internal.h

@@ -524,15 +524,10 @@ _mm_cmpgt_epi64 (__m128i __X, __m128i __Y)
 #pragma GCC pop_options
 #endif
 #include "third_party/intel/popcntintrin.internal.h"
-#ifndef __SSE4_1__
+#ifndef __CRC32__
 #pragma GCC push_options
-#pragma GCC target("sse4.1")
-#define __DISABLE_SSE4_1__
-#endif
-#ifndef __SSE4_2__
-#pragma GCC push_options
-#pragma GCC target("sse4.2")
-#define __DISABLE_SSE4_2__
+#pragma GCC target("crc32")
+#define __DISABLE_CRC32__
 #endif
 extern __inline unsigned int __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_crc32_u8 (unsigned int __C, unsigned char __V)
@@ -556,12 +551,8 @@ _mm_crc32_u64 (unsigned long long __C, unsigned long long __V)
   return __builtin_ia32_crc32di (__C, __V);
 }
 #endif
-#ifdef __DISABLE_SSE4_2__
-#undef __DISABLE_SSE4_2__
-#pragma GCC pop_options
-#endif
-#ifdef __DISABLE_SSE4_1__
-#undef __DISABLE_SSE4_1__
+#ifdef __DISABLE_CRC32__
+#undef __DISABLE_CRC32__
 #pragma GCC pop_options
 #endif
 #endif

third_party/intel/upgrade.sh

@@ -1,32 +1,27 @@
 #!/bin/sh
 
-s=/opt/cross11portcosmo/lib/gcc/x86_64-linux-musl/11.2.0/include
+s=/opt/include
 d=third_party/intel
 
 FILES='
+adxintrin
+ammintrin
 amxbf16intrin
 amxint8intrin
 amxtileintrin
-avx512bf16intrin
-avx512bf16vlintrin
-avx512vp2intersectintrin
-avx512vp2intersectvlintrin
-avxvnniintrin
-enqcmdintrin
-hresetintrin
-keylockerintrin
-serializeintrin
-tsxldtrkintrin
-uintrintrin
-x86gprintrin
+avx2intrin
 avx5124fmapsintrin
 avx5124vnniwintrin
+avx512bf16intrin
+avx512bf16vlintrin
 avx512bitalgintrin
 avx512bwintrin
 avx512cdintrin
 avx512dqintrin
 avx512erintrin
 avx512fintrin
+avx512fp16intrin
+avx512fp16vlintrin
 avx512ifmaintrin
 avx512ifmavlintrin
 avx512pfintrin
@@ -39,12 +34,12 @@ avx512vldqintrin
 avx512vlintrin
 avx512vnniintrin
 avx512vnnivlintrin
+avx512vp2intersectintrin
+avx512vp2intersectvlintrin
 avx512vpopcntdqintrin
 avx512vpopcntdqvlintrin
-adxintrin
-ammintrin
-avx2intrin
 avxintrin
+avxvnniintrin
 bmi2intrin
 bmiintrin
 cetintrin
@@ -54,19 +49,23 @@ clwbintrin
 clzerointrin
 cpuid
 emmintrin
+enqcmdintrin
 f16cintrin
 fma4intrin
 fmaintrin
 fxsrintrin
 gfniintrin
+hresetintrin
 ia32intrin
 immintrin
+keylockerintrin
 lwpintrin
 lzcntintrin
 mm3dnow
 mm_malloc
 mmintrin
 movdirintrin
+mwaitintrin
 mwaitxintrin
 nmmintrin
 pconfigintrin
@@ -76,16 +75,20 @@ popcntintrin
 prfchwintrin
 rdseedintrin
 rtmintrin
+serializeintrin
 sgxintrin
 shaintrin
 smmintrin
 tbmintrin
 tmmintrin
+tsxldtrkintrin
+uintrintrin
 vaesintrin
 vpclmulqdqintrin
 waitpkgintrin
 wbnoinvdintrin
 wmmintrin
+x86gprintrin
 x86intrin
 xmmintrin
 xopintrin

third_party/intel/vaesintrin.internal.h

@@ -1,7 +1,4 @@
 #if defined(__x86_64__) && !(__ASSEMBLER__ + __LINKER__ + 0)
-#ifndef _IMMINTRIN_H_INCLUDED
-# error "Never use <vaesintrin.h> directly; include <immintrin.h> instead."
-#endif
 #ifndef __VAESINTRIN_H_INCLUDED
 #define __VAESINTRIN_H_INCLUDED
 #if !defined(__VAES__) || !defined(__AVX__)

third_party/intel/x86gprintrin.internal.h

@@ -1,6 +1,11 @@
 #if defined(__x86_64__) && !(__ASSEMBLER__ + __LINKER__ + 0)
 #ifndef _X86GPRINTRIN_H_INCLUDED
 #define _X86GPRINTRIN_H_INCLUDED
+#if !defined _SOFT_FLOAT || defined __MMX__ || defined __SSE__
+#pragma GCC push_options
+#pragma GCC target("general-regs-only")
+#define __DISABLE_GENERAL_REGS_ONLY__
+#endif
 #include "third_party/intel/ia32intrin.internal.h"
 #ifndef __iamcu__
 #include "third_party/intel/adxintrin.internal.h"
@@ -16,6 +21,7 @@
 #include "third_party/intel/lzcntintrin.internal.h"
 #include "third_party/intel/lwpintrin.internal.h"
 #include "third_party/intel/movdirintrin.internal.h"
+#include "third_party/intel/mwaitintrin.internal.h"
 #include "third_party/intel/mwaitxintrin.internal.h"
 #include "third_party/intel/pconfigintrin.internal.h"
 #include "third_party/intel/popcntintrin.internal.h"
@@ -175,5 +181,9 @@ _ptwrite32 (unsigned __B)
 #pragma GCC pop_options
 #endif
 #endif
+#ifdef __DISABLE_GENERAL_REGS_ONLY__
+#undef __DISABLE_GENERAL_REGS_ONLY__
+#pragma GCC pop_options
+#endif
 #endif
 #endif