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Add Intel intrinsics headers

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Justine Tunney 2023-04-27 02:56:41 -07:00
parent 369f9740de
commit b7bf052a4b
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GPG key ID: BE714B4575D6E328
121 changed files with 47114 additions and 849 deletions
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78
third_party/intel/avx5124vnniwintrin.internal.h vendored Normal file
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@ -0,0 +1,78 @@
#if !defined _IMMINTRIN_H_INCLUDED
#error \
"Never use <avx5124vnniwintrin.h> directly; include <x86intrin.h> instead."
#endif
#ifndef _AVX5124VNNIWINTRIN_H_INCLUDED
#define _AVX5124VNNIWINTRIN_H_INCLUDED
#ifndef __AVX5124VNNIW__
#pragma GCC push_options
#pragma GCC target("avx5124vnniw")
#define __DISABLE_AVX5124VNNIW__
#endif /* __AVX5124VNNIW__ */
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_4dpwssd_epi32(__m512i __A, __m512i __B, __m512i __C, __m512i __D,
__m512i __E, __m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssd((__v16si)__B, (__v16si)__C,
(__v16si)__D, (__v16si)__E,
(__v16si)__A, (const __v4si *)__F);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_4dpwssd_epi32(__m512i __A, __mmask16 __U, __m512i __B,
__m512i __C, __m512i __D, __m512i __E,
__m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssd_mask(
(__v16si)__B, (__v16si)__C, (__v16si)__D, (__v16si)__E, (__v16si)__A,
(const __v4si *)__F, (__v16si)__A, (__mmask16)__U);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_4dpwssd_epi32(__mmask16 __U, __m512i __A, __m512i __B,
__m512i __C, __m512i __D, __m512i __E,
__m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssd_mask(
(__v16si)__B, (__v16si)__C, (__v16si)__D, (__v16si)__E, (__v16si)__A,
(const __v4si *)__F, (__v16si)_mm512_setzero_ps(), (__mmask16)__U);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_4dpwssds_epi32(__m512i __A, __m512i __B, __m512i __C, __m512i __D,
__m512i __E, __m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssds((__v16si)__B, (__v16si)__C,
(__v16si)__D, (__v16si)__E,
(__v16si)__A, (const __v4si *)__F);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_mask_4dpwssds_epi32(__m512i __A, __mmask16 __U, __m512i __B,
__m512i __C, __m512i __D, __m512i __E,
__m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssds_mask(
(__v16si)__B, (__v16si)__C, (__v16si)__D, (__v16si)__E, (__v16si)__A,
(const __v4si *)__F, (__v16si)__A, (__mmask16)__U);
}
extern __inline __m512i
__attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm512_maskz_4dpwssds_epi32(__mmask16 __U, __m512i __A, __m512i __B,
__m512i __C, __m512i __D, __m512i __E,
__m128i *__F) {
return (__m512i)__builtin_ia32_vp4dpwssds_mask(
(__v16si)__B, (__v16si)__C, (__v16si)__D, (__v16si)__E, (__v16si)__A,
(const __v4si *)__F, (__v16si)_mm512_setzero_ps(), (__mmask16)__U);
}
#ifdef __DISABLE_AVX5124VNNIW__
#undef __DISABLE_AVX5124VNNIW__
#pragma GCC pop_options
#endif /* __DISABLE_AVX5124VNNIW__ */
#endif /* _AVX5124VNNIWINTRIN_H_INCLUDED */