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Justine Tunney 2020-06-15 07:18:57 -07:00
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third_party/xed/private.h vendored Normal file
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#ifndef COSMOPOLITAN_THIRD_PARTY_XED_PRIVATE_H_
#define COSMOPOLITAN_THIRD_PARTY_XED_PRIVATE_H_
#include "third_party/xed/x86.h"
#if !(__ASSEMBLER__ + __LINKER__ + 0)
COSMOPOLITAN_C_START_
typedef int xed_int_t;
typedef unsigned int xed_uint_t;
typedef unsigned int xed_uint_t;
typedef unsigned char xed_bits_t;
typedef intptr_t xed_addr_t;
typedef bool32 xed_bool_t;
COSMOPOLITAN_C_END_
#endif /* !(__ASSEMBLER__ + __LINKER__ + 0) */
#endif /* COSMOPOLITAN_THIRD_PARTY_XED_PRIVATE_H_ */

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#ifndef COSMOPOLITAN_THIRD_PARTY_XED_X86_H_
#define COSMOPOLITAN_THIRD_PARTY_XED_X86_H_
#include "libc/runtime/runtime.h"
#include "libc/str/str.h"
#if !(__ASSEMBLER__ + __LINKER__ + 0)
COSMOPOLITAN_C_START_
/* ▓▓▓▓▓▓▓▓▓▓▓▓▓ ▄▄▄▄
▓▓▓▓▓▓▓▓▓▓▓▓▓ ▄▓▓▓▓▓▓▄ ▄▓▓▓▓▓▓▓▓ ▄▓▓▓▀
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│ ▓▓▓▓ ▓▓▓▓▓ ▓▓▓ ▓▓▓▄ ▓▓▓ ▓▓▓▓ │
▬▬▬▬▬▬▬▬▬▬▬▬▬▓▓▓▓ ▓▓▓▓▓▬▬▬▬▬▬▬▬▓▓▓▓▓▓▓▬▬▬▀▓▓▓▓▄▄▄▓▓▓▬▬▓▓▓▓▓▓▓▓▓▓▓▓▓▬▬▬▬▬▬▬▬▬▬
│ ▓▓▓▓ ▓▓▓▓▓ ▓▓▓▓▓▄ ▄▄▓▓▓▓▓▓▓▓▓ ▓▓▓▓ ▓▓▓▄ │
▬▬▬▬▬▬▬▬▬▬▬▬▬▓▓▓▓ ▓▓▓▓▓▬▬▬▬▬▬▬▬▬▬▬▓▓▓▓▓▄▄▓▓▀ ▀▀▓▓▓▓▓▓▓▓▓▓▬▬▬▬▬▬▬▬▓▓▓▬▬▬▬▬▬▬▬
▬▬▬▬▬▬▬▬║▬▬▬▬▓▓▓▓ ▓▓▓▓▓▬▬▬▬▬▬▬▬▬▬▬▬▓▓▓▓▓▓▓▬▬▬▬▬▬▬▬▬▓▓▓ ▓▓▓▬▬▬▬▬▬▬▬▓▓▓▬▬▬▬║▬▬▬
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■■■■■■■■║■■■■▓▓▓▓ ▓▓▓▓▓■■■▓▓▓▄▄▄▓▓▓▓■■■■▬▓▓▓▓▄▄▄▄▓▓▓■■■■▬▓▓▓▓▄▄▄▓▓▓▓▀■■■■║■■■
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║▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓▓║
╔───────╨───────────────────────────────────────────────────────────────────╨──╗
│ cosmopolitan § virtual machine » byte code language │
╚─────────────────────────────────────────────────────────────────────────────*/
#define XED_MAX_INSTRUCTION_BYTES 15
#define XED_MODE_REAL 0
#define XED_MODE_LEGACY 1
#define XED_MODE_LONG 2
#define XED_HINT_NTAKEN 1
#define XED_HINT_TAKEN 2
#define XED_HINT_ALTER 3
#define xed_modrm_mod(M) (((M)&0xff) >> 6)
#define xed_modrm_reg(M) (((M) >> 3) & 7)
#define xed_modrm_rm(M) ((M)&7)
#define xed_sib_base(M) ((M)&7)
#define xed_sib_index(M) (((M) >> 3) & 7)
#define xed_sib_scale(M) (((M)&0xff) >> 6)
#define xed_get_modrm_reg_field(M) (((M)&0x38) >> 3)
enum XedMachineMode {
XED_MACHINE_MODE_INVALID,
XED_MACHINE_MODE_LONG_64,
XED_MACHINE_MODE_LONG_COMPAT_32,
XED_MACHINE_MODE_LONG_COMPAT_16,
XED_MACHINE_MODE_LEGACY_32,
XED_MACHINE_MODE_LEGACY_16,
XED_MACHINE_MODE_REAL,
XED_MACHINE_MODE_UNREAL,
XED_MACHINE_MODE_LAST
};
enum XedError {
XED_ERROR_NONE,
XED_ERROR_BUFFER_TOO_SHORT,
XED_ERROR_GENERAL_ERROR,
XED_ERROR_INVALID_FOR_CHIP,
XED_ERROR_BAD_REGISTER,
XED_ERROR_BAD_LOCK_PREFIX,
XED_ERROR_BAD_REP_PREFIX,
XED_ERROR_BAD_LEGACY_PREFIX,
XED_ERROR_BAD_REX_PREFIX,
XED_ERROR_BAD_EVEX_UBIT,
XED_ERROR_BAD_MAP,
XED_ERROR_BAD_EVEX_V_PRIME,
XED_ERROR_BAD_EVEX_Z_NO_MASKING,
XED_ERROR_NO_OUTPUT_POINTER,
XED_ERROR_NO_AGEN_CALL_BACK_REGISTERED,
XED_ERROR_BAD_MEMOP_INDEX,
XED_ERROR_CALLBACK_PROBLEM,
XED_ERROR_GATHER_REGS,
XED_ERROR_INSTR_TOO_LONG,
XED_ERROR_INVALID_MODE,
XED_ERROR_BAD_EVEX_LL,
XED_ERROR_UNIMPLEMENTED,
XED_ERROR_LAST
};
enum XedAddressWidth {
XED_ADDRESS_WIDTH_INVALID = 0,
XED_ADDRESS_WIDTH_16b = 2,
XED_ADDRESS_WIDTH_32b = 4,
XED_ADDRESS_WIDTH_64b = 8,
XED_ADDRESS_WIDTH_LAST
};
enum XedChip {
XED_CHIP_INVALID = 1,
XED_CHIP_I86 = 2,
XED_CHIP_I86FP = 3,
XED_CHIP_I186 = 4,
XED_CHIP_I186FP = 5,
XED_CHIP_I286REAL = 6,
XED_CHIP_I286 = 7,
XED_CHIP_I2186FP = 8,
XED_CHIP_I386REAL = 9,
XED_CHIP_I386 = 10,
XED_CHIP_I386FP = 11,
XED_CHIP_I486REAL = 12,
XED_CHIP_I486 = 13,
XED_CHIP_PENTIUMREAL = 14,
XED_CHIP_PENTIUM = 15,
XED_CHIP_QUARK = 16,
XED_CHIP_PENTIUMMMXREAL = 17,
XED_CHIP_PENTIUMMMX = 18,
XED_CHIP_ALLREAL = 19,
XED_CHIP_PENTIUMPRO = 20,
XED_CHIP_PENTIUM2 = 21,
XED_CHIP_PENTIUM3 = 22,
XED_CHIP_PENTIUM4 = 23,
XED_CHIP_P4PRESCOTT = 24,
XED_CHIP_P4PRESCOTT_NOLAHF = 25,
XED_CHIP_P4PRESCOTT_VTX = 26,
XED_CHIP_CORE2 = 27,
XED_CHIP_PENRYN = 28,
XED_CHIP_PENRYN_E = 29,
XED_CHIP_NEHALEM = 30,
XED_CHIP_WESTMERE = 31,
XED_CHIP_BONNELL = 32,
XED_CHIP_SALTWELL = 33,
XED_CHIP_SILVERMONT = 34,
XED_CHIP_AMD = 35,
XED_CHIP_GOLDMONT = 36,
XED_CHIP_GOLDMONT_PLUS = 37,
XED_CHIP_TREMONT = 38,
XED_CHIP_SANDYBRIDGE = 39,
XED_CHIP_IVYBRIDGE = 40,
XED_CHIP_HASWELL = 41,
XED_CHIP_BROADWELL = 42,
XED_CHIP_SKYLAKE = 43,
XED_CHIP_SKYLAKE_SERVER = 44,
XED_CHIP_CASCADE_LAKE = 45,
XED_CHIP_KNL = 46,
XED_CHIP_KNM = 47,
XED_CHIP_CANNONLAKE = 48,
XED_CHIP_ICELAKE = 49,
XED_CHIP_ICELAKE_SERVER = 50,
XED_CHIP_FUTURE = 51,
XED_CHIP_ALL = 52,
XED_CHIP_LAST
};
enum XedIsaSet {
XED_ISA_SET_INVALID,
XED_ISA_SET_3DNOW,
XED_ISA_SET_ADOX_ADCX,
XED_ISA_SET_AES,
XED_ISA_SET_AMD,
XED_ISA_SET_AVX,
XED_ISA_SET_AVX2,
XED_ISA_SET_AVX2GATHER,
XED_ISA_SET_AVX512BW_128,
XED_ISA_SET_AVX512BW_128N,
XED_ISA_SET_AVX512BW_256,
XED_ISA_SET_AVX512BW_512,
XED_ISA_SET_AVX512BW_KOP,
XED_ISA_SET_AVX512CD_128,
XED_ISA_SET_AVX512CD_256,
XED_ISA_SET_AVX512CD_512,
XED_ISA_SET_AVX512DQ_128,
XED_ISA_SET_AVX512DQ_128N,
XED_ISA_SET_AVX512DQ_256,
XED_ISA_SET_AVX512DQ_512,
XED_ISA_SET_AVX512DQ_KOP,
XED_ISA_SET_AVX512DQ_SCALAR,
XED_ISA_SET_AVX512ER_512,
XED_ISA_SET_AVX512ER_SCALAR,
XED_ISA_SET_AVX512F_128,
XED_ISA_SET_AVX512F_128N,
XED_ISA_SET_AVX512F_256,
XED_ISA_SET_AVX512F_512,
XED_ISA_SET_AVX512F_KOP,
XED_ISA_SET_AVX512F_SCALAR,
XED_ISA_SET_AVX512PF_512,
XED_ISA_SET_AVX512_4FMAPS_512,
XED_ISA_SET_AVX512_4FMAPS_SCALAR,
XED_ISA_SET_AVX512_4VNNIW_512,
XED_ISA_SET_AVX512_BITALG_128,
XED_ISA_SET_AVX512_BITALG_256,
XED_ISA_SET_AVX512_BITALG_512,
XED_ISA_SET_AVX512_GFNI_128,
XED_ISA_SET_AVX512_GFNI_256,
XED_ISA_SET_AVX512_GFNI_512,
XED_ISA_SET_AVX512_IFMA_128,
XED_ISA_SET_AVX512_IFMA_256,
XED_ISA_SET_AVX512_IFMA_512,
XED_ISA_SET_AVX512_VAES_128,
XED_ISA_SET_AVX512_VAES_256,
XED_ISA_SET_AVX512_VAES_512,
XED_ISA_SET_AVX512_VBMI2_128,
XED_ISA_SET_AVX512_VBMI2_256,
XED_ISA_SET_AVX512_VBMI2_512,
XED_ISA_SET_AVX512_VBMI_128,
XED_ISA_SET_AVX512_VBMI_256,
XED_ISA_SET_AVX512_VBMI_512,
XED_ISA_SET_AVX512_VNNI_128,
XED_ISA_SET_AVX512_VNNI_256,
XED_ISA_SET_AVX512_VNNI_512,
XED_ISA_SET_AVX512_VPCLMULQDQ_128,
XED_ISA_SET_AVX512_VPCLMULQDQ_256,
XED_ISA_SET_AVX512_VPCLMULQDQ_512,
XED_ISA_SET_AVX512_VPOPCNTDQ_128,
XED_ISA_SET_AVX512_VPOPCNTDQ_256,
XED_ISA_SET_AVX512_VPOPCNTDQ_512,
XED_ISA_SET_AVXAES,
XED_ISA_SET_AVX_GFNI,
XED_ISA_SET_BMI1,
XED_ISA_SET_BMI2,
XED_ISA_SET_CET,
XED_ISA_SET_CLDEMOTE,
XED_ISA_SET_CLFLUSHOPT,
XED_ISA_SET_CLFSH,
XED_ISA_SET_CLWB,
XED_ISA_SET_CLZERO,
XED_ISA_SET_CMOV,
XED_ISA_SET_CMPXCHG16B,
XED_ISA_SET_F16C,
XED_ISA_SET_FAT_NOP,
XED_ISA_SET_FCMOV,
XED_ISA_SET_FMA,
XED_ISA_SET_FMA4,
XED_ISA_SET_FXSAVE,
XED_ISA_SET_FXSAVE64,
XED_ISA_SET_GFNI,
XED_ISA_SET_I186,
XED_ISA_SET_I286PROTECTED,
XED_ISA_SET_I286REAL,
XED_ISA_SET_I386,
XED_ISA_SET_I486,
XED_ISA_SET_I486REAL,
XED_ISA_SET_I86,
XED_ISA_SET_INVPCID,
XED_ISA_SET_LAHF,
XED_ISA_SET_LONGMODE,
XED_ISA_SET_LZCNT,
XED_ISA_SET_MONITOR,
XED_ISA_SET_MONITORX,
XED_ISA_SET_MOVBE,
XED_ISA_SET_MOVDIR,
XED_ISA_SET_MPX,
XED_ISA_SET_PAUSE,
XED_ISA_SET_PCLMULQDQ,
XED_ISA_SET_PCONFIG,
XED_ISA_SET_PENTIUMMMX,
XED_ISA_SET_PENTIUMREAL,
XED_ISA_SET_PKU,
XED_ISA_SET_POPCNT,
XED_ISA_SET_PPRO,
XED_ISA_SET_PREFETCHW,
XED_ISA_SET_PREFETCHWT1,
XED_ISA_SET_PREFETCH_NOP,
XED_ISA_SET_PT,
XED_ISA_SET_RDPID,
XED_ISA_SET_RDPMC,
XED_ISA_SET_RDRAND,
XED_ISA_SET_RDSEED,
XED_ISA_SET_RDTSCP,
XED_ISA_SET_RDWRFSGS,
XED_ISA_SET_RTM,
XED_ISA_SET_SGX,
XED_ISA_SET_SGX_ENCLV,
XED_ISA_SET_SHA,
XED_ISA_SET_SMAP,
XED_ISA_SET_SMX,
XED_ISA_SET_SSE,
XED_ISA_SET_SSE2,
XED_ISA_SET_SSE2MMX,
XED_ISA_SET_SSE3,
XED_ISA_SET_SSE3X87,
XED_ISA_SET_SSE4,
XED_ISA_SET_SSE42,
XED_ISA_SET_SSE4A,
XED_ISA_SET_SSEMXCSR,
XED_ISA_SET_SSE_PREFETCH,
XED_ISA_SET_SSSE3,
XED_ISA_SET_SSSE3MMX,
XED_ISA_SET_SVM,
XED_ISA_SET_TBM,
XED_ISA_SET_VAES,
XED_ISA_SET_VMFUNC,
XED_ISA_SET_VPCLMULQDQ,
XED_ISA_SET_VTX,
XED_ISA_SET_WAITPKG,
XED_ISA_SET_WBNOINVD,
XED_ISA_SET_X87,
XED_ISA_SET_XOP,
XED_ISA_SET_XSAVE,
XED_ISA_SET_XSAVEC,
XED_ISA_SET_XSAVEOPT,
XED_ISA_SET_XSAVES,
XED_ISA_SET_LAST
};
enum XedIldMap {
XED_ILD_MAP0,
XED_ILD_MAP1,
XED_ILD_MAP2,
XED_ILD_MAP3,
XED_ILD_MAP4,
XED_ILD_MAP5,
XED_ILD_MAP6,
XED_ILD_MAPAMD,
XED_ILD_MAP_XOP8,
XED_ILD_MAP_XOP9,
XED_ILD_MAP_XOPA,
XED_ILD_MAP_LAST,
XED_ILD_MAP_INVALID
};
struct XedChipFeatures {
uint64_t f[3];
};
struct XedOperands {
uint8_t imm_width;
uint8_t map; /* enum XedIldMap */
uint8_t error; /* enum XedError */
uint8_t mode;
uint8_t rexw;
uint8_t osz;
uint8_t max_bytes;
uint8_t nominal_opcode;
uint8_t out_of_bytes;
uint8_t disp_width;
int64_t disp;
uint64_t uimm0;
enum XedChip chip;
uint8_t amd3dnow;
uint8_t asz;
uint8_t bcrc;
uint8_t cldemote;
uint8_t has_sib;
uint8_t ild_f2;
uint8_t ild_f3;
uint8_t lock;
uint8_t modep5;
uint8_t modep55c;
uint8_t mode_first_prefix;
uint8_t prefix66;
uint8_t realmode;
uint8_t rex;
uint8_t rexb;
uint8_t rexr;
uint8_t rexrr;
uint8_t rexx;
uint8_t ubit;
uint8_t vexdest3;
uint8_t vexdest4;
uint8_t wbnoinvd;
uint8_t zeroing;
uint8_t first_f2f3;
uint8_t has_modrm;
uint8_t last_f2f3;
uint8_t llrc;
uint8_t mod;
uint8_t rep;
uint8_t sibscale;
uint8_t vex_prefix;
uint8_t vl;
uint8_t hint;
uint8_t mask;
uint8_t reg;
uint8_t rm;
uint8_t seg_ovd;
uint8_t sibbase;
uint8_t sibindex;
uint8_t srm;
uint8_t vexdest210;
uint8_t vexvalid;
uint8_t esrc;
uint8_t ild_seg;
uint8_t imm1_bytes;
uint8_t modrm_byte;
uint8_t nprefixes;
uint8_t nrexes;
uint8_t nseg_prefixes;
uint8_t pos_disp;
uint8_t pos_imm;
uint8_t pos_imm1;
uint8_t pos_modrm;
uint8_t pos_nominal_opcode;
uint8_t pos_sib;
uint8_t uimm1;
};
struct XedInst {
uint8_t noperands;
uint8_t cpl;
uint8_t flag_complex;
uint8_t exceptions;
uint16_t flag_info_index;
uint16_t iform_enum;
uint16_t operand_base;
uint16_t attributes;
};
struct XedEncoderIforms {
unsigned x_MEMDISPv;
unsigned x_SIBBASE_ENCODE_SIB1;
unsigned x_VEX_MAP_ENC;
unsigned x_SIB_NT;
unsigned x_UIMM8_1;
unsigned x_SIBBASE_ENCODE;
unsigned x_VEX_ESCVL_ENC;
unsigned x_PREFIX_ENC;
unsigned x_VEXED_REX;
unsigned x_REMOVE_SEGMENT;
unsigned x_VSIB_ENC;
unsigned x_EVEX_REXB_ENC;
unsigned x_MODRM_RM_ENCODE_EA64_SIB0;
unsigned x_VEX_REXXB_ENC;
unsigned x_EVEX_REXRR_ENC;
unsigned x_AVX512_EVEX_BYTE3_ENC;
unsigned x_EVEX_REXW_VVVV_ENC;
unsigned x_VEX_REG_ENC;
unsigned x_SIMM8;
unsigned x_XOP_MAP_ENC;
unsigned x_MODRM_RM_ENCODE_EA32_SIB0;
unsigned x_UIMM8;
unsigned x_MODRM_RM_ENCODE_EA16_SIB0;
unsigned x_XOP_REXXB_ENC;
unsigned x_EVEX_MAP_ENC;
unsigned x_MEMDISP8;
unsigned x_MODRM_RM_ENCODE;
unsigned x_REX_PREFIX_ENC;
unsigned x_UIMM16;
unsigned x_VEX_TYPE_ENC;
unsigned x_EVEX_UPP_ENC;
unsigned x_VEX_REXR_ENC;
unsigned x_BRDISP32;
unsigned x_MEMDISP32;
unsigned x_MEMDISP16;
unsigned x_SIBINDEX_ENCODE;
unsigned x_SE_IMM8;
unsigned x_UIMM32;
unsigned x_SIMMz;
unsigned x_UIMMv;
unsigned x_EVEX_62_REXR_ENC;
unsigned x_DISP_NT;
unsigned x_MODRM_MOD_ENCODE;
unsigned x_MEMDISP;
unsigned x_VSIB_ENC_BASE;
unsigned x_BRDISP8;
unsigned x_BRDISPz;
unsigned x_EVEX_REXX_ENC;
unsigned x_XOP_TYPE_ENC;
};
struct XedEncoderVars {
struct XedEncoderIforms iforms;
unsigned short iform_index;
unsigned ilen;
unsigned olen;
unsigned bit_offset;
};
struct XedDecodedInst {
struct XedOperands operands;
unsigned char decoded_length;
uint8_t *bytes;
};
union XedAvxC4Payload1 {
struct {
unsigned map : 5;
unsigned b_inv : 1;
unsigned x_inv : 1;
unsigned r_inv : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
union XedAvxC4Payload2 {
struct {
unsigned pp : 2;
unsigned l : 1;
unsigned vvv210 : 3;
unsigned v3 : 1;
unsigned w : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
union XedAvxC5Payload {
struct {
unsigned pp : 2;
unsigned l : 1;
unsigned vvv210 : 3;
unsigned v3 : 1;
unsigned r_inv : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
union XedAvx512Payload1 {
struct {
unsigned map : 4;
unsigned rr_inv : 1;
unsigned b_inv : 1;
unsigned x_inv : 1;
unsigned r_inv : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
union XedAvx512Payload2 {
struct {
unsigned pp : 2;
unsigned ubit : 1;
unsigned vexdest210 : 3;
unsigned vexdest3 : 1;
unsigned rexw : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
union XedAvx512Payload3 {
struct {
unsigned mask : 3;
unsigned vexdest4p : 1;
unsigned bcrc : 1;
unsigned llrc : 2;
unsigned z : 1;
unsigned pad : 24;
} s;
unsigned u32;
};
forceinline unsigned char xed_decoded_inst_get_byte(
const struct XedDecodedInst *p, long byte_index) {
return p->bytes[byte_index];
}
forceinline void xed_operands_set_mode(struct XedOperands *p,
enum XedMachineMode mmode) {
p->realmode = 0;
switch (mmode) {
case XED_MACHINE_MODE_LONG_64:
p->mode = 2;
return;
case XED_MACHINE_MODE_LEGACY_32:
case XED_MACHINE_MODE_LONG_COMPAT_32:
p->mode = 1;
break;
case XED_MACHINE_MODE_REAL:
p->realmode = 1;
p->mode = 0;
break;
case XED_MACHINE_MODE_UNREAL:
p->realmode = 1;
p->mode = 1;
break;
case XED_MACHINE_MODE_LEGACY_16:
case XED_MACHINE_MODE_LONG_COMPAT_16:
p->mode = 0;
break;
default:
abort();
}
}
forceinline struct XedDecodedInst *xed_decoded_inst_zero_set_mode(
struct XedDecodedInst *p, enum XedMachineMode mmode) {
memset(p, 0, sizeof(*p));
xed_operands_set_mode(&p->operands, mmode);
return p;
}
extern const uint64_t xed_chip_features[XED_CHIP_LAST][3] hidden;
enum XedError xed_instruction_length_decode(struct XedDecodedInst *,
const unsigned char *, size_t);
bool xed_isa_set_is_valid_for_chip(enum XedIsaSet, enum XedChip);
bool xed_test_chip_features(struct XedChipFeatures *, enum XedIsaSet);
void xed_get_chip_features(struct XedChipFeatures *, enum XedChip);
COSMOPOLITAN_C_END_
#endif /* !(__ASSEMBLER__ + __LINKER__ + 0) */
#endif /* COSMOPOLITAN_THIRD_PARTY_XED_X86_H_ */

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/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
│vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi│
╞══════════════════════════════════════════════════════════════════════════════╡
│ Copyright 2018 Intel Corporation │
│ Copyright 2019 Justine Alexandra Roberts Tunney │
│ │
│ Licensed under the Apache License, Version 2.0 (the "License"); │
│ you may not use this file except in compliance with the License. │
│ You may obtain a copy of the License at │
│ │
│ http://www.apache.org/licenses/LICENSE-2.0 │
│ │
│ Unless required by applicable law or agreed to in writing, software │
│ distributed under the License is distributed on an "AS IS" BASIS, │
│ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. │
│ See the License for the specific language governing permissions and │
│ limitations under the License. │
╚─────────────────────────────────────────────────────────────────────────────*/
#include "third_party/xed/x86.h"
asm(".ident\t\"\\n\\n\
Xed (Apache 2.0)\\n\
Copyright 2018 Intel Corporation\\n\
Copyright 2019 Justine Alexandra Roberts Tunney\\n\
Modifications: Trimmed down to 3kb [2019-03-22 jart]\"");
asm(".include \"libc/disclaimer.inc\"");
/**
* Mapping of enum XedChip -> bitset<enum XedIsaSet>.
*
* See related APIs, e.g. xed_isa_set_is_valid_for_chip().
*
* This information can be reproduced by building Xed and running the C
* preprocessor on xed-chip-features-table.c (see xed-chips.txt) which
* turns several thousand lines of non-evolving code into fifty. For
* example, 0x2800000ul was calculated as: 1UL<<(XED_ISA_SET_I86-64) |
* 1UL<<(XED_ISA_SET_LAHF-64).
*/
const uint64_t xed_chip_features[XED_CHIP_LAST][3] /* clang-format off */
_Section(".text") = {
{0, 0, 0, },
{0, 0x02800000, 0, }, /*I86*/
{0, 0x02800000, 0x02000}, /*I86FP*/
{0, 0x02820000, 0, }, /*I186*/
{0, 0x02820000, 0x02000}, /*I186FP*/
{0, 0x028a0000, 0x02000}, /*I286REAL*/
{0, 0x028e0000, 0x02000}, /*I286*/
{0, 0x028e0000, 0x02000}, /*I2186FP*/
{0, 0x028a0000, 0x02000}, /*I386REAL*/
{0, 0x029e0000, 0x02000}, /*I386*/
{0, 0x029e0000, 0x02000}, /*I386FP*/
{0, 0x02ca0000, 0x02000}, /*I486REAL*/
{0, 0x02fe0000, 0x02000}, /*I486*/
{0, 0x2002ca0000, 0x02000}, /*PENTIUMREAL*/
{0, 0x2002fe0000, 0x02000}, /*PENTIUM*/
{0, 0x2002fe0000, 0x02000}, /*QUARK*/
{0, 0x402002ca0000, 0x02000}, /*PEN..MMXREAL*/
{0, 0x403002fe0000, 0x02000}, /*PENTIUMMMX*/
{0, 0x402002ca0000, 0x02000}, /*ALLREAL*/
{0, 0x492002fe0c80, 0x02000}, /*PENTIUMPRO*/
{0, 0x493002fe4c80, 0x02000}, /*PENTIUM2*/
{0, 0x200493002fe4c80, 0x02006}, /*PENTIUM3*/
{0, 0xe00493202fe4c90, 0x02006}, /*PENTIUM4*/
{0, 0x3e00493216fecd90, 0x02006}, /*P4PRESCOTT*/
{0, 0x3e00493214fecd90, 0x02000}, /*P4PR..NOLAHF*/
{0, 0x3e00493216fecd90, 0x02406}, /*P4PRESC..VTX*/
{0, 0x3f00493216fecd90, 0x0241e}, /*CORE2*/
{0, 0x7f00493216fecd90, 0x0241e}, /*PENRYN*/
{0, 0x7f00493216fecd90, 0x0a41e}, /*PENRYN_E*/
{0, 0xff0249b216fecd90, 0x0241e}, /*NEHALEM*/
{8, 0xff0249b616fecd90, 0x0241e}, /*WESTMERE*/
{0, 0x3e00493256fecd90, 0x0241e}, /*BONNELL*/
{0, 0x3e00493256fecd90, 0x0241e}, /*SALTWELL*/
{8, 0xff02cbb656fecd90, 0x0241e}, /*SILVERMONT*/
{18, 0x00000a0020002040, 0x04061}, /*AMD*/
{8, 0xffc7cbb756fecd98, 0x7a41e}, /*GOLDMONT*/
{8, 0xffd7fbb756fecd98, 0x7a41e}, /*GOLDMONTPLUS*/
{8, 0xfff7fbb7d6ffcdbc, 0x7ac1e}, /*TREMONT*/
{0x2000000000000028, 0xff0249b616fecd90, 0x2a41e}, /*SANDYBRIDGE*/
{0x2000000000000028, 0xff06c9b616fecf90, 0x2a41e}, /*IVYBRIDGE*/
{0xa0000000000000e8, 0xff0ec9b65ffedf91, 0x2a51e}, /*HASWELL*/
{0xa0000000000000ec, 0xff8fcbb65ffedf91, 0x2a51e}, /*BROADWELL*/
{0xa0000000000000ec, 0xff9fcbb75ffedf99, 0x7a51e}, /*SKYLAKE*/
{0xa00000003f3fffec, 0xff9fcbf75ffedfb9, 0x7a51e}, /*SKYL..SERVER*/
{0xa07000003f3fffec, 0xff9fcbf75ffedfb9, 0x7a51e}, /*CASCADE_LAKE*/
{0xa00000007ac080ec, 0xff07cdb65efedf91, 0x2a41e}, /*KNL*/
{0xb0000003fac080ec, 0xff07cdb65efedf91, 0x2a51e}, /*KNM*/
{0xa00e07003f3fffec, 0xffdfcbf75ffedf99, 0x7a51e}, /*CANNONLAKE*/
{0xfffffffc3f3fffec, 0xffdfebf75fffdfb9, 0x7a79e}, /*ICELAKE*/
{0xfffffffc3f3fffec, 0xffffebff5fffdfb9, 0x7b79e}, /*ICEL..SERVER*/
{0xfffffffc3f3fffec, 0xffdffbf75fffdfbb, 0x7a79e}, /*FUTURE*/
{0xfffffffffffffffe, 0xffffffffffffffff, 0x7ffff} /*ALL*/
} /* clang-format on */;

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56
third_party/xed/x86isa.c vendored Normal file
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/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
│vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi│
╞══════════════════════════════════════════════════════════════════════════════╡
│ Copyright 2018 Intel Corporation │
│ Copyright 2019 Justine Alexandra Roberts Tunney │
│ │
│ Licensed under the Apache License, Version 2.0 (the "License"); │
│ you may not use this file except in compliance with the License. │
│ You may obtain a copy of the License at │
│ │
│ http://www.apache.org/licenses/LICENSE-2.0 │
│ │
│ Unless required by applicable law or agreed to in writing, software │
│ distributed under the License is distributed on an "AS IS" BASIS, │
│ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. │
│ See the License for the specific language governing permissions and │
│ limitations under the License. │
╚─────────────────────────────────────────────────────────────────────────────*/
#include "third_party/xed/x86.h"
asm(".ident\t\"\\n\\n\
Xed (Apache 2.0)\\n\
Copyright 2018 Intel Corporation\\n\
Copyright 2019 Justine Alexandra Roberts Tunney\\n\
Modifications: Trimmed down to 3kb [2019-03-22 jart]\"");
asm(".include \"libc/disclaimer.inc\"");
bool xed_isa_set_is_valid_for_chip(enum XedIsaSet isa_set, enum XedChip chip) {
unsigned n, r;
n = isa_set / 64;
r = isa_set - (64 * n);
return !!(xed_chip_features[chip][n] & (1ul << r));
}
bool xed_test_chip_features(struct XedChipFeatures *p, enum XedIsaSet isa_set) {
unsigned n, r;
n = isa_set / 64;
r = isa_set - (64 * n);
return !!(p->f[n] & (1ul << r));
}
void xed_get_chip_features(struct XedChipFeatures *p, enum XedChip chip) {
if (p) {
if (chip < XED_CHIP_LAST) {
p->f[0] = xed_chip_features[chip][0];
p->f[1] = xed_chip_features[chip][1];
p->f[2] = xed_chip_features[chip][2];
p->f[3] = 0;
} else {
p->f[0] = 0;
p->f[1] = 0;
p->f[2] = 0;
p->f[3] = 0;
}
}
}

336
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/*-*- mode:asm; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
│vi: set et ft=asm ts=8 sw=8 fenc=utf-8 :vi│
╞══════════════════════════════════════════════════════════════════════════════╡
│ Copyright 2020 Justine Alexandra Roberts Tunney │
│ │
│ This program is free software; you can redistribute it and/or modify │
│ it under the terms of the GNU General Public License as published by │
│ the Free Software Foundation; version 2 of the License. │
│ │
│ This program is distributed in the hope that it will be useful, but │
│ WITHOUT ANY WARRANTY; without even the implied warranty of │
│ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU │
│ General Public License for more details. │
│ │
│ You should have received a copy of the GNU General Public License │
│ along with this program; if not, write to the Free Software │
│ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA │
│ 02110-1301 USA │
╚─────────────────────────────────────────────────────────────────────────────*/
#include "libc/macros.h"
/ Phash tables for instruction length decoding.
.initbss 300,_init_x86tab
xed_prefix_table_bit:
.zero 32
.endobj xed_prefix_table_bit,globl,hidden
xed_has_modrm_2d:
.zero 512
.endobj xed_has_modrm_2d,globl,hidden
xed_has_disp_regular:
.zero 96
.endobj xed_has_disp_regular,globl,hidden
xed_has_sib_table:
.zero 96
.endobj xed_has_sib_table,globl,hidden
xed_disp_bits_2d:
.zero 512
.endobj xed_disp_bits_2d,globl,hidden
xed_imm_bits_2d:
.zero 512
.endobj xed_imm_bits_2d,globl,hidden
.previous
.initro 300,_init_x86tab # 536 bytes (30%)
xed_prefix_table_bit.rodata:
.byte 4,0x00 # 00─03 ∅─♥
.byte 4,0x40 # 04─07 ♦─•
.byte 2,0xff # 08─09 ◘─○
.byte 2,0x00 # 0a─0b ◙─♂
.byte 1,0xf0 # 0c─0c ♀
.byte 17,0x00 # 0d─1d ♪─↔
.byte 1,0x0d # 1e─1e ▲
.byte 1,0x00 # 1f─1f ▼
.endobj xed_prefix_table_bit.rodata
xed_has_modrm_2d.rodata:
.byte 4,0x01 # 00─03 ∅─♥
.byte 4,0x00 # 04─07 ♦─•
.byte 4,0x01 # 08─0b ◘─♂
.byte 3,0x00 # 0c─0e ♀─♫
.byte 1,0x03 # 0f─0f ☼
.byte 4,0x01 # 10─13 ►─‼
.byte 4,0x00 # 14─17 ─↨
.byte 4,0x01 # 18─1b ↑─←
.byte 4,0x00 # 1c─1f ∟─▼
.byte 4,0x01 # 20─23 ─#
.byte 2,0x00 # 24─25 $─%
.byte 1,0x03 # 26─26 &
.byte 1,0x00 # 27─27 '
.byte 4,0x01 # 28─2b (─+
.byte 2,0x00 # 2c─2d ,──
.byte 1,0x03 # 2e─2e .
.byte 1,0x00 # 2f─2f /
.byte 4,0x01 # 30─33 0─3
.byte 2,0x00 # 34─35 4─5
.byte 1,0x03 # 36─36 6
.byte 1,0x00 # 37─37 7
.byte 4,0x01 # 38─3b 8─;
.byte 2,0x00 # 3c─3d <─=
.byte 1,0x03 # 3e─3e >
.byte 35,0x00 # 3f─61 ?─a
.byte 2,0x01 # 62─63 b─c
.byte 4,0x03 # 64─67 d─g
.byte 1,0x00 # 68─68 h
.byte 1,0x01 # 69─69 i
.byte 1,0x00 # 6a─6a j
.byte 1,0x01 # 6b─6b k
.byte 20,0x00 # 6c─7f l─⌂
.byte 16,0x01 # 80─8f Ç─Å
.byte 48,0x00 # 90─bf É─┐
.byte 2,0x01 # c0─c1 └─┴
.byte 2,0x00 # c2─c3 ┬─├
.byte 4,0x01 # c4─c7 ──╟
.byte 8,0x00 # c8─cf ╚─╧
.byte 4,0x01 # d0─d3 ╨─╙
.byte 4,0x00 # d4─d7 ╘─╫
.byte 8,0x01 # d8─df ╪─▀
.byte 16,0x00 # e0─ef α─∩
.byte 1,0x03 # f0─f0 ≡
.byte 1,0x00 # f1─f1 ±
.byte 2,0x03 # f2─f3 ≥─≤
.byte 2,0x00 # f4─f5 ⌠─⌡
.byte 2,0x01 # f6─f7 ÷─≈
.byte 6,0x00 # f8─fd °─²
.byte 6,0x01 # fe─103
.byte 1,0x03 # 104─104
.byte 5,0x00 # 105─109
.byte 1,0x03 # 10a─10a
.byte 1,0x00 # 10b─10b
.byte 1,0x03 # 10c─10c
.byte 1,0x01 # 10d─10d
.byte 1,0x00 # 10e─10e
.byte 1,0x03 # 10f─10f
.byte 16,0x01 # 110─11f
.byte 4,0x02 # 120─123
.byte 4,0x03 # 124─127
.byte 8,0x01 # 128─12f
.byte 6,0x00 # 130─135
.byte 1,0x03 # 136─136
.byte 1,0x00 # 137─137
.byte 8,0x03 # 138─13f
.byte 55,0x01 # 140─176
.byte 1,0x00 # 177─177
.byte 8,0x01 # 178─17f
.byte 16,0x00 # 180─18f
.byte 16,0x01 # 190─19f
.byte 3,0x00 # 1a0─1a2
.byte 3,0x01 # 1a3─1a5
.byte 2,0x03 # 1a6─1a7
.byte 3,0x00 # 1a8─1aa
.byte 29,0x01 # 1ab─1c7
.byte 8,0x00 # 1c8─1cf
.byte 48,0x01 # 1d0─1ff
.endobj xed_has_modrm_2d.rodata
xed_has_disp_regular.rodata:
.byte 6,0x00 # 00─05 ∅─♣
.byte 1,0x02 # 06─06 ♠
.byte 1,0x00 # 07─07 •
.byte 8,0x01 # 08─0f ◘─☼
.byte 8,0x02 # 10─17 ►─↨
.byte 13,0x00 # 18─24 ↑─$
.byte 1,0x04 # 25─25 %
.byte 2,0x00 # 26─27 &─'
.byte 8,0x01 # 28─2f (─/
.byte 8,0x04 # 30─37 0─7
.byte 13,0x00 # 38─44 8─D
.byte 1,0x04 # 45─45 E
.byte 2,0x00 # 46─47 F─G
.byte 8,0x01 # 48─4f H─O
.byte 8,0x04 # 50─57 P─W
.byte 8,0x00 # 58─5f X─_
.endobj xed_has_disp_regular.rodata
xed_has_sib_table.rodata:
.byte 36,0x00 # 00─23 ∅─#
.byte 1,0x01 # 24─24 $
.byte 7,0x00 # 25─2b %─+
.byte 1,0x01 # 2c─2c ,
.byte 7,0x00 # 2d─33 ──3
.byte 1,0x01 # 34─34 4
.byte 15,0x00 # 35─43 5─C
.byte 1,0x01 # 44─44 D
.byte 7,0x00 # 45─4b E─K
.byte 1,0x01 # 4c─4c L
.byte 7,0x00 # 4d─53 M─S
.byte 1,0x01 # 54─54 T
.byte 11,0x00 # 55─5f U─_
.endobj xed_has_sib_table.rodata
xed_disp_bits_2d.rodata:
.byte 15,0x04 # 00─0e ∅─♫
.byte 1,0x00 # 0f─0f ☼
.byte 22,0x04 # 10─25 ►─%
.byte 1,0x00 # 26─26 &
.byte 7,0x04 # 27─2d '──
.byte 1,0x00 # 2e─2e .
.byte 7,0x04 # 2f─35 /─5
.byte 1,0x00 # 36─36 6
.byte 7,0x04 # 37─3d 7─=
.byte 1,0x00 # 3e─3e >
.byte 37,0x04 # 3f─63 ?─c
.byte 4,0x00 # 64─67 d─g
.byte 8,0x04 # 68─6f h─o
.byte 16,0x01 # 70─7f p─⌂
.byte 26,0x04 # 80─99 Ç─Ö
.byte 1,0x02 # 9a─9a Ü
.byte 5,0x04 # 9b─9f ¢─ƒ
.byte 4,0x05 # a0─a3 á─ú
.byte 35,0x04 # a4─c6 ñ─╞
.byte 1,0x06 # c7─c7 ╟
.byte 24,0x04 # c8─df ╚─▀
.byte 4,0x01 # e0─e3 α─π
.byte 4,0x04 # e4─e7 Σ─τ
.byte 2,0x03 # e8─e9 Φ─Θ
.byte 1,0x02 # ea─ea Ω
.byte 1,0x01 # eb─eb δ
.byte 4,0x04 # ec─ef ∞─∩
.byte 1,0x00 # f0─f0 ≡
.byte 1,0x04 # f1─f1 ±
.byte 2,0x00 # f2─f3 ≥─≤
.byte 16,0x04 # f4─103
.byte 1,0x00 # 104─104
.byte 5,0x04 # 105─109
.byte 1,0x00 # 10a─10a
.byte 1,0x04 # 10b─10b
.byte 1,0x00 # 10c─10c
.byte 2,0x04 # 10d─10e
.byte 1,0x00 # 10f─10f
.byte 20,0x04 # 110─123
.byte 4,0x00 # 124─127
.byte 14,0x04 # 128─135
.byte 1,0x00 # 136─136
.byte 1,0x04 # 137─137
.byte 8,0x00 # 138─13f
.byte 64,0x04 # 140─17f
.byte 16,0x03 # 180─18f
.byte 22,0x04 # 190─1a5
.byte 2,0x00 # 1a6─1a7
.byte 88,0x04 # 1a8─1ff
.endobj xed_disp_bits_2d.rodata
xed_imm_bits_2d.rodata:
.byte 4,0x01 # 00─03 ∅─♥
.byte 1,0x05 # 04─04 ♦
.byte 1,0x07 # 05─05 ♣
.byte 6,0x01 # 06─0b ♠─♂
.byte 1,0x09 # 0c─0c ♀
.byte 1,0x07 # 0d─0d ♪
.byte 1,0x01 # 0e─0e ♫
.byte 1,0x00 # 0f─0f ☼
.byte 4,0x01 # 10─13 ►─‼
.byte 1,0x05 # 14─14
.byte 1,0x07 # 15─15 §
.byte 6,0x01 # 16─1b ▬─←
.byte 1,0x05 # 1c─1c ∟
.byte 1,0x07 # 1d─1d ↔
.byte 6,0x01 # 1e─23 ▲─#
.byte 1,0x05 # 24─24 $
.byte 1,0x07 # 25─25 %
.byte 1,0x00 # 26─26 &
.byte 5,0x01 # 27─2b '─+
.byte 1,0x05 # 2c─2c ,
.byte 1,0x07 # 2d─2d ─
.byte 1,0x00 # 2e─2e .
.byte 5,0x01 # 2f─33 /─3
.byte 1,0x09 # 34─34 4
.byte 1,0x07 # 35─35 5
.byte 1,0x00 # 36─36 6
.byte 5,0x01 # 37─3b 7─;
.byte 1,0x05 # 3c─3c <
.byte 1,0x07 # 3d─3d =
.byte 1,0x00 # 3e─3e >
.byte 37,0x01 # 3f─63 ?─c
.byte 4,0x00 # 64─67 d─g
.byte 1,0x06 # 68─68 h
.byte 1,0x07 # 69─69 i
.byte 2,0x05 # 6a─6b j─k
.byte 20,0x01 # 6c─7f l─⌂
.byte 1,0x05 # 80─80 Ç
.byte 1,0x07 # 81─81 ü
.byte 2,0x05 # 82─83 é─â
.byte 22,0x01 # 84─99 ä─Ö
.byte 1,0x08 # 9a─9a Ü
.byte 13,0x01 # 9b─a7 ¢─º
.byte 1,0x05 # a8─a8 ¿
.byte 1,0x07 # a9─a9 ⌐
.byte 6,0x01 # aa─af ¬─»
.byte 8,0x09 # b0─b7 ░─╖
.byte 8,0x0a # b8─bf ╕─┐
.byte 2,0x09 # c0─c1 └─┴
.byte 1,0x08 # c2─c2 ┬
.byte 3,0x01 # c3─c5 ├─┼
.byte 1,0x09 # c6─c6 ╞
.byte 1,0x02 # c7─c7 ╟
.byte 1,0x0b # c8─c8 ╚
.byte 1,0x01 # c9─c9 ╔
.byte 1,0x08 # ca─ca ╩
.byte 2,0x01 # cb─cc ╦─╠
.byte 1,0x09 # cd─cd ═
.byte 6,0x01 # ce─d3 ╬─╙
.byte 2,0x09 # d4─d5 ╘─╒
.byte 14,0x01 # d6─e3 ╓─π
.byte 4,0x09 # e4─e7 Σ─τ
.byte 2,0x01 # e8─e9 Φ─Θ
.byte 1,0x08 # ea─ea Ω
.byte 5,0x01 # eb─ef δ─∩
.byte 1,0x00 # f0─f0 ≡
.byte 1,0x01 # f1─f1 ±
.byte 2,0x00 # f2─f3 ≥─≤
.byte 2,0x01 # f4─f5 ⌠─⌡
.byte 1,0x03 # f6─f6 ÷
.byte 1,0x04 # f7─f7 ≈
.byte 12,0x01 # f8─103
.byte 1,0x00 # 104─104
.byte 5,0x01 # 105─109
.byte 1,0x00 # 10a─10a
.byte 1,0x01 # 10b─10b
.byte 1,0x00 # 10c─10c
.byte 2,0x01 # 10d─10e
.byte 1,0x00 # 10f─10f
.byte 20,0x01 # 110─123
.byte 4,0x00 # 124─127
.byte 14,0x01 # 128─135
.byte 1,0x00 # 136─136
.byte 1,0x01 # 137─137
.byte 8,0x00 # 138─13f
.byte 48,0x01 # 140─16f
.byte 4,0x09 # 170─173
.byte 4,0x01 # 174─177
.byte 1,0x0c # 178─178
.byte 43,0x01 # 179─1a3
.byte 1,0x09 # 1a4─1a4
.byte 1,0x01 # 1a5─1a5
.byte 2,0x00 # 1a6─1a7
.byte 4,0x01 # 1a8─1ab
.byte 1,0x09 # 1ac─1ac
.byte 13,0x01 # 1ad─1b9
.byte 1,0x09 # 1ba─1ba
.byte 7,0x01 # 1bb─1c1
.byte 1,0x09 # 1c2─1c2
.byte 1,0x01 # 1c3─1c3
.byte 3,0x09 # 1c4─1c6
.byte 57,0x01 # 1c7─1ff
.endobj xed_imm_bits_2d.rodata
.byte 0,0 # terminator
.byte 0,0,0,0,0,0 # padding
.previous
.init.start 300,_init_x86tab
call rldecode
lodsl
lodsw
.init.end 300,_init_x86tab

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#-*-mode:makefile-gmake;indent-tabs-mode:t;tab-width:8;coding:utf-8-*-┐
#───vi: set et ft=make ts=8 tw=8 fenc=utf-8 :vi───────────────────────┘
#
# SYNOPSIS
#
# Cosmopolitan x86 Instruction Decoding
#
# DESCRIPTION
#
# See test/libc/x86ild_test.c for more information.
PKGS += THIRD_PARTY_XED
THIRD_PARTY_XED_ARTIFACTS += THIRD_PARTY_XED_A
THIRD_PARTY_XED = $(THIRD_PARTY_XED_A_DEPS) $(THIRD_PARTY_XED_A)
THIRD_PARTY_XED_A = o/$(MODE)/third_party/xed/xed.a
THIRD_PARTY_XED_A_FILES := $(wildcard third_party/xed/*)
THIRD_PARTY_XED_A_HDRS = $(filter %.h,$(THIRD_PARTY_XED_A_FILES))
THIRD_PARTY_XED_A_SRCS_S = $(filter %.S,$(THIRD_PARTY_XED_A_FILES))
THIRD_PARTY_XED_A_SRCS_C = $(filter %.c,$(THIRD_PARTY_XED_A_FILES))
THIRD_PARTY_XED_A_SRCS = \
$(THIRD_PARTY_XED_A_SRCS_S) \
$(THIRD_PARTY_XED_A_SRCS_C)
THIRD_PARTY_XED_A_OBJS = \
$(THIRD_PARTY_XED_A_SRCS:%=o/$(MODE)/%.zip.o) \
$(THIRD_PARTY_XED_A_SRCS_S:%.S=o/$(MODE)/%.o) \
$(THIRD_PARTY_XED_A_SRCS_C:%.c=o/$(MODE)/%.o)
THIRD_PARTY_XED_A_CHECKS = \
$(THIRD_PARTY_XED_A).pkg \
$(THIRD_PARTY_XED_A_HDRS:%=o/$(MODE)/%.ok)
THIRD_PARTY_XED_A_DIRECTDEPS = \
LIBC_NEXGEN32E \
LIBC_STUBS \
LIBC_STR
THIRD_PARTY_XED_A_DEPS := \
$(call uniq,$(foreach x,$(THIRD_PARTY_XED_A_DIRECTDEPS),$($(x))))
o//third_party/xed/x86ild.greg.o: \
OVERRIDE_CFLAGS += \
-Os
$(THIRD_PARTY_XED_A): \
third_party/xed/ \
$(THIRD_PARTY_XED_A).pkg \
$(THIRD_PARTY_XED_A_OBJS)
$(THIRD_PARTY_XED_A).pkg: \
$(THIRD_PARTY_XED_A_OBJS) \
$(foreach x,$(THIRD_PARTY_XED_A_DIRECTDEPS),$($(x)_A).pkg)
HIRD_PARTY_XED_LIBS = $(foreach x,$(THIRD_PARTY_XED_ARTIFACTS),$($(x)))
THIRD_PARTY_XED_SRCS = $(foreach x,$(THIRD_PARTY_XED_ARTIFACTS),$($(x)_SRCS))
THIRD_PARTY_XED_HDRS = $(foreach x,$(THIRD_PARTY_XED_ARTIFACTS),$($(x)_HDRS))
THIRD_PARTY_XED_CHECKS = $(foreach x,$(THIRD_PARTY_XED_ARTIFACTS),$($(x)_CHECKS))
THIRD_PARTY_XED_OBJS = $(foreach x,$(THIRD_PARTY_XED_ARTIFACTS),$($(x)_OBJS))
$(THIRD_PARTY_XED_OBJS): $(BUILD_FILES) third_party/xed/xed.mk
.PHONY: o/$(MODE)/third_party/xed
o/$(MODE)/third_party/xed: $(THIRD_PARTY_XED_CHECKS)