Make progress towards aarch64 build

This commit is contained in:
Justine Tunney 2023-05-01 19:43:59 -07:00
parent 08ff26c817
commit ca2860947f
No known key found for this signature in database
GPG key ID: BE714B4575D6E328
15428 changed files with 25694 additions and 23138 deletions

23
libc/nexgen32e/auxv2.c Normal file
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@ -0,0 +1,23 @@
/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi
Copyright 2023 Justine Alexandra Roberts Tunney
Permission to use, copy, modify, and/or distribute this software for
any purpose with or without fee is hereby granted, provided that the
above copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
*/
#include "libc/runtime/runtime.h"
#ifdef __aarch64__
unsigned long *__auxv;
#endif

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@ -21,7 +21,7 @@
// Environment variable pointer list.
.bss
.align 8
.balign 8
environ:
.quad 0
.endobj environ,globl

23
libc/nexgen32e/environ2.c Normal file
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@ -0,0 +1,23 @@
/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi
Copyright 2023 Justine Alexandra Roberts Tunney
Permission to use, copy, modify, and/or distribute this software for
any purpose with or without fee is hereby granted, provided that the
above copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
*/
#include "libc/runtime/runtime.h"
#ifdef __aarch64__
char **environ;
#endif

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@ -30,7 +30,7 @@ imapxlatab:
pushpop 32,%rcx
mov $0x0706050403020100,%rax
mov $0x0808080808080808,%rdx
.align 8
.balign 8
1: stosq
add %rdx,%rax
.loop 1b

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@ -18,7 +18,7 @@
*/
#include "libc/macros.internal.h"
.rodata
.align 16
.balign 16
// ibm cp437 unicode table w/ string literal safety
//

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@ -19,7 +19,7 @@
#include "libc/macros.internal.h"
.rodata
.align 64
.balign 64
kSha256:
.long 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
.long 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5

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@ -19,7 +19,7 @@
#include "libc/macros.internal.h"
.rodata
.align 64
.balign 64
kSha512:
.quad 0x428a2f98d728ae22,0x7137449123ef65cd
.quad 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc

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@ -47,6 +47,10 @@ o/$(MODE)/libc/nexgen32e/threaded.o: private \
$(NO_MAGIC) \
-fno-sanitize=all
# these assembly files are safe to build on aarch64
o/$(MODE)/libc/nexgen32e/kreversebits.o: libc/nexgen32e/kreversebits.S
@$(COMPILE) -AOBJECTIFY.S $(OBJECTIFY.S) $(OUTPUT_OPTION) -c $<
LIBC_NEXGEN32E_LIBS = $(foreach x,$(LIBC_NEXGEN32E_ARTIFACTS),$($(x)))
LIBC_NEXGEN32E_SRCS = $(foreach x,$(LIBC_NEXGEN32E_ARTIFACTS),$($(x)_SRCS))
LIBC_NEXGEN32E_HDRS = $(foreach x,$(LIBC_NEXGEN32E_ARTIFACTS),$($(x)_HDRS))

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@ -32,12 +32,21 @@ COSMOPOLITAN_C_START_
#define mfence_lfence_rdtsc_lfence() \
__RDTSC("mfence\n\tlfence\n\trdtsc\n\tlfence")
#ifdef __x86__
#define __RDTSC(ASM) \
({ \
uint64_t Rax, Rdx; \
asm volatile(ASM : "=a"(Rax), "=d"(Rdx) : /* no inputs */ : "memory"); \
Rdx << 32 | Rax; \
})
#elif defined(__aarch64__)
#define __RDTSC(ASM) \
({ \
uint64_t _Ts; \
asm volatile("mrs\t%0,cntvct_el0" : "=r"(_Ts)); \
_Ts * 48; /* the fudge factor */ \
})
#endif
COSMOPOLITAN_C_END_
#endif /* !(__ASSEMBLER__ + __LINKER__ + 0) */

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@ -432,7 +432,7 @@ Copyright 2014 Intel Corporation\n"
ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 4, 128
xchg WK_BUF, PRECALC_BUF
.align 32
.balign 32
.L_loop:
// code loops through more than one block
@ -440,10 +440,10 @@ Copyright 2014 Intel Corporation\n"
// it is set below by: cmovae BUFFER_PTR, K_BASE
test BLOCKS_CTR, BLOCKS_CTR
jnz .L_begin
.align 32
.balign 32
jmp .L_end
.align 32
.balign 32
.L_begin:
// process first block
@ -562,7 +562,7 @@ Copyright 2014 Intel Corporation\n"
jmp .L_loop
.align 32
.balign 32
.L_end:
.endm
@ -574,7 +574,7 @@ Copyright 2014 Intel Corporation\n"
#define K3 0x8f1bbcdc
#define K4 0xca62c1d6
.align 128
.balign 128
K_XMM_AR:
.long K1,K1,K1,K1
.long K1,K1,K1,K1

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@ -34,7 +34,7 @@
#include "libc/macros.internal.h"
.text
.align 32
.balign 32
.ident "\n\
Intel SHA-NI (BSD-3 License)\n\
Copyright 2015 Intel Corporation\n\
@ -276,11 +276,11 @@ sha1_transform_ni:
.endfn sha1_transform_ni,globl
.section .rodata.cst16.PSHUFFLE_BYTE_FLIP_MASK, "aM", @progbits, 16
.align 16
.balign 16
PSHUFFLE_BYTE_FLIP_MASK:
.octa 0x000102030405060708090a0b0c0d0e0f
.section .rodata.cst16.UPPER_WORD_MASK, "aM", @progbits, 16
.align 16
.balign 16
UPPER_WORD_MASK:
.octa 0xFFFFFFFF000000000000000000000000

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@ -529,7 +529,7 @@ STACK_SIZE = _RSP + _RSP_SIZE
## arg 3 : Num blocks
########################################################################
.text
.align 32
.balign 32
sha256_transform_rorx:
push %rbp
mov %rsp,%rbp
@ -596,7 +596,7 @@ sha256_transform_rorx:
## schedule 48 input dwords, by doing 3 rounds of 12 each
xor SRND, SRND
.align 16
.balign 16
.Loop1:
vpaddd kSha256x2+0*32(SRND), X0, XFER
vmovdqa XFER, 0*32+_XFER(%rsp, SRND)
@ -652,7 +652,7 @@ sha256_transform_rorx:
#### Do second block using previously scheduled results
xor SRND, SRND
.align 16
.balign 16
.Loop3:
DO_4ROUNDS _XFER + 0*32 + 16
DO_4ROUNDS _XFER + 1*32 + 16
@ -739,7 +739,7 @@ _SHUF_DC00:
.octa 0x0b0a090803020100FFFFFFFFFFFFFFFF
.bss
.align 64
.balign 64
kSha256x2:
.zero 512
.endobj kSha256x2,globl

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@ -34,7 +34,7 @@
#include "libc/macros.internal.h"
.text
.align 32
.balign 32
.ident "\n\
Intel SHA-NI (BSD-3 License)\n\
Copyright 2015 Intel Corporation\n\
@ -312,7 +312,7 @@ sha256_transform_ni:
.endfn sha256_transform_ni,globl
.section .rodata.cst16.PSHUFFLE_BYTE_FLIP_MASK,"aM",@progbits,16
.align 16
.balign 16
PSHUFFLE_BYTE_FLIP_MASK:
.octa 0x0c0d0e0f08090a0b0405060700010203
.endobj PSHUFFLE_BYTE_FLIP_MASK

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@ -622,7 +622,7 @@ sha512_transform_rorx:
## schedule 64 input dwords, by doing 12 rounds of 4 each
movq $4, frame_SRND(%rsp)
.align 16
.balign 16
.Loop1:
vpaddq (TBL), Y_0, XFER
vmovdqa XFER, frame_XFER(%rsp)

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@ -118,7 +118,7 @@ wmemchr:.leafprologue
// @param r10 masks result on chars exhausted (for length v. NULL)
// @return rax end pointer after r8/r9/r10 modifications
wcssak: lea -4(%rdi),%rax
.align 16
.balign 16
1: add $4,%rax
sub $1,%rsi
jb .Lend

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@ -1,5 +1,6 @@
#ifndef COSMOPOLITAN_LIBC_NEXGEN32E_X86FEATURE_H_
#define COSMOPOLITAN_LIBC_NEXGEN32E_X86FEATURE_H_
#ifdef __x86_64__
#include "libc/nexgen32e/kcpuids.h"
#include "libc/nexgen32e/x86compiler.h"
@ -248,4 +249,8 @@
#define _X86_HOOK__(X) X
#else
#define X86_HAVE(FEATURE) 0
#define X86_NEED(FEATURE) 0
#endif /* __x86_64__ */
#endif /* COSMOPOLITAN_LIBC_NEXGEN32E_X86FEATURE_H_ */