Make progress towards aarch64 build

This commit is contained in:
Justine Tunney 2023-05-01 19:43:59 -07:00
parent 08ff26c817
commit ca2860947f
No known key found for this signature in database
GPG key ID: BE714B4575D6E328
15428 changed files with 25694 additions and 23138 deletions

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@ -53,7 +53,7 @@ cosmo: push %rbp
// Section 3.4.1: Initial Stack and Register State
fldcw 1f(%rip)
.rodata
.align 2
.balign 2
// 8087 FPU Control Word
// IM: Invalid Operation
// DM: Denormal Operand

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@ -140,8 +140,10 @@ void __enable_tls(void) {
// ask the operating system to change the x86 segment register
__set_tls(tib);
#ifdef __x86_64__
// rewrite the executable tls opcodes in memory
__morph_tls();
#endif
// we are now allowed to use tls
__tls_enabled = true;

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@ -1,32 +0,0 @@
/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi
Copyright 2021 Justine Alexandra Roberts Tunney
Permission to use, copy, modify, and/or distribute this software for
any purpose with or without fee is hereby granted, provided that the
above copyright notice and this permission notice appear in all copies.
THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
*/
#include "libc/runtime/fenv.h"
/**
* Returns rounding mode.
*
* This implementation retrieves it from the x87 FPU control word.
*
* @see fesetround() for changing this
*/
int fegetround(void) {
uint16_t x87cw;
asm("fnstcw\t%0" : "=m"(x87cw));
return x87cw & 0x0c00;
}

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@ -1,11 +1,7 @@
#ifndef COSMOPOLITAN_LIBC_RUNTIME_FENV_H_
#define COSMOPOLITAN_LIBC_RUNTIME_FENV_H_
#define FE_TONEAREST 0x0000
#define FE_DOWNWARD 0x0400
#define FE_UPWARD 0x0800
#define FE_TOWARDZERO 0x0c00
#ifdef __x86_64__
#define FE_INVALID 1
#define __FE_DENORM 2
#define FE_DIVBYZERO 4
@ -13,6 +9,22 @@
#define FE_UNDERFLOW 16
#define FE_INEXACT 32
#define FE_ALL_EXCEPT 63
#define FE_TONEAREST 0x0000
#define FE_DOWNWARD 0x0400
#define FE_UPWARD 0x0800
#define FE_TOWARDZERO 0x0c00
#elif defined(__aarch64__)
#define FE_INVALID 1
#define FE_DIVBYZERO 2
#define FE_OVERFLOW 4
#define FE_UNDERFLOW 8
#define FE_INEXACT 16
#define FE_ALL_EXCEPT 31
#define FE_TONEAREST 0
#define FE_DOWNWARD 0x800000
#define FE_UPWARD 0x400000
#define FE_TOWARDZERO 0xc00000
#endif
#ifdef __FLT_EVAL_METHOD__
#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__

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@ -18,19 +18,17 @@
*/
#include "libc/runtime/fenv.h"
int __flt_rounds(void) {
int x87cw;
asm("fnstcw\t%0" : "=m"(x87cw));
switch ((x87cw & 0x0c00) >> 10) {
case FE_TOWARDZERO >> 10:
int __flt_rounds() {
switch (fegetround()) {
case FE_TOWARDZERO:
return 0;
case FE_TONEAREST >> 10:
case FE_TONEAREST:
return 1;
case FE_UPWARD >> 10:
case FE_UPWARD:
return 2;
case FE_DOWNWARD >> 10:
case FE_DOWNWARD:
return 3;
default:
unreachable;
return -1;
}
}

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@ -16,7 +16,6 @@
TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
PERFORMANCE OF THIS SOFTWARE.
*/
#include "libc/intrin/lockxchg.h"
#include "libc/mem/mem.h"
#include "libc/runtime/runtime.h"
@ -24,8 +23,8 @@
void free_s(void *v) {
void **pp = (void **)v;
void *p = NULL;
lockxchg(pp, &p);
void *p = *pp;
*pp = 0;
if (_isheap(p)) {
_weakfree(p);
}

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@ -83,7 +83,7 @@ _woot: leave
.type __init_rodata_end,@object
.globl __init_rodata_start,__init_rodata_end
.hidden __init_rodata_start,__init_rodata_end
.align __SIZEOF_POINTER__
.balign __SIZEOF_POINTER__
.underrun
__init_rodata_start:
.previous/*
@ -108,7 +108,7 @@ __init_rodata_end:
.type __init_bss_end,@object
.globl __init_bss_start,__init_bss_end
.hidden __init_bss_start,__init_bss_end
.align __SIZEOF_POINTER__
.balign __SIZEOF_POINTER__
.underrun
__init_bss_start:
.previous/*

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@ -38,8 +38,33 @@
__msabi extern typeof(VirtualProtect) *const __imp_VirtualProtect;
static inline int __morph_rt_sigprocmask(int h, const sigset_t *s, sigset_t *o,
size_t c) {
#ifdef __aarch64__
register long r0 asm("x0") = (long)h;
register long r1 asm("x1") = (long)s;
register long r2 asm("x2") = (long)o;
register long r3 asm("x3") = (long)c;
register long res_x0 asm("x0");
asm volatile("mov\tx8,%1\n"
"svc\t0"
: "=r"(res_x0)
: "i"(135), "r"(r0), "r"(r1), "r"(r2), "r"(r3)
: "x8", "memory");
return res_x0;
#else
return 0;
#endif
}
static inline int __morph_sigprocmask(int how, const sigset_t *set,
sigset_t *oldset) {
return __morph_rt_sigprocmask(how, set, oldset, sizeof(*set));
}
static privileged void __morph_mprotect(void *addr, size_t size, int prot,
int ntprot) {
#ifdef __x86_64__
bool cf;
int ax, dx;
uint32_t op;
@ -60,6 +85,18 @@ static privileged void __morph_mprotect(void *addr, size_t size, int prot,
} else {
__imp_VirtualProtect(addr, size, ntprot, &op);
}
#elif defined(__aarch64__)
register long r0 asm("x0") = (long)addr;
register long r1 asm("x1") = (long)size;
register long r2 asm("x2") = (long)prot;
register long res_x0 asm("x0");
asm volatile("mov\tx8,%1\n"
"svc\t0"
: "=r"(res_x0)
: "i"(226), "r"(r0), "r"(r1), "r"(r2)
: "x8", "memory");
_npassert(!res_x0);
#endif
}
/**
@ -73,6 +110,7 @@ privileged void __morph_begin(sigset_t *save) {
intptr_t dx;
sigset_t ss = {{-1, -1}};
STRACE("__morph_begin()");
#ifdef __x86_64__
if (IsOpenbsd()) {
asm volatile(CFLAG_ASM("syscall")
: CFLAG_CONSTRAINT(cf), "=a"(ax), "=d"(dx)
@ -88,6 +126,9 @@ privileged void __morph_begin(sigset_t *save) {
: "rcx", "r8", "r9", "r10", "r11", "memory", "cc");
_npassert(!ax);
}
#else
__morph_sigprocmask(SIG_BLOCK, &ss, save);
#endif
__morph_mprotect(_base, __privileged_addr - _base, PROT_READ | PROT_WRITE,
kNtPageWritecopy);
}
@ -101,6 +142,7 @@ privileged void __morph_end(sigset_t *save) {
bool cf;
__morph_mprotect(_base, __privileged_addr - _base, PROT_READ | PROT_EXEC,
kNtPageExecuteRead);
#ifdef __x86_64__
if (IsOpenbsd()) {
asm volatile(CFLAG_ASM("syscall")
: CFLAG_CONSTRAINT(cf), "=a"(ax), "=d"(dx)
@ -115,5 +157,8 @@ privileged void __morph_end(sigset_t *save) {
: "rcx", "r8", "r9", "r10", "r11", "memory", "cc");
_npassert(!ax);
}
#else
__morph_sigprocmask(SIG_SETMASK, save, 0);
#endif
STRACE("__morph_end()");
}

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@ -26,6 +26,7 @@
typedef char xmm_t __attribute__((__vector_size__(16), __aligned__(1)));
privileged void __morph_tls(void) {
#ifdef __x86_64__
// We need to rewrite SysV _Thread_local code. You MUST use the
// -mno-tls-direct-seg-refs flag which generates code like this
//
@ -115,4 +116,5 @@ privileged void __morph_tls(void) {
__morph_end(&mask);
}
#endif
}

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@ -67,7 +67,7 @@ $(LIBC_RUNTIME_A).pkg: \
o/$(MODE)/libc/runtime/ftracer.o: private \
OVERRIDE_CFLAGS += \
-x-no-pg \
-mno-fentry \
$(MNO_FENTRY) \
-ffreestanding \
-fno-sanitize=all

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@ -27,6 +27,7 @@
int sys_set_tls();
void __set_tls(struct CosmoTib *tib) {
#ifdef __x86_64__
// ask the operating system to change the x86 segment register
int ax, dx;
if (IsWindows()) {
@ -56,4 +57,7 @@ void __set_tls(struct CosmoTib *tib) {
: "c"(MSR_IA32_FS_BASE), "a"((uint32_t)val),
"d"((uint32_t)(val >> 32)));
}
#else
asm volatile("msr\ttpidr_el0,%0" : /* no outputs */ : "r"(tib + 1));
#endif
}

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@ -98,6 +98,7 @@ extern char ape_stack_align[] __attribute__((__weak__));
#define GetStackAddr() \
(((intptr_t)__builtin_frame_address(0) - 1) & -GetStackSize())
#ifdef __x86_64__
/**
* Returns preferred bottom address of stack.
*
@ -116,6 +117,9 @@ extern char ape_stack_align[] __attribute__((__weak__));
: "i"(ADDEND)); \
vAddr; \
})
#else
#define GetStaticStackAddr(ADDEND) (GetStackAddr() + ADDEND)
#endif
/**
* Returns true if at least `n` bytes of stack are available.