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Make improvements
- Document redbean's argon2 module - Fix regressions in cthreads library - Make testlib work better with threads - Give the cthreads library lots of love - Remove some of the stdio assembly code - Implement getloadavg() across platforms - Code size optimizations for errnos, etc. - Only check for signals in main thread on Windows - Make errnos for dup2 / dup3 consistent with posix This change also fixes a bug in the argon2 module, where the NUL terminator was being included in the hash encoded ascii string. This shouldn't require any database migrations to folks who found this module and productionized it, since the argon2 library treats it as a c string.
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parent
cb67223051
commit
de5de19004
234 changed files with 1728 additions and 1993 deletions
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@ -1,7 +1,7 @@
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/*-*- mode:c;indent-tabs-mode:nil;c-basic-offset:2;tab-width:8;coding:utf-8 -*-│
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│vi: set net ft=c ts=2 sts=2 sw=2 fenc=utf-8 :vi│
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╞══════════════════════════════════════════════════════════════════════════════╡
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│ Copyright 2021 Justine Alexandra Roberts Tunney │
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│ Copyright 2022 Justine Alexandra Roberts Tunney │
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│ │
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│ Permission to use, copy, modify, and/or distribute this software for │
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│ any purpose with or without fee is hereby granted, provided that the │
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@ -18,8 +18,6 @@
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╚─────────────────────────────────────────────────────────────────────────────*/
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#include "libc/calls/strace.internal.h"
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#include "libc/dce.h"
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#include "libc/intrin/setjmp.internal.h"
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#include "libc/nexgen32e/threaded.h"
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#include "libc/nt/thread.h"
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#include "libc/runtime/runtime.h"
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#include "libc/sysv/consts/nr.h"
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@ -36,10 +34,6 @@ privileged wontreturn void _Exit1(int rc) {
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jmp_buf *jb;
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struct WinThread *wt;
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STRACE("_Exit1(%d)", rc);
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if (__tls_enabled) {
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jb = (jmp_buf *)(__get_tls() + 0x08);
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longjmp(*jb, rc);
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}
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if (!IsWindows() && !IsMetal()) {
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asm volatile("xor\t%%r10d,%%r10d\n\t"
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"syscall"
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@ -25,7 +25,12 @@
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#include "libc/nt/thunk/msabi.h"
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#include "libc/sysv/consts/nrlinux.h"
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#define __NR_sysarch 0x000000a5
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#define __NR_sysarch 0x000000a5 // freebsd+netbsd
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#define AMD64_SET_GSBASE 131 // freebsd
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#define AMD64_SET_FSBASE 129 // freebsd
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#define X86_SET_GSBASE 16 // netbsd
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#define X86_SET_FSBASE 17 // netbsd
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#define __NR___set_tcb 0x00000149
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#define __NR__lwp_setprivate 0x0000013d
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#define __NR_thread_fast_set_cthread_self 0x03000003
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@ -37,8 +42,6 @@
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*
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* offset size description
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* 0x0000 0x08 linear address pointer
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* 0x0008 0x08 jmp_buf *exiter
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* 0x0010 0x04 exit code
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* 0x0030 0x08 linear address pointer
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* 0x0038 0x04 tid
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* 0x003c 0x04 errno
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@ -47,8 +50,6 @@
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privileged void *__initialize_tls(char tib[64]) {
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if (tib) {
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*(intptr_t *)tib = (intptr_t)tib;
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*(intptr_t *)(tib + 0x08) = 0;
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*(int *)(tib + 0x10) = -1; // exit code
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*(intptr_t *)(tib + 0x30) = (intptr_t)tib;
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*(int *)(tib + 0x38) = -1; // tid
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*(int *)(tib + 0x3c) = 0;
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} else if (IsFreebsd()) {
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asm volatile("syscall"
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: "=a"(ax)
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: "0"(__NR_sysarch), "D"(129), "S"(tib)
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: "0"(__NR_sysarch), "D"(AMD64_SET_FSBASE), "S"(tib)
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: "rcx", "r11", "memory", "cc");
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} else if (IsNetbsd()) {
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asm volatile("syscall"
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: "=a"(ax), "=d"(dx)
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: "0"(__NR_sysarch), "D"(X86_SET_FSBASE), "S"(tib)
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: "rcx", "r11", "memory", "cc");
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} else if (IsXnu()) {
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asm volatile("syscall"
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: "=a"(ax)
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: "0"(__NR___set_tcb), "D"(tib)
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: "rcx", "r11", "memory", "cc");
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} else if (IsNetbsd()) {
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asm volatile("syscall"
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: "=a"(ax), "=d"(dx)
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: "0"(__NR__lwp_setprivate), "D"(tib)
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: "rcx", "r11", "memory", "cc");
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} else {
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asm volatile("syscall"
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: "=a"(ax)
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