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Make considerably more progress on AARCH64

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- Utilities like pledge.com now build
- kprintf() will no longer balk at 48-bit addresses
- There's a new aarch64-dbg build mode that should work
- gc() and defer() are mostly pacified; avoid using them on aarch64
- THIRD_PART_STB now has Arm Neon intrinsics for fast image handling
This commit is contained in:
Justine Tunney 2023-05-12 22:42:57 -07:00
parent 1bfb3aab1b
commit fd34ef732d
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GPG key ID: BE714B4575D6E328
91 changed files with 1288 additions and 1192 deletions
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28
libc/calls/seccomp.c
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@ -37,8 +37,8 @@
*/
privileged int seccomp(unsigned operation, unsigned flags, void *args) {
int rc;
#ifdef __x86_64__
if (IsLinux()) {
#ifdef __x86_64__
asm volatile("syscall"
: "=a"(rc)
: "0"(317), "D"(operation), "S"(flags), "d"(args)
@ -61,23 +61,23 @@ privileged int seccomp(unsigned operation, unsigned flags, void *args) {
errno = -rc;
rc = -1;
}
} else {
rc = enosys();
}
#elif defined(__aarch64__)
register long r0 asm("x0") = (long)operation;
register long r1 asm("x1") = (long)flags;
register long r2 asm("x2") = (long)args;
register long res_x0 asm("x0");
asm volatile("mov\tx8,%1\n\t"
"svc\t0"
: "=r"(res_x0)
: "i"(211), "r"(r0), "r"(r1), "r"(r2)
: "x8", "memory");
rc = _sysret(res_x0);
register long r0 asm("x0") = (long)operation;
register long r1 asm("x1") = (long)flags;
register long r2 asm("x2") = (long)args;
register long res_x0 asm("x0");
asm volatile("mov\tx8,%1\n\t"
"svc\t0"
: "=r"(res_x0)
: "i"(211), "r"(r0), "r"(r1), "r"(r2)
: "x8", "memory");
rc = _sysret(res_x0);
#else
#error "arch unsupported"
#endif
} else {
rc = enosys();
}
STRACE("seccomp(%s, %#x, %p) → %d% m", DescribeSeccompOperation(operation),
flags, args, rc);
return rc;