mirror of
https://github.com/jart/cosmopolitan.git
synced 2025-01-31 11:37:35 +00:00
c9152b6f14
This change switches c++ exception handling from sjlj to standard dwarf. It's needed because clang for aarch64 doesn't support sjlj. It turns out that libunwind had a bare-metal configuration that made this easy to do. This change gets the new experimental cosmocc -mclang flag in a state of working so well that it can now be used to build all of llamafile and it goes 3x faster in terms of build latency, without trading away any perf. The int_fast16_t and int_fast32_t types are now always defined as 32-bit in the interest of having more abi consistency between cosmocc -mgcc and -mclang mode.
225 lines
10 KiB
C
225 lines
10 KiB
C
/*===--------------- avxvnniintrin.h - VNNI intrinsics --------------------===
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avxvnniintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVXVNNIINTRIN_H
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#define __AVXVNNIINTRIN_H
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/* Below intrinsics defined in avx512vlvnniintrin.h can be used for AVXVNNI */
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/// \fn __m256i _mm256_dpbusd_epi32(__m256i __S, __m256i __A, __m256i __B)
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/// \fn __m256i _mm256_dpbusds_epi32(__m256i __S, __m256i __A, __m256i __B)
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/// \fn __m256i _mm256_dpwssd_epi32(__m256i __S, __m256i __A, __m256i __B)
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/// \fn __m256i _mm256_dpwssds_epi32(__m256i __S, __m256i __A, __m256i __B)
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/// \fn __m128i _mm_dpbusd_epi32(__m128i __S, __m128i __A, __m128i __B)
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/// \fn __m128i _mm_dpbusds_epi32(__m128i __S, __m128i __A, __m128i __B)
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/// \fn __m128i _mm_dpwssd_epi32(__m128i __S, __m128i __A, __m128i __B)
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/// \fn __m128i _mm_dpwssds_epi32(__m128i __S, __m128i __A, __m128i __B)
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/* Intrinsics with _avx_ prefix are for compatibility with msvc. */
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS256 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(256)))
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#define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avxvnni"), __min_vector_width__(128)))
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
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/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a __S, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 7
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/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]))
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/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endcode
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_vpdpbusd256((__v8si)__S, (__v8si)__A, (__v8si)__B);
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}
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
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/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a __S using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 7
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/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]))
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/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endcode
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_vpdpbusds256((__v8si)__S, (__v8si)__A, (__v8si)__B);
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}
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
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/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S,
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/// and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 7
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/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
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/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
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/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endcode
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_vpdpwssd256((__v8si)__S, (__v8si)__A, (__v8si)__B);
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}
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
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/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S
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/// using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 7
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/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
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/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
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/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2)
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/// ENDFOR
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/// DST[MAX:256] := 0
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/// \endcode
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
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{
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return (__m256i)__builtin_ia32_vpdpwssds256((__v8si)__S, (__v8si)__A, (__v8si)__B);
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}
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
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/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a __S, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 3
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/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]))
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/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endcode
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_vpdpbusd128((__v4si)__S, (__v4si)__A, (__v4si)__B);
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}
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in \a __A with
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/// corresponding signed 8-bit integers in \a __B, producing 4 intermediate signed
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/// 16-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in \a __S using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 3
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/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
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/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
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/// tmp3.word := Signed(ZeroExtend16(__A.byte[4*j+2]) * SignExtend16(__B.byte[4*j+2]))
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/// tmp4.word := Signed(ZeroExtend16(__A.byte[4*j+3]) * SignExtend16(__B.byte[4*j+3]))
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/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endcode
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_vpdpbusds128((__v4si)__S, (__v4si)__A, (__v4si)__B);
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}
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
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/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S,
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/// and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 3
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/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
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/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
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/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endcode
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_vpdpwssd128((__v4si)__S, (__v4si)__A, (__v4si)__B);
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}
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/// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
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/// corresponding 16-bit integers in \a __B, producing 2 intermediate signed 32-bit
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/// results. Sum these 2 results with the corresponding 32-bit integer in \a __S
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/// using signed saturation, and store the packed 32-bit results in DST.
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///
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/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
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///
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/// \code{.operation}
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/// FOR j := 0 to 3
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/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
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/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
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/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2)
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/// ENDFOR
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/// DST[MAX:128] := 0
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/// \endcode
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
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{
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return (__m128i)__builtin_ia32_vpdpwssds128((__v4si)__S, (__v4si)__A, (__v4si)__B);
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}
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#undef __DEFAULT_FN_ATTRS128
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#undef __DEFAULT_FN_ATTRS256
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#endif // __AVXVNNIINTRIN_H
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