mirror of
https://github.com/jart/cosmopolitan.git
synced 2025-01-31 03:27:39 +00:00
154 lines
6.4 KiB
C
154 lines
6.4 KiB
C
#ifndef _IMMINTRIN_H_INCLUDED
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#error \
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"Never use <avx512vnnivlintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef _AVX512VNNIVLINTRIN_H_INCLUDED
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#define _AVX512VNNIVLINTRIN_H_INCLUDED
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#if !defined(__AVX512VL__) || !defined(__AVX512VNNI__)
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#pragma GCC push_options
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#pragma GCC target("avx512vnni,avx512vl")
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#define __DISABLE_AVX512VNNIVL__
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#endif /* __AVX512VNNIVL__ */
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__funline __m256i _mm256_dpbusd_epi32(__m256i __A, __m256i __B, __m256i __C) {
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return (__m256i)__builtin_ia32_vpdpbusd_v8si((__v8si)__A, (__v8si)__B,
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(__v8si)__C);
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}
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__funline __m256i _mm256_mask_dpbusd_epi32(__m256i __A, __mmask8 __B, __m256i __C,
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__m256i __D) {
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return (__m256i)__builtin_ia32_vpdpbusd_v8si_mask((__v8si)__A, (__v8si)__C,
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(__v8si)__D, (__mmask8)__B);
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}
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__funline __m256i _mm256_maskz_dpbusd_epi32(__mmask8 __A, __m256i __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpbusd_v8si_maskz(
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(__v8si)__B, (__v8si)__C, (__v8si)__D, (__mmask8)__A);
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}
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__funline __m128i _mm_dpbusd_epi32(__m128i __A, __m128i __B, __m128i __C) {
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return (__m128i)__builtin_ia32_vpdpbusd_v4si((__v4si)__A, (__v4si)__B,
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(__v4si)__C);
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}
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__funline __m128i _mm_mask_dpbusd_epi32(__m128i __A, __mmask8 __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpbusd_v4si_mask((__v4si)__A, (__v4si)__C,
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(__v4si)__D, (__mmask8)__B);
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}
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__funline __m128i _mm_maskz_dpbusd_epi32(__mmask8 __A, __m128i __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpbusd_v4si_maskz(
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(__v4si)__B, (__v4si)__C, (__v4si)__D, (__mmask8)__A);
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}
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__funline __m256i _mm256_dpbusds_epi32(__m256i __A, __m256i __B, __m256i __C) {
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return (__m256i)__builtin_ia32_vpdpbusds_v8si((__v8si)__A, (__v8si)__B,
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(__v8si)__C);
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}
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__funline __m256i _mm256_mask_dpbusds_epi32(__m256i __A, __mmask8 __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpbusds_v8si_mask(
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(__v8si)__A, (__v8si)__C, (__v8si)__D, (__mmask8)__B);
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}
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__funline __m256i _mm256_maskz_dpbusds_epi32(__mmask8 __A, __m256i __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpbusds_v8si_maskz(
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(__v8si)__B, (__v8si)__C, (__v8si)__D, (__mmask8)__A);
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}
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__funline __m128i _mm_dpbusds_epi32(__m128i __A, __m128i __B, __m128i __C) {
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return (__m128i)__builtin_ia32_vpdpbusds_v4si((__v4si)__A, (__v4si)__B,
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(__v4si)__C);
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}
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__funline __m128i _mm_mask_dpbusds_epi32(__m128i __A, __mmask8 __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpbusds_v4si_mask(
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(__v4si)__A, (__v4si)__C, (__v4si)__D, (__mmask8)__B);
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}
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__funline __m128i _mm_maskz_dpbusds_epi32(__mmask8 __A, __m128i __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpbusds_v4si_maskz(
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(__v4si)__B, (__v4si)__C, (__v4si)__D, (__mmask8)__A);
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}
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__funline __m256i _mm256_dpwssd_epi32(__m256i __A, __m256i __B, __m256i __C) {
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return (__m256i)__builtin_ia32_vpdpwssd_v8si((__v8si)__A, (__v8si)__B,
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(__v8si)__C);
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}
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__funline __m256i _mm256_mask_dpwssd_epi32(__m256i __A, __mmask8 __B, __m256i __C,
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__m256i __D) {
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return (__m256i)__builtin_ia32_vpdpwssd_v8si_mask((__v8si)__A, (__v8si)__C,
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(__v8si)__D, (__mmask8)__B);
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}
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__funline __m256i _mm256_maskz_dpwssd_epi32(__mmask8 __A, __m256i __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpwssd_v8si_maskz(
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(__v8si)__B, (__v8si)__C, (__v8si)__D, (__mmask8)__A);
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}
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__funline __m128i _mm_dpwssd_epi32(__m128i __A, __m128i __B, __m128i __C) {
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return (__m128i)__builtin_ia32_vpdpwssd_v4si((__v4si)__A, (__v4si)__B,
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(__v4si)__C);
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}
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__funline __m128i _mm_mask_dpwssd_epi32(__m128i __A, __mmask8 __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpwssd_v4si_mask((__v4si)__A, (__v4si)__C,
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(__v4si)__D, (__mmask8)__B);
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}
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__funline __m128i _mm_maskz_dpwssd_epi32(__mmask8 __A, __m128i __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpwssd_v4si_maskz(
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(__v4si)__B, (__v4si)__C, (__v4si)__D, (__mmask8)__A);
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}
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__funline __m256i _mm256_dpwssds_epi32(__m256i __A, __m256i __B, __m256i __C) {
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return (__m256i)__builtin_ia32_vpdpwssds_v8si((__v8si)__A, (__v8si)__B,
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(__v8si)__C);
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}
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__funline __m256i _mm256_mask_dpwssds_epi32(__m256i __A, __mmask8 __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpwssds_v8si_mask(
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(__v8si)__A, (__v8si)__C, (__v8si)__D, (__mmask8)__B);
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}
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__funline __m256i _mm256_maskz_dpwssds_epi32(__mmask8 __A, __m256i __B,
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__m256i __C, __m256i __D) {
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return (__m256i)__builtin_ia32_vpdpwssds_v8si_maskz(
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(__v8si)__B, (__v8si)__C, (__v8si)__D, (__mmask8)__A);
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}
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__funline __m128i _mm_dpwssds_epi32(__m128i __A, __m128i __B, __m128i __C) {
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return (__m128i)__builtin_ia32_vpdpwssds_v4si((__v4si)__A, (__v4si)__B,
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(__v4si)__C);
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}
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__funline __m128i _mm_mask_dpwssds_epi32(__m128i __A, __mmask8 __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpwssds_v4si_mask(
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(__v4si)__A, (__v4si)__C, (__v4si)__D, (__mmask8)__B);
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}
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__funline __m128i _mm_maskz_dpwssds_epi32(__mmask8 __A, __m128i __B, __m128i __C,
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__m128i __D) {
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return (__m128i)__builtin_ia32_vpdpwssds_v4si_maskz(
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(__v4si)__B, (__v4si)__C, (__v4si)__D, (__mmask8)__A);
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}
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#ifdef __DISABLE_AVX512VNNIVL__
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#undef __DISABLE_AVX512VNNIVL__
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#pragma GCC pop_options
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#endif /* __DISABLE_AVX512VNNIVL__ */
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#endif /* __DISABLE_AVX512VNNIVL__ */
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