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49 lines
2.5 KiB
ArmAsm
49 lines
2.5 KiB
ArmAsm
/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
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│vi: set et ft=asm ts=8 tw=8 fenc=utf-8 :vi│
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╞══════════════════════════════════════════════════════════════════════════════╡
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│ Copyright 2020 Justine Alexandra Roberts Tunney │
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│ │
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│ Permission to use, copy, modify, and/or distribute this software for │
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│ any purpose with or without fee is hereby granted, provided that the │
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│ above copyright notice and this permission notice appear in all copies. │
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│ │
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│ THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL │
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│ WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED │
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│ WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE │
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│ AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL │
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│ DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR │
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│ PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER │
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│ TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR │
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│ PERFORMANCE OF THIS SOFTWARE. │
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╚─────────────────────────────────────────────────────────────────────────────*/
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#include "libc/nexgen32e/x86feature.h"
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#include "libc/macros.internal.h"
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.text.startup
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// Initializes jump table for memset() and memcpy().
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//
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// @param !ZF if required cpu vector extensions are available
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// @param rdi is address of 64-bit jump table
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// @param rsi is address of 8-bit jump initializers
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// @param rdx is address of indirect branch
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// @param ecx is size of jump table
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memjmpinit:
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.leafprologue
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setnz %r8b
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shl %r8b
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0: xor %eax,%eax
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lodsb
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add %rdx,%rax
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stosq
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.loop 0b
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xor %eax,%eax
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testb X86_HAVE(ERMS)+kCpuids(%rip)
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setnz %al
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or %r8b,%al
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mov (%rsi,%rax),%al
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add %rdx,%rax
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stosq
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lodsq
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.leafepilogue
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.endfn memjmpinit,globl,hidden
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.source __FILE__
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