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https://github.com/jart/cosmopolitan.git
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0da47c51de
* [metal] Copy program pages to extended memory at startup * [metal] Reclaim base memory pages for later app use * [metal] Load program pages beyond 1st 440 KiB to extended memory o//examples/hellolua.com now runs correctly under QEMU (in legacy BIOS mode). * [metal] Place GDT in read/write segment The CPU absolutely needs to alter the GDT when loading the task register (via ltr). To account for this, I move the GDT into a read/write data section. There is still a "rump" read-only GDT in the text section that is used by the real mode bootloader. We also delay the loading of the task register (ltr) until after the IDT and TSS are finally set up. * [metal] Get examples/vga2.c serial output working for UEFI boot * [metal] Get examples/vga2.c VGA output working for UEFI boot * [metal] Allow munmap() to reclaim dynamically allocated pages * Place TLS sections right after .text, not after embedded zip file Co-authored-by: tkchia <tkchia-cosmo@gmx.com>
181 lines
6.1 KiB
ArmAsm
181 lines
6.1 KiB
ArmAsm
/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
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│vi: set et ft=asm ts=8 tw=8 fenc=utf-8 :vi│
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╞══════════════════════════════════════════════════════════════════════════════╡
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│ This is free and unencumbered software released into the public domain. │
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│ │
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│ Anyone is free to copy, modify, publish, use, compile, sell, or │
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│ distribute this software, either in source code form or as a compiled │
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│ binary, for any purpose, commercial or non-commercial, and by any │
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│ means. │
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│ │
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│ In jurisdictions that recognize copyright laws, the author or authors │
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│ of this software dedicate any and all copyright interest in the │
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│ software to the public domain. We make this dedication for the benefit │
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│ of the public at large and to the detriment of our heirs and │
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│ successors. We intend this dedication to be an overt act of │
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│ relinquishment in perpetuity of all present and future rights to this │
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│ software under copyright law. │
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│ │
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│ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, │
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│ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF │
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│ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. │
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│ IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR │
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│ OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, │
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│ ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR │
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│ OTHER DEALINGS IN THE SOFTWARE. │
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╚─────────────────────────────────────────────────────────────────────────────*/
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#include "libc/dce.h"
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#include "libc/macros.internal.h"
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#include "libc/runtime/pc.internal.h"
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// Code and data structures for bare metal interrupt handling.
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#define ISR_STK_SZ 0x10000
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#define ISR_STK_ALIGN 0x10
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// Interrupt stack to use for IRQs. TODO.
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#define IRQ_IST 1
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// Interrupt stack to use for CPU exceptions.
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#define EXCEP_IST 2
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// Interrupt numbers to use for IRQs 0 & 8. TODO: implement these!
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#define IRQ0 0x20
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#define IRQ8 0x28
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.init.start 100,_init_isr
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push %rdi
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call isr_init
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pop %rdi
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.init.end 100,_init_isr
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// Interrupt service routines for CPU exceptions 0—31.
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i = 31
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.rept 30
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push %rsi # preserve rsi
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mov $i,%sil # rsi = exception number
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1: jmp 1f # kangeroo
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i = i - 1
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.endr
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__excep1_isr:
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push %rsi
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mov $1,%sil
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1: jmp 1f
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__excep0_isr:
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push %rsi
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xor %esi,%esi
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1: test $8,%esp # if no error code was pushed,
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jnz 2f # stuff our own
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pushq (%rsp)
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orq $-1,8(%rsp)
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2: movzbq %sil,%rsi # zero-extend the exception number
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push %rcx # preserve registers which we will
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push %rdx # use to call kprintf
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push %r8
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push %r9
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mov 48(%rsp),%rcx # edx:rcx = 'caller' cs:rip
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mov 56(%rsp),%edx
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mov 40(%rsp),%r8 # r8 = error code
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mov %cr2,%r9 # r9 = cr2, in case it is useful
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push %rax # preserve other call-used registers
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push %rdi
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push %r9
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push %r10
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push %r11
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mov %ss,%eax # preserve ds, es, ss
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push %rax
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mov %ds,%eax
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push %rax
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mov %es,%eax
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push %rax
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mov $GDT_LONG_DATA,%eax # ...& load ds, es, ss correctly
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mov %eax,%ss
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mov %eax,%ds
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mov %eax,%es
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ezlea .excep_msg,di # stack should be 16-byte aligned now
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xor %eax,%eax # kprintf is variadic, remember to
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# pass no. of vector regs. used (= 0)
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.weak kprintf # weakly link kprintf() because we
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ezlea kprintf,bx # want to keep life.com tiny
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test %ebx,%ebx
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jz 8f
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call *%rbx # print error message
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8: cli
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9: hlt
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jmp 9b
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/* TODO: link up with sigaction etc. */
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// Initialization code for setting up a Task State Segment (TSS) &
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// Interrupt Descriptor Table (IDT) in bare metal mode, to start
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// processing exceptions & asynchronous IRQs.
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isr_init:
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testb IsMetal()
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jz 9f
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ezlea _tss+0x24,di # fill up TSS
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ezlea _isr_stk_1+ISR_STK_SZ,ax
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and $-ISR_STK_ALIGN,%al # be paranoid & enforce correct
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stosq # alignment of stack pointers
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ezlea _isr_stk_2+ISR_STK_SZ,ax
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and $-ISR_STK_ALIGN,%al
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stosq
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add $0x66-0x34,%rdi
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movw $_tss_iopb-_tss,%ax
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stosw
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lidt _idtr # load IDTR
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ezlea _idt,di
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pushpop 32,%rcx # fill IDT entries for CPU exceptions
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ezlea __excep0_isr,dx
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1: mov %edx,%eax
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stosw
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mov %cs,%eax
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stosw
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mov %rdx,%rax
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// ┌P:present
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// │┌DPL:privilege
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// ││ ┌system segment (0)
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// ││ │ ┌gate type (interrupt gate, i.e. disable IRQs)
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// ││ │ │ ┌reserved
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// ││ │ │ │ ┌IST:interrupt stack table
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// │├┐│┌┴─┐┌─┴─┐┌┴┐
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mov $0b1000111000000000|EXCEP_IST,%ax
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stosl
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shr $32,%rax
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stosq
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add $__excep1_isr-__excep0_isr,%rdx
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loop 1b
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mov $GDT_LONG_TSS,%cl # load task register (cx = 0 here)
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ltr %cx
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9: ret
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// String constants.
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.rodata.str1.1
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.excep_msg:
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.ascii "\033[1;31mCPU exception %d @ %#llx:%#llx err code %#llx "
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.asciz "cr2 %#llx\33[0m\n"
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.previous
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// IDTR value.
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.rodata
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_idtr: .short _idt_end-_idt-1
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.quad _idt
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.endobj _idtr,globl,hidden
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.balign 8
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.previous
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.bss
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// Space for the Task State Segment.
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_tss:
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.space 0x68
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_tss_iopb:
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_tss_end:
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.endobj _tss,globl,hidden
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.endobj _tss_end,globl,hidden
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// Space for the Interrupt Descriptor Table.
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_idt: .space (MAX(IRQ0,IRQ8)+8)*0x10
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_idt_end:
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.endobj _idt,globl,hidden
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.previous
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// Interrupt stacks.
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.lcomm _isr_stk_1,ISR_STK_SZ
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.lcomm _isr_stk_2,ISR_STK_SZ
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