mirror of
https://github.com/jart/cosmopolitan.git
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c9152b6f14
This change switches c++ exception handling from sjlj to standard dwarf. It's needed because clang for aarch64 doesn't support sjlj. It turns out that libunwind had a bare-metal configuration that made this easy to do. This change gets the new experimental cosmocc -mclang flag in a state of working so well that it can now be used to build all of llamafile and it goes 3x faster in terms of build latency, without trading away any perf. The int_fast16_t and int_fast32_t types are now always defined as 32-bit in the interest of having more abi consistency between cosmocc -mgcc and -mclang mode.
151 lines
4.5 KiB
C
151 lines
4.5 KiB
C
/*===---- avx512vlbitalgintrin.h - BITALG intrinsics -----------------------===
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*
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512vlbitalgintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __AVX512VLBITALGINTRIN_H
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#define __AVX512VLBITALGINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS128 \
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__attribute__((__always_inline__, __nodebug__, \
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__target__("avx512vl,avx512bitalg,no-evex512"), \
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__min_vector_width__(128)))
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#define __DEFAULT_FN_ATTRS256 \
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__attribute__((__always_inline__, __nodebug__, \
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__target__("avx512vl,avx512bitalg,no-evex512"), \
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__min_vector_width__(256)))
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_popcnt_epi16(__m256i __A)
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{
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return (__m256i) __builtin_ia32_vpopcntw_256((__v16hi) __A);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B)
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{
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return (__m256i) __builtin_ia32_selectw_256((__mmask16) __U,
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(__v16hi) _mm256_popcnt_epi16(__B),
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(__v16hi) __A);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B)
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{
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return _mm256_mask_popcnt_epi16((__m256i) _mm256_setzero_si256(),
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__U,
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__B);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_popcnt_epi16(__m128i __A)
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{
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return (__m128i) __builtin_ia32_vpopcntw_128((__v8hi) __A);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B)
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{
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return (__m128i) __builtin_ia32_selectw_128((__mmask8) __U,
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(__v8hi) _mm_popcnt_epi16(__B),
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(__v8hi) __A);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B)
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{
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return _mm_mask_popcnt_epi16((__m128i) _mm_setzero_si128(),
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__U,
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__B);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_popcnt_epi8(__m256i __A)
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{
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return (__m256i) __builtin_ia32_vpopcntb_256((__v32qi) __A);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B)
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{
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return (__m256i) __builtin_ia32_selectb_256((__mmask32) __U,
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(__v32qi) _mm256_popcnt_epi8(__B),
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(__v32qi) __A);
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}
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static __inline__ __m256i __DEFAULT_FN_ATTRS256
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_mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B)
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{
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return _mm256_mask_popcnt_epi8((__m256i) _mm256_setzero_si256(),
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__U,
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__B);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_popcnt_epi8(__m128i __A)
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{
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return (__m128i) __builtin_ia32_vpopcntb_128((__v16qi) __A);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B)
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{
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return (__m128i) __builtin_ia32_selectb_128((__mmask16) __U,
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(__v16qi) _mm_popcnt_epi8(__B),
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(__v16qi) __A);
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}
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static __inline__ __m128i __DEFAULT_FN_ATTRS128
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_mm_maskz_popcnt_epi8(__mmask16 __U, __m128i __B)
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{
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return _mm_mask_popcnt_epi8((__m128i) _mm_setzero_si128(),
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__U,
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__B);
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}
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static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
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_mm256_mask_bitshuffle_epi64_mask(__mmask32 __U, __m256i __A, __m256i __B)
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{
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return (__mmask32) __builtin_ia32_vpshufbitqmb256_mask((__v32qi) __A,
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(__v32qi) __B,
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__U);
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}
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static __inline__ __mmask32 __DEFAULT_FN_ATTRS256
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_mm256_bitshuffle_epi64_mask(__m256i __A, __m256i __B)
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{
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return _mm256_mask_bitshuffle_epi64_mask((__mmask32) -1,
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__A,
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__B);
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}
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS128
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_mm_mask_bitshuffle_epi64_mask(__mmask16 __U, __m128i __A, __m128i __B)
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{
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return (__mmask16) __builtin_ia32_vpshufbitqmb128_mask((__v16qi) __A,
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(__v16qi) __B,
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__U);
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}
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static __inline__ __mmask16 __DEFAULT_FN_ATTRS128
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_mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B)
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{
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return _mm_mask_bitshuffle_epi64_mask((__mmask16) -1,
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__A,
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__B);
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}
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#undef __DEFAULT_FN_ATTRS128
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#undef __DEFAULT_FN_ATTRS256
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#endif
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