mirror of
https://github.com/jart/cosmopolitan.git
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c9152b6f14
This change switches c++ exception handling from sjlj to standard dwarf. It's needed because clang for aarch64 doesn't support sjlj. It turns out that libunwind had a bare-metal configuration that made this easy to do. This change gets the new experimental cosmocc -mclang flag in a state of working so well that it can now be used to build all of llamafile and it goes 3x faster in terms of build latency, without trading away any perf. The int_fast16_t and int_fast32_t types are now always defined as 32-bit in the interest of having more abi consistency between cosmocc -mgcc and -mclang mode.
524 lines
21 KiB
C
524 lines
21 KiB
C
/*===--------------- amxintrin.h - AMX intrinsics -*- C/C++ -*---------------===
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===------------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <amxintrin.h> directly; include <immintrin.h> instead."
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#endif /* __IMMINTRIN_H */
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#ifndef __AMXINTRIN_H
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#define __AMXINTRIN_H
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#ifdef __x86_64__
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS_TILE \
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__attribute__((__always_inline__, __nodebug__, __target__("amx-tile")))
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#define __DEFAULT_FN_ATTRS_INT8 \
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__attribute__((__always_inline__, __nodebug__, __target__("amx-int8")))
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#define __DEFAULT_FN_ATTRS_BF16 \
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__attribute__((__always_inline__, __nodebug__, __target__("amx-bf16")))
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#define __DEFAULT_FN_ATTRS_FP16 \
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__attribute__((__always_inline__, __nodebug__, __target__("amx-fp16")))
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/// Load tile configuration from a 64-byte memory location specified by
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/// "mem_addr". The tile configuration includes the tile type palette, the
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/// number of bytes per row, and the number of rows. If the specified
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/// palette_id is zero, that signifies the init state for both the tile
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/// config and the tile data, and the tiles are zeroed. Any invalid
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/// configurations will result in #GP fault.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> LDTILECFG </c> instruction.
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///
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/// \param __config
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/// A pointer to 512-bits configuration
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static __inline__ void __DEFAULT_FN_ATTRS_TILE
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_tile_loadconfig(const void *__config) {
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__builtin_ia32_tile_loadconfig(__config);
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}
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/// Stores the current tile configuration to a 64-byte memory location
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/// specified by "mem_addr". The tile configuration includes the tile type
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/// palette, the number of bytes per row, and the number of rows. If tiles
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/// are not configured, all zeroes will be stored to memory.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> STTILECFG </c> instruction.
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///
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/// \param __config
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/// A pointer to 512-bits configuration
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static __inline__ void __DEFAULT_FN_ATTRS_TILE
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_tile_storeconfig(void *__config) {
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__builtin_ia32_tile_storeconfig(__config);
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}
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/// Release the tile configuration to return to the init state, which
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/// releases all storage it currently holds.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILERELEASE </c> instruction.
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static __inline__ void __DEFAULT_FN_ATTRS_TILE _tile_release(void) {
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__builtin_ia32_tilerelease();
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}
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/// Load tile rows from memory specifieid by "base" address and "stride" into
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/// destination tile "dst" using the tile configuration previously configured
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/// via "_tile_loadconfig".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILELOADD </c> instruction.
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///
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/// \param dst
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/// A destination tile. Max size is 1024 Bytes.
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/// \param base
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/// A pointer to base address.
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/// \param stride
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/// The stride between the rows' data to be loaded in memory.
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#define _tile_loadd(dst, base, stride) \
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__builtin_ia32_tileloadd64((dst), ((const void *)(base)), \
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(__SIZE_TYPE__)(stride))
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/// Load tile rows from memory specifieid by "base" address and "stride" into
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/// destination tile "dst" using the tile configuration previously configured
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/// via "_tile_loadconfig". This intrinsic provides a hint to the implementation
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/// that the data will likely not be reused in the near future and the data
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/// caching can be optimized accordingly.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILELOADDT1 </c> instruction.
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///
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/// \param dst
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/// A destination tile. Max size is 1024 Bytes.
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/// \param base
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/// A pointer to base address.
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/// \param stride
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/// The stride between the rows' data to be loaded in memory.
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#define _tile_stream_loadd(dst, base, stride) \
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__builtin_ia32_tileloaddt164((dst), ((const void *)(base)), \
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(__SIZE_TYPE__)(stride))
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/// Store the tile specified by "src" to memory specifieid by "base" address and
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/// "stride" using the tile configuration previously configured via
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/// "_tile_loadconfig".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILESTORED </c> instruction.
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///
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/// \param dst
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/// A destination tile. Max size is 1024 Bytes.
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/// \param base
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/// A pointer to base address.
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/// \param stride
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/// The stride between the rows' data to be stored in memory.
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#define _tile_stored(dst, base, stride) \
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__builtin_ia32_tilestored64((dst), ((void *)(base)), (__SIZE_TYPE__)(stride))
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/// Zero the tile specified by "tdest".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILEZERO </c> instruction.
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///
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/// \param tile
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/// The destination tile to be zero. Max size is 1024 Bytes.
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#define _tile_zero(tile) __builtin_ia32_tilezero((tile))
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with
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/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit
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/// results. Sum these 4 results with the corresponding 32-bit integer in "dst",
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/// and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBSSD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_dpbssd(dst, src0, src1) \
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__builtin_ia32_tdpbssd((dst), (src0), (src1))
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with
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/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate
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/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in "dst", and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBSUD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_dpbsud(dst, src0, src1) \
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__builtin_ia32_tdpbsud((dst), (src0), (src1))
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with
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/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit
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/// results. Sum these 4 results with the corresponding 32-bit integer in "dst",
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/// and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBUSD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_dpbusd(dst, src0, src1) \
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__builtin_ia32_tdpbusd((dst), (src0), (src1))
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with
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/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate
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/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer in
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/// "dst", and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBUUD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_dpbuud(dst, src0, src1) \
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__builtin_ia32_tdpbuud((dst), (src0), (src1))
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/// Compute dot-product of BF16 (16-bit) floating-point pairs in tiles src0 and
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/// src1, accumulating the intermediate single-precision (32-bit) floating-point
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/// elements with elements in "dst", and store the 32-bit result back to tile
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/// "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBF16PS </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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#define _tile_dpbf16ps(dst, src0, src1) \
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__builtin_ia32_tdpbf16ps((dst), (src0), (src1))
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/// AMX tile register size can be configured, the maximum size is 16x64=1024
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/// bytes. Since there is no 2D type in llvm IR, we use vector type to
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/// represent 2D tile and the fixed size is maximum amx tile register size.
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typedef int _tile1024i __attribute__((__vector_size__(1024), __aligned__(64)));
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_loadd_internal(unsigned short m, unsigned short n, const void *base,
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__SIZE_TYPE__ stride) {
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return __builtin_ia32_tileloadd64_internal(m, n, base,
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(__SIZE_TYPE__)(stride));
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_loaddt1_internal(unsigned short m, unsigned short n, const void *base,
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__SIZE_TYPE__ stride) {
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return __builtin_ia32_tileloaddt164_internal(m, n, base,
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(__SIZE_TYPE__)(stride));
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_dpbssd_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbssd_internal(m, n, k, dst, src1, src2);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_dpbsud_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbsud_internal(m, n, k, dst, src1, src2);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_dpbusd_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbusd_internal(m, n, k, dst, src1, src2);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
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_tile_dpbuud_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbuud_internal(m, n, k, dst, src1, src2);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ void __DEFAULT_FN_ATTRS_INT8
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_tile_stored_internal(unsigned short m, unsigned short n, void *base,
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__SIZE_TYPE__ stride, _tile1024i tile) {
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return __builtin_ia32_tilestored64_internal(m, n, base,
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(__SIZE_TYPE__)(stride), tile);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_BF16
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_tile_dpbf16ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpbf16ps_internal(m, n, k, dst, src1, src2);
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}
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/// This is internal intrinsic. C/C++ user should avoid calling it directly.
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static __inline__ _tile1024i __DEFAULT_FN_ATTRS_FP16
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_tile_dpfp16ps_internal(unsigned short m, unsigned short n, unsigned short k,
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_tile1024i dst, _tile1024i src1, _tile1024i src2) {
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return __builtin_ia32_tdpfp16ps_internal(m, n, k, dst, src1, src2);
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}
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/// This struct pack the shape and tile data together for user. We suggest
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/// initializing the struct as early as possible, because compiler depends
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/// on the shape information to do configure. The constant value is preferred
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/// for optimization by compiler.
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typedef struct __tile1024i_str {
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const unsigned short row;
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const unsigned short col;
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_tile1024i tile;
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} __tile1024i;
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/// Load tile rows from memory specifieid by "base" address and "stride" into
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/// destination tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILELOADD </c> instruction.
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///
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/// \param dst
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/// A destination tile. Max size is 1024 Bytes.
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/// \param base
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/// A pointer to base address.
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/// \param stride
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/// The stride between the rows' data to be loaded in memory.
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__DEFAULT_FN_ATTRS_TILE
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static __inline__ void __tile_loadd(__tile1024i *dst, const void *base,
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__SIZE_TYPE__ stride) {
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dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
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}
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/// Load tile rows from memory specifieid by "base" address and "stride" into
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/// destination tile "dst". This intrinsic provides a hint to the implementation
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/// that the data will likely not be reused in the near future and the data
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/// caching can be optimized accordingly.
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TILELOADDT1 </c> instruction.
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///
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/// \param dst
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/// A destination tile. Max size is 1024 Bytes.
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/// \param base
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/// A pointer to base address.
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/// \param stride
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/// The stride between the rows' data to be loaded in memory.
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__DEFAULT_FN_ATTRS_TILE
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static __inline__ void __tile_stream_loadd(__tile1024i *dst, const void *base,
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__SIZE_TYPE__ stride) {
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dst->tile = _tile_loaddt1_internal(dst->row, dst->col, base, stride);
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}
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with
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/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit
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/// results. Sum these 4 results with the corresponding 32-bit integer in "dst",
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/// and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBSSD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_INT8
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static __inline__ void __tile_dpbssd(__tile1024i *dst, __tile1024i src0,
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__tile1024i src1) {
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dst->tile = _tile_dpbssd_internal(src0.row, src1.col, src0.col, dst->tile,
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src0.tile, src1.tile);
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}
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of signed 8-bit integers in src0 with
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/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate
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/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer
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/// in "dst", and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBSUD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_INT8
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static __inline__ void __tile_dpbsud(__tile1024i *dst, __tile1024i src0,
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__tile1024i src1) {
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dst->tile = _tile_dpbsud_internal(src0.row, src1.col, src0.col, dst->tile,
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src0.tile, src1.tile);
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}
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with
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/// corresponding signed 8-bit integers in src1, producing 4 intermediate 32-bit
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/// results. Sum these 4 results with the corresponding 32-bit integer in "dst",
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/// and store the 32-bit result back to tile "dst".
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///
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/// \headerfile <immintrin.h>
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///
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/// This intrinsic corresponds to the <c> TDPBUSD </c> instruction.
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///
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/// \param dst
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/// The destination tile. Max size is 1024 Bytes.
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/// \param src0
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/// The 1st source tile. Max size is 1024 Bytes.
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/// \param src1
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/// The 2nd source tile. Max size is 1024 Bytes.
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__DEFAULT_FN_ATTRS_INT8
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static __inline__ void __tile_dpbusd(__tile1024i *dst, __tile1024i src0,
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__tile1024i src1) {
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dst->tile = _tile_dpbusd_internal(src0.row, src1.col, src0.col, dst->tile,
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src0.tile, src1.tile);
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}
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/// Compute dot-product of bytes in tiles with a source/destination accumulator.
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/// Multiply groups of 4 adjacent pairs of unsigned 8-bit integers in src0 with
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/// corresponding unsigned 8-bit integers in src1, producing 4 intermediate
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/// 32-bit results. Sum these 4 results with the corresponding 32-bit integer in
|
|
/// "dst", and store the 32-bit result back to tile "dst".
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|
///
|
|
/// \headerfile <immintrin.h>
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|
///
|
|
/// This intrinsic corresponds to the <c> TDPBUUD </c> instruction.
|
|
///
|
|
/// \param dst
|
|
/// The destination tile. Max size is 1024 Bytes.
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|
/// \param src0
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|
/// The 1st source tile. Max size is 1024 Bytes.
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|
/// \param src1
|
|
/// The 2nd source tile. Max size is 1024 Bytes.
|
|
__DEFAULT_FN_ATTRS_INT8
|
|
static __inline__ void __tile_dpbuud(__tile1024i *dst, __tile1024i src0,
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|
__tile1024i src1) {
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|
dst->tile = _tile_dpbuud_internal(src0.row, src1.col, src0.col, dst->tile,
|
|
src0.tile, src1.tile);
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|
}
|
|
|
|
/// Store the tile specified by "src" to memory specifieid by "base" address and
|
|
/// "stride".
|
|
///
|
|
/// \headerfile <immintrin.h>
|
|
///
|
|
/// This intrinsic corresponds to the <c> TILESTORED </c> instruction.
|
|
///
|
|
/// \param base
|
|
/// A pointer to base address.
|
|
/// \param stride
|
|
/// The stride between the rows' data to be stored in memory.
|
|
__DEFAULT_FN_ATTRS_TILE
|
|
static __inline__ void __tile_stored(void *base, __SIZE_TYPE__ stride,
|
|
__tile1024i src) {
|
|
_tile_stored_internal(src.row, src.col, base, stride, src.tile);
|
|
}
|
|
|
|
/// Zero the tile specified by "dst".
|
|
///
|
|
/// \headerfile <immintrin.h>
|
|
///
|
|
/// This intrinsic corresponds to the <c> TILEZERO </c> instruction.
|
|
///
|
|
/// \param dst
|
|
/// The destination tile to be zero. Max size is 1024 Bytes.
|
|
__DEFAULT_FN_ATTRS_TILE
|
|
static __inline__ void __tile_zero(__tile1024i *dst) {
|
|
dst->tile = __builtin_ia32_tilezero_internal(dst->row, dst->col);
|
|
}
|
|
|
|
/// Compute dot-product of BF16 (16-bit) floating-point pairs in tiles src0 and
|
|
/// src1, accumulating the intermediate single-precision (32-bit) floating-point
|
|
/// elements with elements in "dst", and store the 32-bit result back to tile
|
|
/// "dst".
|
|
///
|
|
/// \headerfile <immintrin.h>
|
|
///
|
|
/// This intrinsic corresponds to the <c> TDPBF16PS </c> instruction.
|
|
///
|
|
/// \param dst
|
|
/// The destination tile. Max size is 1024 Bytes.
|
|
/// \param src0
|
|
/// The 1st source tile. Max size is 1024 Bytes.
|
|
/// \param src1
|
|
/// The 2nd source tile. Max size is 1024 Bytes.
|
|
__DEFAULT_FN_ATTRS_BF16
|
|
static __inline__ void __tile_dpbf16ps(__tile1024i *dst, __tile1024i src0,
|
|
__tile1024i src1) {
|
|
dst->tile = _tile_dpbf16ps_internal(src0.row, src1.col, src0.col, dst->tile,
|
|
src0.tile, src1.tile);
|
|
}
|
|
|
|
/// Compute dot-product of FP16 (16-bit) floating-point pairs in tiles src0 and
|
|
/// src1, accumulating the intermediate single-precision (32-bit) floating-point
|
|
/// elements with elements in "dst", and store the 32-bit result back to tile
|
|
/// "dst".
|
|
///
|
|
/// \headerfile <immintrin.h>
|
|
///
|
|
/// This intrinsic corresponds to the <c> TDPFP16PS </c> instruction.
|
|
///
|
|
/// \param dst
|
|
/// The destination tile. Max size is 1024 Bytes.
|
|
/// \param src0
|
|
/// The 1st source tile. Max size is 1024 Bytes.
|
|
/// \param src1
|
|
/// The 2nd source tile. Max size is 1024 Bytes.
|
|
__DEFAULT_FN_ATTRS_FP16
|
|
static __inline__ void __tile_dpfp16ps(__tile1024i *dst, __tile1024i src0,
|
|
__tile1024i src1) {
|
|
dst->tile = _tile_dpfp16ps_internal(src0.row, src1.col, src0.col, dst->tile,
|
|
src0.tile, src1.tile);
|
|
}
|
|
|
|
#undef __DEFAULT_FN_ATTRS_TILE
|
|
#undef __DEFAULT_FN_ATTRS_INT8
|
|
#undef __DEFAULT_FN_ATTRS_BF16
|
|
#undef __DEFAULT_FN_ATTRS_FP16
|
|
|
|
#endif /* __x86_64__ */
|
|
#endif /* __AMXINTRIN_H */
|