mirror of
https://github.com/jart/cosmopolitan.git
synced 2025-01-31 19:43:32 +00:00
8f522cb702
This change progresses our AARCH64 support:
- The AARCH64 build and tests are now passing
- Add 128-bit floating-point support to printf()
- Fix clone() so it initializes cosmo's x28 TLS register
- Fix TLS memory layout issue with aarch64 _Alignas vars
- Revamp microbenchmarking tools so they work on aarch64
- Make some subtle improvements to aarch64 crash reporting
- Make kisdangerous() memory checks more accurate on aarch64
- Remove sys_open() since it's not available on Linux AARCH64
This change makes general improvements to Cosmo and Redbean:
- Introduce GetHostIsa() function in Redbean
- You can now feature check using pledge(0, 0)
- You can now feature check using unveil("",0)
- Refactor some more x86-specific asm comments
- Refactor and write docs for some libm functions
- Make the mmap() API behave more similar to Linux
- Fix WIFSIGNALED() which wrongly returned true for zero
- Rename some obscure cosmo keywords from noFOO to dontFOO
211 lines
5.6 KiB
ArmAsm
211 lines
5.6 KiB
ArmAsm
/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
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│vi: set et ft=asm ts=8 tw=8 fenc=utf-8 :vi│
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╞══════════════════════════════════════════════════════════════════════════════╡
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│ │
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│ Musl Libc │
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│ Copyright © 2005-2014 Rich Felker, et al. │
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│ │
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│ Permission is hereby granted, free of charge, to any person obtaining │
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│ a copy of this software and associated documentation files (the │
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│ "Software"), to deal in the Software without restriction, including │
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│ without limitation the rights to use, copy, modify, merge, publish, │
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│ distribute, sublicense, and/or sell copies of the Software, and to │
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│ permit persons to whom the Software is furnished to do so, subject to │
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│ the following conditions: │
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│ │
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│ The above copyright notice and this permission notice shall be │
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│ included in all copies or substantial portions of the Software. │
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│ │
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│ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, │
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│ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF │
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│ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. │
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│ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY │
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│ CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, │
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│ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE │
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│ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. │
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│ │
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╚─────────────────────────────────────────────────────────────────────────────*/
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#include "libc/macros.internal.h"
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// Clears floating point exception status, e.g.
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//
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// feclearexcept(FE_ALL_EXCEPT);
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//
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// @param excepts may bitwise-or the following:
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// - `FE_INVALID`
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// - `FE_DIVBYZERO`
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// - `FE_OVERFLOW`
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// - `FE_UNDERFLOW`
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// - `FE_INEXACT`
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// - `FE_ALL_EXCEPT` (all of the above)
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// @return 0 on success, or nonzero on error
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feclearexcept:
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#ifdef __x86_64__
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// maintain exceptions in the sse mxcsr, clear x87 exceptions
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mov %edi,%ecx
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and $0x3f,%ecx
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fnstsw %ax
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test %eax,%ecx
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jz 1f
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fnclex
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1: stmxcsr -8(%rsp)
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and $0x3f,%eax
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or %eax,-8(%rsp)
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test %ecx,-8(%rsp)
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jz 1f
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not %ecx
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and %ecx,-8(%rsp)
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ldmxcsr -8(%rsp)
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1: xor %eax,%eax
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ret
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#elif defined(__aarch64__)
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and w0,w0,#0x1f
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mrs x1,fpsr
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bic w1,w1,w0
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msr fpsr,x1
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mov w0,#0
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ret
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#else
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#error "unsupported architecture"
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#endif
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.endfn feclearexcept,globl
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// Checks for floating point exception.
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//
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// This function may be used to check the thread-local
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// floating-point exception status bits, e.g.
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//
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// feclearexcept(FE_ALL_EXCEPT);
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// volatile double x = 0, y = 1 / x;
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// assert(fetestexcept(FE_ALL_EXCEPT) == FE_DIVBYZERO);
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//
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// @param excepts may bitwise-or the following:
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// - `FE_INVALID`
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// - `FE_DIVBYZERO`
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// - `FE_OVERFLOW`
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// - `FE_UNDERFLOW`
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// - `FE_INEXACT`
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// - `FE_ALL_EXCEPT` (all of the above)
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// @return mask of which exception status codes are currently set,
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// or zero if there aren't any floating point exceptions
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fetestexcept:
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#ifdef __x86_64__
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and $0x3f,%edi
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push %rax
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stmxcsr (%rsp)
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pop %rsi
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fnstsw %ax
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or %esi,%eax
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and %edi,%eax
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ret
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#elif defined(__aarch64__)
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and w0,w0,#0x1f
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mrs x1,fpsr
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and w0,w0,w1
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ret
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#endif
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.endfn fetestexcept,globl
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feraiseexcept:
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#ifdef __x86_64__
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and $0x3f,%edi
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stmxcsr -8(%rsp)
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or %edi,-8(%rsp)
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ldmxcsr -8(%rsp)
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xor %eax,%eax
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ret
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#elif defined(__aarch64__)
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and w0,w0,#0x1f
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mrs x1,fpsr
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orr w1,w1,w0
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msr fpsr,x1
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mov w0,#0
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ret
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#endif
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.endfn feraiseexcept,globl
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__fesetround:
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#ifdef __x86_64__
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push %rax
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xor %eax,%eax
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mov %edi,%ecx
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fnstcw (%rsp)
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andb $0xf3,1(%rsp)
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or %ch,1(%rsp)
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fldcw (%rsp)
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stmxcsr (%rsp)
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shl $3,%ch
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andb $0x9f,1(%rsp)
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or %ch,1(%rsp)
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ldmxcsr (%rsp)
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pop %rcx
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ret
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#elif defined(__aarch64__)
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mrs x1,fpcr
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bic w1,w1,#0xc00000
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orr w1,w1,w0
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msr fpcr,x1
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mov w0,#0
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ret
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#endif
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.endfn __fesetround,globl,hidden
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fegetround:
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#ifdef __x86_64__
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push %rax
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stmxcsr (%rsp)
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pop %rax
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shr $3,%eax
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and $0xc00,%eax
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ret
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#elif defined(__aarch64__)
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mrs x0,fpcr
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and w0,w0,#0xc00000
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ret
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#endif
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.endfn fegetround,globl
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fegetenv:
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#ifdef __x86_64__
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xor %eax,%eax
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fnstenv (%rdi)
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stmxcsr 28(%rdi)
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ret
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#elif defined(__aarch64__)
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mrs x1,fpcr
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mrs x2,fpsr
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stp w1,w2,[x0]
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mov w0,#0
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ret
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#endif
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.endfn fegetenv,globl
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fesetenv:
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#ifdef __x86_64__
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xor %eax,%eax
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inc %rdi
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jz 1f
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fldenv -1(%rdi)
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ldmxcsr 27(%rdi)
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ret
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1: push %rax
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push %rax
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pushq $0xffff
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pushq $0x37f
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fldenv (%rsp)
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pushq $0x1f80
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ldmxcsr (%rsp)
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add $40,%rsp
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ret
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#elif defined(__aarch64__)
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mov x1,#0
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mov x2,#0
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cmn x0,#1
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b.eq 1f
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ldp w1,w2,[x0]
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1: msr fpcr,x1
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msr fpsr,x2
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mov w0,#0
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ret
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#endif
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.endfn fesetenv,globl
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