mirror of
https://github.com/jart/cosmopolitan.git
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eb40cb371d
This change implements a new approach to function call logging, that's based on the GCC flag: -fpatchable-function-entry. Read the commentary in build/config.mk to learn how it works.
220 lines
7.4 KiB
ArmAsm
220 lines
7.4 KiB
ArmAsm
/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
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│vi: set et ft=asm ts=8 tw=8 fenc=utf-8 :vi│
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╚──────────────────────────────────────────────────────────────────────────────╝
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│ │
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│ Optimized Routines │
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│ Copyright (c) 1999-2022, Arm Limited. │
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│ │
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│ Permission is hereby granted, free of charge, to any person obtaining │
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│ a copy of this software and associated documentation files (the │
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│ "Software"), to deal in the Software without restriction, including │
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│ without limitation the rights to use, copy, modify, merge, publish, │
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│ distribute, sublicense, and/or sell copies of the Software, and to │
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│ permit persons to whom the Software is furnished to do so, subject to │
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│ the following conditions: │
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│ │
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│ The above copyright notice and this permission notice shall be │
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│ included in all copies or substantial portions of the Software. │
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│ │
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│ THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, │
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│ EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF │
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│ MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. │
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│ IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY │
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│ CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, │
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│ TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE │
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│ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. │
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│ │
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╚─────────────────────────────────────────────────────────────────────────────*/
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#include "libc/intrin/aarch64/asmdefs.internal.h"
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#define __strlen_aarch64 strlen
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.ident "\n\n\
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Optimized Routines (MIT License)\n\
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Copyright 2022 ARM Limited\n"
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.include "libc/disclaimer.inc"
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/* Assumptions:
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*
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* ARMv8-a, AArch64, Advanced SIMD, unaligned accesses.
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* Not MTE compatible.
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*/
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#define srcin x0
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#define len x0
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#define src x1
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#define data1 x2
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#define data2 x3
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#define has_nul1 x4
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#define has_nul2 x5
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#define tmp1 x4
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#define tmp2 x5
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#define tmp3 x6
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#define tmp4 x7
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#define zeroones x8
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#define maskv v0
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#define maskd d0
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#define dataq1 q1
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#define dataq2 q2
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#define datav1 v1
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#define datav2 v2
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#define tmp x2
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#define tmpw w2
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#define synd x3
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#define syndw w3
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#define shift x4
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/* For the first 32 bytes, NUL detection works on the principle that
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(X - 1) & (~X) & 0x80 (=> (X - 1) & ~(X | 0x7f)) is non-zero if a
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byte is zero, and can be done in parallel across the entire word. */
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#define REP8_01 0x0101010101010101
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#define REP8_7f 0x7f7f7f7f7f7f7f7f
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/* To test the page crossing code path more thoroughly, compile with
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-DTEST_PAGE_CROSS - this will force all calls through the slower
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entry path. This option is not intended for production use. */
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#ifdef TEST_PAGE_CROSS
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# define MIN_PAGE_SIZE 32
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#else
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# define MIN_PAGE_SIZE 4096
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#endif
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/* Core algorithm:
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Since strings are short on average, we check the first 32 bytes of the
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string for a NUL character without aligning the string. In order to use
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unaligned loads safely we must do a page cross check first.
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If there is a NUL byte we calculate the length from the 2 8-byte words
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using conditional select to reduce branch mispredictions (it is unlikely
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strlen will be repeatedly called on strings with the same length).
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If the string is longer than 32 bytes, align src so we don't need further
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page cross checks, and process 32 bytes per iteration using a fast SIMD
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loop.
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If the page cross check fails, we read 32 bytes from an aligned address,
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and ignore any characters before the string. If it contains a NUL
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character, return the length, if not, continue in the main loop. */
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ENTRY (__strlen_aarch64)
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PTR_ARG (0)
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and tmp1, srcin, MIN_PAGE_SIZE - 1
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cmp tmp1, MIN_PAGE_SIZE - 32
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b.hi L(page_cross)
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/* Look for a NUL byte in the first 16 bytes. */
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ldp data1, data2, [srcin]
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mov zeroones, REP8_01
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#ifdef __AARCH64EB__
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/* For big-endian, carry propagation (if the final byte in the
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string is 0x01) means we cannot use has_nul1/2 directly.
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Since we expect strings to be small and early-exit,
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byte-swap the data now so has_null1/2 will be correct. */
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rev data1, data1
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rev data2, data2
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#endif
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sub tmp1, data1, zeroones
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orr tmp2, data1, REP8_7f
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sub tmp3, data2, zeroones
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orr tmp4, data2, REP8_7f
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bics has_nul1, tmp1, tmp2
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bic has_nul2, tmp3, tmp4
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ccmp has_nul2, 0, 0, eq
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b.eq L(bytes16_31)
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/* Find the exact offset of the first NUL byte in the first 16 bytes
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from the string start. Enter with C = has_nul1 == 0. */
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csel has_nul1, has_nul1, has_nul2, cc
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mov len, 8
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rev has_nul1, has_nul1
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csel len, xzr, len, cc
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clz tmp1, has_nul1
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add len, len, tmp1, lsr 3
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ret
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/* Look for a NUL byte at offset 16..31 in the string. */
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L(bytes16_31):
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ldp data1, data2, [srcin, 16]
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#ifdef __AARCH64EB__
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rev data1, data1
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rev data2, data2
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#endif
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sub tmp1, data1, zeroones
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orr tmp2, data1, REP8_7f
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sub tmp3, data2, zeroones
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orr tmp4, data2, REP8_7f
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bics has_nul1, tmp1, tmp2
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bic has_nul2, tmp3, tmp4
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ccmp has_nul2, 0, 0, eq
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b.eq L(loop_entry)
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/* Find the exact offset of the first NUL byte at offset 16..31 from
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the string start. Enter with C = has_nul1 == 0. */
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csel has_nul1, has_nul1, has_nul2, cc
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mov len, 24
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rev has_nul1, has_nul1
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mov tmp3, 16
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clz tmp1, has_nul1
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csel len, tmp3, len, cc
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add len, len, tmp1, lsr 3
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ret
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nop
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L(loop_entry):
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bic src, srcin, 31
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.p2align 5
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L(loop):
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ldp dataq1, dataq2, [src, 32]!
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uminp maskv.16b, datav1.16b, datav2.16b
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uminp maskv.16b, maskv.16b, maskv.16b
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cmeq maskv.8b, maskv.8b, 0
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fmov synd, maskd
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cbz synd, L(loop)
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/* Low 32 bits of synd are non-zero if a NUL was found in datav1. */
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cmeq maskv.16b, datav1.16b, 0
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sub len, src, srcin
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cbnz syndw, 1f
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cmeq maskv.16b, datav2.16b, 0
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add len, len, 16
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1:
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/* Generate a bitmask and compute correct byte offset. */
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shrn maskv.8b, maskv.8h, 4
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fmov synd, maskd
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#ifndef __AARCH64EB__
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rbit synd, synd
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#endif
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clz tmp, synd
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add len, len, tmp, lsr 2
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ret
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L(page_cross):
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bic src, srcin, 31
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mov tmpw, 0x0c03
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movk tmpw, 0xc030, lsl 16
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ld1 {datav1.16b, datav2.16b}, [src]
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dup maskv.4s, tmpw
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cmeq datav1.16b, datav1.16b, 0
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cmeq datav2.16b, datav2.16b, 0
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and datav1.16b, datav1.16b, maskv.16b
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and datav2.16b, datav2.16b, maskv.16b
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addp maskv.16b, datav1.16b, datav2.16b
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addp maskv.16b, maskv.16b, maskv.16b
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fmov synd, maskd
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lsl shift, srcin, 1
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lsr synd, synd, shift
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cbz synd, L(loop)
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rbit synd, synd
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clz len, synd
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lsr len, len, 1
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ret
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END (__strlen_aarch64)
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