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155 lines
6.2 KiB
C++
155 lines
6.2 KiB
C++
//= lib/fp_trunc_impl.inc - high precision -> low precision conversion *-*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a fairly generic conversion from a wider to a narrower
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// IEEE-754 floating-point type in the default (round to nearest, ties to even)
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// rounding mode. The constants and types defined following the includes below
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// parameterize the conversion.
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//
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// This routine can be trivially adapted to support conversions to
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// half-precision or from quad-precision. It does not support types that don't
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// use the usual IEEE-754 interchange formats; specifically, some work would be
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// needed to adapt it to (for example) the Intel 80-bit format or PowerPC
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// double-double format.
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//
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// Note please, however, that this implementation is only intended to support
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// *narrowing* operations; if you need to convert to a *wider* floating-point
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// type (e.g. float -> double), then this routine will not do what you want it
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// to.
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//
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// It also requires that integer types at least as large as both formats
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// are available on the target platform; this may pose a problem when trying
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// to add support for quad on some 32-bit systems, for example.
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//
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// Finally, the following assumptions are made:
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//
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// 1. Floating-point types and integer types have the same endianness on the
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// target platform.
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//
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// 2. Quiet NaNs, if supported, are indicated by the leading bit of the
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// significand field being set.
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//
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//===----------------------------------------------------------------------===//
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#include "fp16_trunc.inc"
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// The destination type may use a usual IEEE-754 interchange format or Intel
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// 80-bit format. In particular, for the destination type dstSigFracBits may be
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// not equal to dstSigBits. The source type is assumed to be one of IEEE-754
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// standard types.
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static __inline dst_t __truncXfYf2__(src_t a) {
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// Various constants whose values follow from the type parameters.
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// Any reasonable optimizer will fold and propagate all of these.
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const int srcInfExp = (1 << srcExpBits) - 1;
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const int srcExpBias = srcInfExp >> 1;
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const src_rep_t srcMinNormal = SRC_REP_C(1) << srcSigFracBits;
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const src_rep_t roundMask =
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(SRC_REP_C(1) << (srcSigFracBits - dstSigFracBits)) - 1;
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const src_rep_t halfway = SRC_REP_C(1)
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<< (srcSigFracBits - dstSigFracBits - 1);
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const src_rep_t srcQNaN = SRC_REP_C(1) << (srcSigFracBits - 1);
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const src_rep_t srcNaNCode = srcQNaN - 1;
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const int dstInfExp = (1 << dstExpBits) - 1;
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const int dstExpBias = dstInfExp >> 1;
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const int overflowExponent = srcExpBias + dstInfExp - dstExpBias;
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const dst_rep_t dstQNaN = DST_REP_C(1) << (dstSigFracBits - 1);
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const dst_rep_t dstNaNCode = dstQNaN - 1;
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const src_rep_t aRep = srcToRep(a);
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const src_rep_t srcSign = extract_sign_from_src(aRep);
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const src_rep_t srcExp = extract_exp_from_src(aRep);
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const src_rep_t srcSigFrac = extract_sig_frac_from_src(aRep);
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dst_rep_t dstSign = srcSign;
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dst_rep_t dstExp;
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dst_rep_t dstSigFrac;
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// Same size exponents and a's significand tail is 0.
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// The significand can be truncated and the exponent can be copied over.
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const int sigFracTailBits = srcSigFracBits - dstSigFracBits;
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if (srcExpBits == dstExpBits &&
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((aRep >> sigFracTailBits) << sigFracTailBits) == aRep) {
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dstExp = srcExp;
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dstSigFrac = (dst_rep_t)(srcSigFrac >> sigFracTailBits);
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return dstFromRep(construct_dst_rep(dstSign, dstExp, dstSigFrac));
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}
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const int dstExpCandidate = ((int)srcExp - srcExpBias) + dstExpBias;
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if (dstExpCandidate >= 1 && dstExpCandidate < dstInfExp) {
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// The exponent of a is within the range of normal numbers in the
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// destination format. We can convert by simply right-shifting with
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// rounding and adjusting the exponent.
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dstExp = dstExpCandidate;
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dstSigFrac = (dst_rep_t)(srcSigFrac >> sigFracTailBits);
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const src_rep_t roundBits = srcSigFrac & roundMask;
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// Round to nearest.
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if (roundBits > halfway)
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dstSigFrac++;
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// Tie to even.
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else if (roundBits == halfway)
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dstSigFrac += dstSigFrac & 1;
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// Rounding has changed the exponent.
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if (dstSigFrac >= (DST_REP_C(1) << dstSigFracBits)) {
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dstExp += 1;
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dstSigFrac ^= (DST_REP_C(1) << dstSigFracBits);
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}
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} else if (srcExp == srcInfExp && srcSigFrac) {
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// a is NaN.
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// Conjure the result by beginning with infinity, setting the qNaN
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// bit and inserting the (truncated) trailing NaN field.
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dstExp = dstInfExp;
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dstSigFrac = dstQNaN;
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dstSigFrac |= ((srcSigFrac & srcNaNCode) >> sigFracTailBits) & dstNaNCode;
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} else if ((int)srcExp >= overflowExponent) {
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dstExp = dstInfExp;
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dstSigFrac = 0;
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} else {
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// a underflows on conversion to the destination type or is an exact
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// zero. The result may be a denormal or zero. Extract the exponent
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// to get the shift amount for the denormalization.
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src_rep_t significand = srcSigFrac;
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int shift = srcExpBias - dstExpBias - srcExp;
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if (srcExp) {
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// Set the implicit integer bit if the source is a normal number.
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significand |= srcMinNormal;
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shift += 1;
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}
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// Right shift by the denormalization amount with sticky.
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if (shift > srcSigFracBits) {
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dstExp = 0;
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dstSigFrac = 0;
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} else {
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dstExp = 0;
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const bool sticky = shift && ((significand << (srcBits - shift)) != 0);
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src_rep_t denormalizedSignificand = significand >> shift | sticky;
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dstSigFrac = denormalizedSignificand >> sigFracTailBits;
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const src_rep_t roundBits = denormalizedSignificand & roundMask;
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// Round to nearest
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if (roundBits > halfway)
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dstSigFrac++;
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// Ties to even
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else if (roundBits == halfway)
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dstSigFrac += dstSigFrac & 1;
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// Rounding has changed the exponent.
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if (dstSigFrac >= (DST_REP_C(1) << dstSigFracBits)) {
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dstExp += 1;
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dstSigFrac ^= (DST_REP_C(1) << dstSigFracBits);
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}
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}
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}
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return dstFromRep(construct_dst_rep(dstSign, dstExp, dstSigFrac));
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}
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