2019-06-04 08:11:33 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2014-09-01 08:28:34 +00:00
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/*
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* Header file for device driver Hi6421 PMIC
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*
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* Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
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* http://www.hisilicon.com
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* Copyright (c) <2013-2014> Linaro Ltd.
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2020-07-22 19:24:54 +00:00
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* https://www.linaro.org
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2014-09-01 08:28:34 +00:00
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*
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* Author: Guodong Xu <guodong.xu@linaro.org>
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*/
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#ifndef __HI6421_PMIC_H
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#define __HI6421_PMIC_H
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/* Hi6421 registers are mapped to memory bus in 4 bytes stride */
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#define HI6421_REG_TO_BUS_ADDR(x) (x << 2)
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/* Hi6421 maximum register number */
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#define HI6421_REG_MAX 0xFF
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/* Hi6421 OCP (over current protection) and DEB (debounce) control register */
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#define HI6421_OCP_DEB_CTRL_REG HI6421_REG_TO_BUS_ADDR(0x51)
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#define HI6421_OCP_DEB_SEL_MASK 0x0C
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#define HI6421_OCP_DEB_SEL_8MS 0x00
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#define HI6421_OCP_DEB_SEL_16MS 0x04
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#define HI6421_OCP_DEB_SEL_32MS 0x08
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#define HI6421_OCP_DEB_SEL_64MS 0x0C
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#define HI6421_OCP_EN_DEBOUNCE_MASK 0x02
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#define HI6421_OCP_EN_DEBOUNCE_ENABLE 0x02
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#define HI6421_OCP_AUTO_STOP_MASK 0x01
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#define HI6421_OCP_AUTO_STOP_ENABLE 0x01
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struct hi6421_pmic {
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struct regmap *regmap;
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};
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2017-07-20 07:32:42 +00:00
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enum hi6421_type {
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HI6421 = 0,
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HI6421_V530,
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};
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2014-09-01 08:28:34 +00:00
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#endif /* __HI6421_PMIC_H */
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