2016-01-25 15:50:11 +00:00
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/*
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2020-07-22 19:24:54 +00:00
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* Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
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2016-01-25 15:50:11 +00:00
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* Andrew F. Davis <afd@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether expressed or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License version 2 for more details.
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*
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* Based on the TPS65912 driver
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*/
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#ifndef __LINUX_MFD_TPS65086_H
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#define __LINUX_MFD_TPS65086_H
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#include <linux/device.h>
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#include <linux/regmap.h>
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/* List of registers for TPS65086 */
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#define TPS65086_DEVICEID 0x01
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#define TPS65086_IRQ 0x02
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#define TPS65086_IRQ_MASK 0x03
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#define TPS65086_PMICSTAT 0x04
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#define TPS65086_SHUTDNSRC 0x05
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#define TPS65086_BUCK1CTRL 0x20
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#define TPS65086_BUCK2CTRL 0x21
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#define TPS65086_BUCK3DECAY 0x22
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#define TPS65086_BUCK3VID 0x23
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#define TPS65086_BUCK3SLPCTRL 0x24
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#define TPS65086_BUCK4CTRL 0x25
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#define TPS65086_BUCK5CTRL 0x26
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#define TPS65086_BUCK6CTRL 0x27
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#define TPS65086_LDOA2CTRL 0x28
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#define TPS65086_LDOA3CTRL 0x29
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#define TPS65086_DISCHCTRL1 0x40
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#define TPS65086_DISCHCTRL2 0x41
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#define TPS65086_DISCHCTRL3 0x42
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#define TPS65086_PG_DELAY1 0x43
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#define TPS65086_FORCESHUTDN 0x91
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#define TPS65086_BUCK1SLPCTRL 0x92
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#define TPS65086_BUCK2SLPCTRL 0x93
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#define TPS65086_BUCK4VID 0x94
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#define TPS65086_BUCK4SLPVID 0x95
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#define TPS65086_BUCK5VID 0x96
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#define TPS65086_BUCK5SLPVID 0x97
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#define TPS65086_BUCK6VID 0x98
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#define TPS65086_BUCK6SLPVID 0x99
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#define TPS65086_LDOA2VID 0x9A
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#define TPS65086_LDOA3VID 0x9B
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#define TPS65086_BUCK123CTRL 0x9C
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#define TPS65086_PG_DELAY2 0x9D
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#define TPS65086_PIN_EN_MASK1 0x9E
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#define TPS65086_PIN_EN_MASK2 0x9F
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#define TPS65086_SWVTT_EN 0x9F
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#define TPS65086_PIN_EN_OVR1 0xA0
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#define TPS65086_PIN_EN_OVR2 0xA1
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#define TPS65086_GPOCTRL 0xA1
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#define TPS65086_PWR_FAULT_MASK1 0xA2
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#define TPS65086_PWR_FAULT_MASK2 0xA3
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#define TPS65086_GPO1PG_CTRL1 0xA4
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#define TPS65086_GPO1PG_CTRL2 0xA5
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#define TPS65086_GPO4PG_CTRL1 0xA6
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#define TPS65086_GPO4PG_CTRL2 0xA7
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#define TPS65086_GPO2PG_CTRL1 0xA8
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#define TPS65086_GPO2PG_CTRL2 0xA9
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#define TPS65086_GPO3PG_CTRL1 0xAA
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#define TPS65086_GPO3PG_CTRL2 0xAB
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#define TPS65086_LDOA1CTRL 0xAE
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#define TPS65086_PG_STATUS1 0xB0
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#define TPS65086_PG_STATUS2 0xB1
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#define TPS65086_PWR_FAULT_STATUS1 0xB2
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#define TPS65086_PWR_FAULT_STATUS2 0xB3
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#define TPS65086_TEMPCRIT 0xB4
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#define TPS65086_TEMPHOT 0xB5
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#define TPS65086_OC_STATUS 0xB6
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/* IRQ Register field definitions */
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#define TPS65086_IRQ_DIETEMP_MASK BIT(0)
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#define TPS65086_IRQ_SHUTDN_MASK BIT(3)
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#define TPS65086_IRQ_FAULT_MASK BIT(7)
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/* DEVICEID Register field definitions */
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#define TPS65086_DEVICEID_PART_MASK GENMASK(3, 0)
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#define TPS65086_DEVICEID_OTP_MASK GENMASK(5, 4)
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#define TPS65086_DEVICEID_REV_MASK GENMASK(7, 6)
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/* VID Masks */
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#define BUCK_VID_MASK GENMASK(7, 1)
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#define VDOA1_VID_MASK GENMASK(4, 1)
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#define VDOA23_VID_MASK GENMASK(3, 0)
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/* Define the TPS65086 IRQ numbers */
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enum tps65086_irqs {
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TPS65086_IRQ_DIETEMP,
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TPS65086_IRQ_SHUTDN,
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TPS65086_IRQ_FAULT,
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};
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/**
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* struct tps65086 - state holder for the tps65086 driver
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*
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* Device data may be used to access the TPS65086 chip
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*/
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struct tps65086 {
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struct device *dev;
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struct regmap *regmap;
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/* IRQ Data */
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int irq;
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struct regmap_irq_chip_data *irq_data;
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};
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#endif /* __LINUX_MFD_TPS65086_H */
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