2020-06-29 11:05:08 +00:00
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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
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2016-10-01 18:59:55 +00:00
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/* QLogic qed NIC Driver
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2017-01-01 11:57:00 +00:00
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* Copyright (c) 2015-2017 QLogic Corporation
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2020-06-29 11:05:09 +00:00
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* Copyright (c) 2019-2020 Marvell International Ltd.
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2016-10-01 18:59:55 +00:00
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*/
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#ifndef _QED_LL2_IF_H
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#define _QED_LL2_IF_H
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/pci.h>
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#include <linux/skbuff.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/qed/qed_if.h>
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2017-06-09 14:13:20 +00:00
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enum qed_ll2_conn_type {
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QED_LL2_TYPE_FCOE,
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QED_LL2_TYPE_TCP_ULP,
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2017-06-09 14:13:20 +00:00
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QED_LL2_TYPE_TEST,
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2017-07-02 07:29:23 +00:00
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QED_LL2_TYPE_OOO,
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QED_LL2_TYPE_RESERVED2,
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QED_LL2_TYPE_ROCE,
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2017-07-02 07:29:24 +00:00
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QED_LL2_TYPE_IWARP,
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2017-06-09 14:13:20 +00:00
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QED_LL2_TYPE_RESERVED3,
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2020-01-27 13:26:12 +00:00
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MAX_QED_LL2_CONN_TYPE
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};
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enum qed_ll2_rx_conn_type {
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QED_LL2_RX_TYPE_LEGACY,
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QED_LL2_RX_TYPE_CTX,
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2017-06-09 14:13:20 +00:00
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MAX_QED_LL2_RX_CONN_TYPE
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};
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2017-06-09 14:13:18 +00:00
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enum qed_ll2_roce_flavor_type {
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QED_LL2_ROCE,
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QED_LL2_RROCE,
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MAX_QED_LL2_ROCE_FLAVOR_TYPE
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};
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enum qed_ll2_tx_dest {
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QED_LL2_TX_DEST_NW, /* Light L2 TX Destination to the Network */
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QED_LL2_TX_DEST_LB, /* Light L2 TX Destination to the Loopback */
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2017-10-09 09:37:45 +00:00
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QED_LL2_TX_DEST_DROP, /* Light L2 Drop the TX packet */
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2017-06-09 14:13:18 +00:00
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QED_LL2_TX_DEST_MAX
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};
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2017-06-09 14:13:20 +00:00
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enum qed_ll2_error_handle {
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QED_LL2_DROP_PACKET,
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QED_LL2_DO_NOTHING,
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QED_LL2_ASSERT,
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};
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2016-10-01 18:59:55 +00:00
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struct qed_ll2_stats {
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u64 gsi_invalid_hdr;
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u64 gsi_invalid_pkt_length;
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u64 gsi_unsupported_pkt_typ;
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u64 gsi_crcchksm_error;
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u64 packet_too_big_discard;
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u64 no_buff_discard;
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u64 rcv_ucast_bytes;
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u64 rcv_mcast_bytes;
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u64 rcv_bcast_bytes;
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u64 rcv_ucast_pkts;
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u64 rcv_mcast_pkts;
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u64 rcv_bcast_pkts;
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u64 sent_ucast_bytes;
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u64 sent_mcast_bytes;
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u64 sent_bcast_bytes;
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u64 sent_ucast_pkts;
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u64 sent_mcast_pkts;
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u64 sent_bcast_pkts;
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};
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2017-06-09 14:13:19 +00:00
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struct qed_ll2_comp_rx_data {
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void *cookie;
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dma_addr_t rx_buf_addr;
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u16 parse_flags;
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2017-09-24 09:09:45 +00:00
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u16 err_flags;
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2017-06-09 14:13:19 +00:00
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u16 vlan;
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bool b_last_packet;
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u8 connection_handle;
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union {
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u16 packet_length;
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u16 data_length;
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} length;
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u32 opaque_data_0;
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u32 opaque_data_1;
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/* GSI only */
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2017-12-27 17:30:07 +00:00
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u32 src_qp;
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2017-06-09 14:13:19 +00:00
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u16 qp_id;
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union {
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u8 placement_offset;
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u8 data_length_error;
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} u;
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};
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2017-06-09 14:13:22 +00:00
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typedef
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void (*qed_ll2_complete_rx_packet_cb)(void *cxt,
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struct qed_ll2_comp_rx_data *data);
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typedef
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void (*qed_ll2_release_rx_packet_cb)(void *cxt,
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u8 connection_handle,
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void *cookie,
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dma_addr_t rx_buf_addr,
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bool b_last_packet);
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typedef
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void (*qed_ll2_complete_tx_packet_cb)(void *cxt,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment,
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bool b_last_packet);
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typedef
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void (*qed_ll2_release_tx_packet_cb)(void *cxt,
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u8 connection_handle,
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void *cookie,
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dma_addr_t first_frag_addr,
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bool b_last_fragment, bool b_last_packet);
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2017-10-09 09:37:48 +00:00
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typedef
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void (*qed_ll2_slowpath_cb)(void *cxt, u8 connection_handle,
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u32 opaque_data_0, u32 opaque_data_1);
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2017-06-09 14:13:22 +00:00
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struct qed_ll2_cbs {
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qed_ll2_complete_rx_packet_cb rx_comp_cb;
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qed_ll2_release_rx_packet_cb rx_release_cb;
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qed_ll2_complete_tx_packet_cb tx_comp_cb;
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qed_ll2_release_tx_packet_cb tx_release_cb;
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2017-10-09 09:37:48 +00:00
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qed_ll2_slowpath_cb slowpath_cb;
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2017-06-09 14:13:22 +00:00
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void *cookie;
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};
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2017-06-09 14:13:20 +00:00
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struct qed_ll2_acquire_data_inputs {
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2020-01-27 13:26:12 +00:00
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enum qed_ll2_rx_conn_type rx_conn_type;
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2017-06-09 14:13:20 +00:00
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enum qed_ll2_conn_type conn_type;
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u16 mtu;
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u16 rx_num_desc;
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u16 rx_num_ooo_buffers;
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u8 rx_drop_ttl0_flg;
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u8 rx_vlan_removal_en;
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u16 tx_num_desc;
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u8 tx_max_bds_per_packet;
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u8 tx_tc;
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enum qed_ll2_tx_dest tx_dest;
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enum qed_ll2_error_handle ai_err_packet_too_big;
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enum qed_ll2_error_handle ai_err_no_buf;
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2017-10-09 09:37:44 +00:00
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bool secondary_queue;
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2017-06-09 14:13:20 +00:00
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u8 gsi_enable;
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};
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struct qed_ll2_acquire_data {
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struct qed_ll2_acquire_data_inputs input;
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2017-06-09 14:13:22 +00:00
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const struct qed_ll2_cbs *cbs;
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2017-06-09 14:13:20 +00:00
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/* Output container for LL2 connection's handle */
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u8 *p_connection_handle;
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};
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2017-06-09 14:13:18 +00:00
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struct qed_ll2_tx_pkt_info {
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void *cookie;
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dma_addr_t first_frag;
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enum qed_ll2_tx_dest tx_dest;
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enum qed_ll2_roce_flavor_type qed_roce_flavor;
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u16 vlan;
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u16 l4_hdr_offset_w; /* from start of packet */
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u16 first_frag_len;
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u8 num_of_bds;
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u8 bd_flags;
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bool enable_ip_cksum;
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bool enable_l4_cksum;
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bool calc_ip_len;
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2018-05-06 01:43:02 +00:00
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bool remove_stag;
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2017-06-09 14:13:18 +00:00
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};
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2016-10-01 18:59:55 +00:00
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#define QED_LL2_UNUSED_HANDLE (0xff)
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struct qed_ll2_cb_ops {
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int (*rx_cb)(void *, struct sk_buff *, u32, u32);
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int (*tx_cb)(void *, struct sk_buff *, bool);
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};
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struct qed_ll2_params {
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u16 mtu;
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bool drop_ttl0_packets;
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bool rx_vlan_stripping;
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u8 tx_tc;
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bool frags_mapped;
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u8 ll2_mac_address[ETH_ALEN];
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};
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2018-05-06 01:43:02 +00:00
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enum qed_ll2_xmit_flags {
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/* FIP discovery packet */
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QED_LL2_XMIT_FLAGS_FIP_DISCOVERY
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};
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2016-10-01 18:59:55 +00:00
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struct qed_ll2_ops {
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/**
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2021-10-04 06:58:39 +00:00
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* start(): Initializes ll2.
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2016-10-01 18:59:55 +00:00
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*
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* @cdev: Qed dev pointer.
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* @params: Protocol driver configuration for the ll2.
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*
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* Return: 0 on success, otherwise error value.
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2016-10-01 18:59:55 +00:00
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*/
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int (*start)(struct qed_dev *cdev, struct qed_ll2_params *params);
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/**
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* stop(): Stops the ll2
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* @cdev: Qed dev pointer.
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2016-10-01 18:59:55 +00:00
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*
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* Return: 0 on success, otherwise error value.
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2016-10-01 18:59:55 +00:00
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*/
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int (*stop)(struct qed_dev *cdev);
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/**
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2021-10-04 06:58:39 +00:00
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* start_xmit(): Transmits an skb over the ll2 interface
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* @cdev: Qed dev pointer.
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* @skb: SKB.
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* @xmit_flags: Transmit options defined by the enum qed_ll2_xmit_flags.
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* Return: 0 on success, otherwise error value.
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2016-10-01 18:59:55 +00:00
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*/
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2018-05-06 01:43:02 +00:00
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int (*start_xmit)(struct qed_dev *cdev, struct sk_buff *skb,
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unsigned long xmit_flags);
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2016-10-01 18:59:55 +00:00
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/**
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2021-10-04 06:58:39 +00:00
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* register_cb_ops(): Protocol driver register the callback for Rx/Tx
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2016-10-01 18:59:55 +00:00
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* packets. Should be called before `start'.
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*
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2021-10-04 06:58:39 +00:00
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* @cdev: Qed dev pointer.
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* @cookie: to be passed to the callback functions.
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* @ops: the callback functions to register for Rx / Tx.
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* Return: 0 on success, otherwise error value.
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2016-10-01 18:59:55 +00:00
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*/
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void (*register_cb_ops)(struct qed_dev *cdev,
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const struct qed_ll2_cb_ops *ops,
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void *cookie);
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/**
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2021-10-04 06:58:39 +00:00
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* get_stats(): Get LL2 related statistics.
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* @cdev: Qed dev pointer.
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* @stats: Pointer to struct that would be filled with stats.
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2016-10-01 18:59:55 +00:00
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*
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2021-10-04 06:58:39 +00:00
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* Return: 0 on success, error otherwise.
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2016-10-01 18:59:55 +00:00
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*/
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int (*get_stats)(struct qed_dev *cdev, struct qed_ll2_stats *stats);
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};
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#ifdef CONFIG_QED_LL2
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int qed_ll2_alloc_if(struct qed_dev *);
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void qed_ll2_dealloc_if(struct qed_dev *);
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#else
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static const struct qed_ll2_ops qed_ll2_ops_pass = {
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.start = NULL,
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.stop = NULL,
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.start_xmit = NULL,
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.register_cb_ops = NULL,
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.get_stats = NULL,
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};
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static inline int qed_ll2_alloc_if(struct qed_dev *cdev)
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{
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return 0;
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}
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static inline void qed_ll2_dealloc_if(struct qed_dev *cdev)
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{
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}
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#endif
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#endif
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