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linux-stable/arch/arm64/boot/dts/qcom/sdm845-mtp.dts

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arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-12 14:12:24 +00:00
// SPDX-License-Identifier: GPL-2.0
/*
* SDM845 MTP board device tree source
*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
*/
/dts-v1/;
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Add regulator devices for PMIC regulators managed via VRM and XOB RPMh accelerators. A few notes here: - Regulators are added directly to the board file. While it's true that this will mean a bunch of copy/pasting for other boards that are very similar, this is probably the right call since boards could make changes to the way these regulators are hooked up and trying to find a way to avoid duplication will result in some confusing node overrides. - Regulators that are hooked up to supply pins on the SoC are given an alias matching the name of that pin (pin name comes from the Qualcomm SoC "device specification" doc). - Other regulator labels are based on the schematic. If there is more than one logical name on the schematic for the same rail the secondary names are also listed and should be referred to as appropriate. - Regulators all default to HPM mode w/ no ability to switch modes. Future patches can switch things to LPM and possibly add dynamic load switching if we have determined there's a benefit. This should only be done for rails where we'll actually be able to take advantage of the lower power modes so we don't need to churn with lots of patches adding regulator_set_load() calls to drivers. NOTE: This patch is loosely based on one originally shared to me by David Collins. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:28 +00:00
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-12 14:12:24 +00:00
#include "sdm845.dtsi"
arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
2021-10-05 03:25:31 +00:00
#include "pm8998.dtsi"
#include "pmi8998.dtsi"
arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-12 14:12:24 +00:00
/ {
model = "Qualcomm Technologies, Inc. SDM845 MTP";
arm64: dts: qcom: sdm845: Add SoC compatible to MTP Add missing SoC compatible to SDM845 MTP board file. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200504202243.5476-2-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-04 20:22:32 +00:00
compatible = "qcom,sdm845-mtp", "qcom,sdm845";
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
aliases {
serial0 = &uart9;
};
chosen {
stdout-path = "serial0:115200n8";
};
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Add regulator devices for PMIC regulators managed via VRM and XOB RPMh accelerators. A few notes here: - Regulators are added directly to the board file. While it's true that this will mean a bunch of copy/pasting for other boards that are very similar, this is probably the right call since boards could make changes to the way these regulators are hooked up and trying to find a way to avoid duplication will result in some confusing node overrides. - Regulators that are hooked up to supply pins on the SoC are given an alias matching the name of that pin (pin name comes from the Qualcomm SoC "device specification" doc). - Other regulator labels are based on the schematic. If there is more than one logical name on the schematic for the same rail the secondary names are also listed and should be referred to as appropriate. - Regulators all default to HPM mode w/ no ability to switch modes. Future patches can switch things to LPM and possibly add dynamic load switching if we have determined there's a benefit. This should only be done for rails where we'll actually be able to take advantage of the lower power modes so we don't need to churn with lots of patches adding regulator_set_load() calls to drivers. NOTE: This patch is loosely based on one originally shared to me by David Collins. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:28 +00:00
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
regulator-min-microvolt = <3700000>;
regulator-max-microvolt = <3700000>;
};
/*
* Apparently RPMh does not provide support for PM8998 S4 because it
* is always-on; model it as a fixed regulator.
*/
vreg_s4a_1p8: pm8998-smps4 {
compatible = "regulator-fixed";
regulator-name = "vreg_s4a_1p8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vph_pwr>;
};
arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
2021-10-05 03:25:31 +00:00
thermal-zones {
xo_thermal: xo-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm8998_adc_tm 1>;
trips {
trip-point {
temperature = <125000>;
hysteresis = <10000>;
type = "passive";
};
};
};
msm_thermal: msm-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm8998_adc_tm 2>;
trips {
trip-point {
temperature = <125000>;
hysteresis = <10000>;
type = "passive";
};
};
};
pa_thermal: pa-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm8998_adc_tm 3>;
trips {
trip-point {
temperature = <125000>;
hysteresis = <10000>;
type = "passive";
};
};
};
quiet_thermal: quiet-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&pm8998_adc_tm 4>;
trips {
trip-point {
temperature = <125000>;
hysteresis = <10000>;
type = "passive";
};
};
};
};
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Add regulator devices for PMIC regulators managed via VRM and XOB RPMh accelerators. A few notes here: - Regulators are added directly to the board file. While it's true that this will mean a bunch of copy/pasting for other boards that are very similar, this is probably the right call since boards could make changes to the way these regulators are hooked up and trying to find a way to avoid duplication will result in some confusing node overrides. - Regulators that are hooked up to supply pins on the SoC are given an alias matching the name of that pin (pin name comes from the Qualcomm SoC "device specification" doc). - Other regulator labels are based on the schematic. If there is more than one logical name on the schematic for the same rail the secondary names are also listed and should be referred to as appropriate. - Regulators all default to HPM mode w/ no ability to switch modes. Future patches can switch things to LPM and possibly add dynamic load switching if we have determined there's a benefit. This should only be done for rails where we'll actually be able to take advantage of the lower power modes so we don't need to churn with lots of patches adding regulator_set_load() calls to drivers. NOTE: This patch is loosely based on one originally shared to me by David Collins. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:28 +00:00
};
arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-02-06 05:13:30 +00:00
&adsp_pas {
status = "okay";
arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware Update the firmware-name of the remoteproc nodes to mimic the firmware structure on other 845 devices. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200302020757.551483-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-02 02:07:57 +00:00
firmware-name = "qcom/sdm845/adsp.mdt";
arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-02-06 05:13:30 +00:00
};
arm64: dts: qcom: sdm845-mtp: Add RPMh VRM/XOB regulators Add regulator devices for PMIC regulators managed via VRM and XOB RPMh accelerators. A few notes here: - Regulators are added directly to the board file. While it's true that this will mean a bunch of copy/pasting for other boards that are very similar, this is probably the right call since boards could make changes to the way these regulators are hooked up and trying to find a way to avoid duplication will result in some confusing node overrides. - Regulators that are hooked up to supply pins on the SoC are given an alias matching the name of that pin (pin name comes from the Qualcomm SoC "device specification" doc). - Other regulator labels are based on the schematic. If there is more than one logical name on the schematic for the same rail the secondary names are also listed and should be referred to as appropriate. - Regulators all default to HPM mode w/ no ability to switch modes. Future patches can switch things to LPM and possibly add dynamic load switching if we have determined there's a benefit. This should only be done for rails where we'll actually be able to take advantage of the lower power modes so we don't need to churn with lots of patches adding regulator_set_load() calls to drivers. NOTE: This patch is loosely based on one originally shared to me by David Collins. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:28 +00:00
&apps_rsc {
pm8998-rpmh-regulators {
compatible = "qcom,pm8998-rpmh-regulators";
qcom,pmic-id = "a";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vdd-s7-supply = <&vph_pwr>;
vdd-s8-supply = <&vph_pwr>;
vdd-s9-supply = <&vph_pwr>;
vdd-s10-supply = <&vph_pwr>;
vdd-s11-supply = <&vph_pwr>;
vdd-s12-supply = <&vph_pwr>;
vdd-s13-supply = <&vph_pwr>;
vdd-l1-l27-supply = <&vreg_s7a_1p025>;
vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
vdd-l3-l11-supply = <&vreg_s7a_1p025>;
vdd-l4-l5-supply = <&vreg_s7a_1p025>;
vdd-l6-supply = <&vph_pwr>;
vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
vdd-l9-supply = <&vreg_bob>;
vdd-l10-l23-l25-supply = <&vreg_bob>;
vdd-l13-l19-l21-supply = <&vreg_bob>;
vdd-l16-l28-supply = <&vreg_bob>;
vdd-l18-l22-supply = <&vreg_bob>;
vdd-l20-l24-supply = <&vreg_bob>;
vdd-l26-supply = <&vreg_s3a_1p35>;
vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
vreg_s2a_1p125: smps2 {
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
vreg_s3a_1p35: smps3 {
regulator-min-microvolt = <1352000>;
regulator-max-microvolt = <1352000>;
};
vreg_s5a_2p04: smps5 {
regulator-min-microvolt = <1904000>;
regulator-max-microvolt = <2040000>;
};
vreg_s7a_1p025: smps7 {
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1028000>;
};
vdd_qusb_hs0:
vdda_hp_pcie_core:
vdda_mipi_csi0_0p9:
vdda_mipi_csi1_0p9:
vdda_mipi_csi2_0p9:
vdda_mipi_dsi0_pll:
vdda_mipi_dsi1_pll:
vdda_qlink_lv:
vdda_qlink_lv_ck:
vdda_qrefs_0p875:
vdda_pcie_core:
vdda_pll_cc_ebi01:
vdda_pll_cc_ebi23:
vdda_sp_sensor:
vdda_ufs1_core:
vdda_ufs2_core:
vdda_usb1_ss_core:
vdda_usb2_ss_core:
vreg_l1a_0p875: ldo1 {
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_10:
vreg_l2a_1p2: ldo2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
regulator-always-on;
};
vreg_l3a_1p0: ldo3 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdd_wcss_cx:
vdd_wcss_mx:
vdda_wcss_pll:
vreg_l5a_0p8: ldo5 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_13:
vreg_l6a_1p8: ldo6 {
regulator-min-microvolt = <1856000>;
regulator-max-microvolt = <1856000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7a_1p8: ldo7 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8a_1p2: ldo8 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1248000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9a_1p8: ldo9 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10a_1p8: ldo10 {
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l11a_1p0: ldo11 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1048000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdd_qfprom:
vdd_qfprom_sp:
vdda_apc1_cs_1p8:
vdda_gfx_cs_1p8:
vdda_qrefs_1p8:
vdda_qusb_hs0_1p8:
vddpx_11:
vreg_l12a_1p8: ldo12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vddpx_2:
vreg_l13a_2p95: ldo13 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14a_1p88: ldo14 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l15a_1p8: ldo15 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16a_2p7: ldo16 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17a_1p3: ldo17 {
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l18a_2p7: ldo18 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l19a_3p0: ldo19 {
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l20a_2p95: ldo20 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l21a_2p95: ldo21 {
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l22a_2p85: ldo22 {
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l23a_3p3: ldo23 {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdda_qusb_hs0_3p1:
vreg_l24a_3p075: ldo24 {
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l25a_3p3: ldo25 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3312000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vdda_hp_pcie_1p2:
vdda_hv_ebi0:
vdda_hv_ebi1:
vdda_hv_ebi2:
vdda_hv_ebi3:
vdda_mipi_csi_1p25:
vdda_mipi_dsi0_1p2:
vdda_mipi_dsi1_1p2:
vdda_pcie_1p2:
vdda_ufs1_1p2:
vdda_ufs2_1p2:
vdda_usb1_ss_1p2:
vdda_usb2_ss_1p2:
vreg_l26a_1p2: ldo26 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l28a_3p0: ldo28 {
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_lvs1a_1p8: lvs1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vreg_lvs2a_1p8: lvs2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
};
pmi8998-rpmh-regulators {
compatible = "qcom,pmi8998-rpmh-regulators";
qcom,pmic-id = "b";
vdd-bob-supply = <&vph_pwr>;
vreg_bob: bob {
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
regulator-allow-bypass;
};
};
pm8005-rpmh-regulators {
compatible = "qcom,pm8005-rpmh-regulators";
qcom,pmic-id = "c";
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vreg_s3c_0p6: smps3 {
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <600000>;
};
};
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
};
arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-02-06 05:13:30 +00:00
&cdsp_pas {
status = "okay";
arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware Update the firmware-name of the remoteproc nodes to mimic the firmware structure on other 845 devices. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200302020757.551483-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-02 02:07:57 +00:00
firmware-name = "qcom/sdm845/cdsp.mdt";
arm64: dts: sdm845: Introduce ADSP and CDSP PAS nodes Add the Audio DSP (ADSP) and Compute DSP (CDSP) nodes for TrustZone based remoteproc, supporting booting these cores on e.g. the MTP, and enable the same for the MTP. Tested-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-02-06 05:13:30 +00:00
};
arm64: dts: qcom: sdm845-mtp: Add Truly display Bring in the Truly display and enable the DSI channels to make the mdss/gpu probe, even though we're lacking LABIB, preventing us from seeing anything on the screen. Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Link: https://lore.kernel.org/r/20190513210747.22429-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-05-13 21:07:47 +00:00
&dsi0 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi0_1p2>;
qcom,dual-dsi-mode;
qcom,master-dsi;
ports {
port@1 {
endpoint {
remote-endpoint = <&truly_in_0>;
data-lanes = <0 1 2 3>;
};
};
};
panel@0 {
compatible = "truly,nt35597-2K-display";
reg = <0>;
vdda-supply = <&vreg_l14a_1p88>;
reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
truly_in_0: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
truly_in_1: endpoint {
remote-endpoint = <&dsi1_out>;
};
};
};
};
};
&dsi0_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi0_pll>;
};
&dsi1 {
status = "okay";
vdda-supply = <&vdda_mipi_dsi1_1p2>;
qcom,dual-dsi-mode;
arm64: dts: qcom: sdm845-mtp: assign DSI clock source parents Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-07-09 21:07:25 +00:00
/* DSI1 is slave, so use DSI0 clocks */
assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
arm64: dts: qcom: sdm845-mtp: Add Truly display Bring in the Truly display and enable the DSI channels to make the mdss/gpu probe, even though we're lacking LABIB, preventing us from seeing anything on the screen. Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Link: https://lore.kernel.org/r/20190513210747.22429-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-05-13 21:07:47 +00:00
ports {
port@1 {
endpoint {
remote-endpoint = <&truly_in_1>;
data-lanes = <0 1 2 3>;
};
};
};
};
&dsi1_phy {
status = "okay";
vdds-supply = <&vdda_mipi_dsi1_pll>;
};
arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks As of v4.20-rc1 probing the GCC driver on a SDM845 device with the standard security implementation causes an access violation and an immediate system restart. Use the protected-clocks property to mark the offending clocks protected for the MTP, in order to allow it to boot. Cc: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-06 05:50:13 +00:00
&gcc {
protected-clocks = <GCC_QSPI_CORE_CLK>,
<GCC_QSPI_CORE_CLK_SRC>,
arm64: dts: sdm845: Add lpasscc node This adds the low pass audio clock controller node to sdm845 based on the example in the bindings. Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> [bjorn: Disabled lpasscc node, as it's normally protected] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-05 08:00:36 +00:00
<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
arm64: dts: qcom: sdm845-mtp: Mark protected gcc clocks As of v4.20-rc1 probing the GCC driver on a SDM845 device with the standard security implementation causes an access violation and an immediate system restart. Use the protected-clocks property to mark the offending clocks protected for the MTP, in order to allow it to boot. Cc: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-11-06 05:50:13 +00:00
};
arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by default Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-10-02 00:13:55 +00:00
&gmu {
status = "okay";
};
arm64: dts: qcom: sdm845: move gpu zap nodes to per-device dts We want to specify per-device firmware-name, so move the zap node into the .dts file for individual boards/devices. This lets us get rid of the /delete-node/ for cheza, which does not use zap. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20200112195405.1132288-5-robdclark@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-12 19:54:00 +00:00
&gpu {
arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by default Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-10-02 00:13:55 +00:00
status = "okay";
arm64: dts: qcom: sdm845: move gpu zap nodes to per-device dts We want to specify per-device firmware-name, so move the zap node into the .dts file for individual boards/devices. This lets us get rid of the /delete-node/ for cheza, which does not use zap. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org> Link: https://lore.kernel.org/r/20200112195405.1132288-5-robdclark@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-01-12 19:54:00 +00:00
zap-shader {
memory-region = <&gpu_mem>;
firmware-name = "qcom/sdm845/a630_zap.mbn";
};
};
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
&i2c10 {
status = "okay";
clock-frequency = <400000>;
};
arm64: dts: qcom: sdm845-mtp: enable IPA Enable IPA on the SDM845 MTP. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20200519123258.29228-1-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-05-19 12:32:58 +00:00
&ipa {
status = "okay";
memory-region = <&ipa_fw_mem>;
};
arm64: dts: qcom: sdm845-mtp: Add Truly display Bring in the Truly display and enable the DSI channels to make the mdss/gpu probe, even though we're lacking LABIB, preventing us from seeing anything on the screen. Tested-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Link: https://lore.kernel.org/r/20190513210747.22429-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2019-05-13 21:07:47 +00:00
&mdss {
status = "okay";
};
arm64: dts: qcom: sdm845-mtp: Relocate remoteproc firmware Update the firmware-name of the remoteproc nodes to mimic the firmware structure on other 845 devices. Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200302020757.551483-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-03-02 02:07:57 +00:00
&mss_pil {
status = "okay";
firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
};
arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones Downstream defines four ADC channels related to thermal sensors external to the PM8998 and two channels for internal voltage measurements. Add these to the upstream SDM845 MTP, describe the thermal monitor channels and add thermal_zones for these. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
2021-10-05 03:25:31 +00:00
&pm8998_adc {
adc-chan@4c {
reg = <ADC5_XO_THERM_100K_PU>;
label = "xo_therm";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
adc-chan@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
label = "msm_therm";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
adc-chan@4f {
reg = <ADC5_AMUX_THM3_100K_PU>;
label = "pa_therm1";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
adc-chan@51 {
reg = <ADC5_AMUX_THM5_100K_PU>;
label = "quiet_therm";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
adc-chan@83 {
reg = <ADC5_VPH_PWR>;
label = "vph_pwr";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
adc-chan@85 {
reg = <ADC5_VCOIN>;
label = "vcoin";
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
};
&pm8998_adc_tm {
status = "okay";
xo-thermistor@1 {
reg = <1>;
io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
msm-thermistor@2 {
reg = <2>;
io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
pa-thermistor@3 {
reg = <3>;
io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
quiet-thermistor@4 {
reg = <4>;
io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
};
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
&qupv3_id_1 {
status = "okay";
};
arm64: dts: qcom: sdm845: Add SD nodes for sdm845-mtp Enable support for one of the micro SD slots on the MTP. Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-06 18:45:22 +00:00
&sdhc_2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
vmmc-supply = <&vreg_l21a_2p95>;
vqmmc-supply = <&vddpx_2>;
cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
arm64: dts: sdm845-mtp: Reserve reserved gpios With the introduction of commit 3edfb7bd76bd ("gpiolib: Show correct direction from the beginning") the gpiolib will attempt to read the direction of all pins, which triggers a read from protected register regions. The pins 0 through 3 and 81 through 84 are protected, so mark these as reserved. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-02 21:45:32 +00:00
};
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
&uart9 {
status = "okay";
};
arm64: dts: qcom: sdm845: Add UFS nodes for sdm845-mtp Enable the UFS host controller and PHY on sdm845-mtp. Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Can Guo <cang@codeaurora.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-10 19:28:25 +00:00
&ufs_mem_hc {
status = "okay";
scsi: arm64: dts: qcom: sdm845: Specify UFS device-reset GPIO Specify the UFS device-reset gpio for db845c and mtp, so that the controller will issue a reset of the UFS device. Link: https://lore.kernel.org/r/20190828191756.24312-4-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Avri Altman <Avri.Altman@wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2019-08-28 19:17:56 +00:00
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
arm64: dts: qcom: sdm845: Add UFS nodes for sdm845-mtp Enable the UFS host controller and PHY on sdm845-mtp. Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Can Guo <cang@codeaurora.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-10 19:28:25 +00:00
vcc-supply = <&vreg_l20a_2p95>;
vcc-max-microamp = <600000>;
};
&ufs_mem_phy {
status = "okay";
vdda-phy-supply = <&vdda_ufs1_core>;
vdda-pll-supply = <&vdda_ufs1_1p2>;
};
arm64: dts: qcom: sdm845-mtp: Add nodes for USB Set the various nodes to "okay" and hook up the regulators. NOTE: For now the main USB port (the one that goes out the Type C connector) is forced to host. Eventually someone will need to get the Type C detection hooked up and get this all integrated with the PMI8998 PMIC. The reason for forcing to "host" in the meantime is that this will leave us with one "host" and one "peripheral" port. In order for host mode this to work, we assume that the bootloader left things configured enough for us. Apparently the magic for that is is to do these writes on pmi8998: - pm_comm_write_byte(2, 0x1153, 0x2C, 0); - pm_comm_write_byte(2, 0x1152, 0x07, 0); - pm_comm_write_byte(2, 0x1140, 0x00, 0); - pm_comm_write_byte(2, 0x1140, 0x01, 0); Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:29 +00:00
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
arm64: dts: qcom: sdm845-mtp: Make USB1 peripheral The MTP is a "mobile reference device", as such the default operation is to use fastboot to boot/flash software onto it and the common case is thereby that we boot with a USB cable connected downstream from a PC or a hub. And without support for the PMI8998 charger block VBUS will not be driven by the device. Switch to peripheral until we can enable OTG. Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <agross@kernel.org>
2019-04-26 19:10:25 +00:00
/* Until we have Type C hooked up we'll force this as peripheral. */
dr_mode = "peripheral";
arm64: dts: qcom: sdm845-mtp: Add nodes for USB Set the various nodes to "okay" and hook up the regulators. NOTE: For now the main USB port (the one that goes out the Type C connector) is forced to host. Eventually someone will need to get the Type C detection hooked up and get this all integrated with the PMI8998 PMIC. The reason for forcing to "host" in the meantime is that this will leave us with one "host" and one "peripheral" port. In order for host mode this to work, we assume that the bootloader left things configured enough for us. Apparently the magic for that is is to do these writes on pmi8998: - pm_comm_write_byte(2, 0x1153, 0x2C, 0); - pm_comm_write_byte(2, 0x1152, 0x07, 0); - pm_comm_write_byte(2, 0x1140, 0x00, 0); - pm_comm_write_byte(2, 0x1140, 0x01, 0); Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-08-22 17:36:29 +00:00
};
&usb_1_hsphy {
status = "okay";
vdd-supply = <&vdda_usb1_ss_core>;
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
};
&usb_1_qmpphy {
status = "okay";
vdda-phy-supply = <&vdda_usb1_ss_1p2>;
vdda-pll-supply = <&vdda_usb1_ss_core>;
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
/*
* Though the USB block on SDM845 can support host, there's no vbus
* signal for this port on MTP. Thus (unless you have a non-compliant
* hub that works without vbus) the only sensible thing is to force
* peripheral mode.
*/
dr_mode = "peripheral";
};
&usb_2_hsphy {
status = "okay";
vdd-supply = <&vdda_usb2_ss_core>;
vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
qcom,imp-res-offset-value = <8>;
qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
};
&usb_2_qmpphy {
status = "okay";
vdda-phy-supply = <&vdda_usb2_ss_1p2>;
vdda-pll-supply = <&vdda_usb2_ss_core>;
};
arm64: dts: qcom: sdm845: Disable Adreno, modem and Venus by default Components that rely on proprietary (not to mention signed!) firmware should not be enabled by default, as lack of the aforementioned firmware could cause various issues, from random errors to straight-up failing to boot. Re-enable these remote processors on boards that didn't previously explicitly disable them. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Tested-By: Steev Klimaszewski <steev@kali.org> [bjorn: Added missing changes to db845c and lenovo-yoga-c630 to the patch] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211002001358.45920-3-konrad.dybcio@somainline.org
2021-10-02 00:13:55 +00:00
&venus {
status = "okay";
};
arm64: dts: sdm845: Add WCN3990 WLAN module device node Add device node for the ath10k SNOC platform driver probe and add resources required for WCN3990 on SDM845 soc. Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Govind Singh <govinds@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-11-05 13:08:37 +00:00
&wifi {
status = "okay";
vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
};
arm64: dts: qcom: sdm845: Enable debug UART and I2C10 on sdm845-mtp The debug UART is very useful to have. I2C10 is enabled as an example of a I2C port we can talk on for now. Eventually we'll want to put peripherals under it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-06-13 16:53:52 +00:00
/* PINCTRL - additions to nodes defined in sdm845.dtsi */
&qup_i2c10_default {
pinconf {
pins = "gpio55", "gpio56";
drive-strength = <2>;
bias-disable;
};
};
&qup_uart9_default {
pinconf-tx {
pins = "gpio4";
drive-strength = <2>;
bias-disable;
};
pinconf-rx {
pins = "gpio5";
drive-strength = <2>;
bias-pull-up;
};
arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-12 14:12:24 +00:00
};
arm64: dts: qcom: sdm845: Add SD nodes for sdm845-mtp Enable support for one of the micro SD slots on the MTP. Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Evan Green <evgreen@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-12-06 18:45:22 +00:00
&tlmm {
gpio-reserved-ranges = <0 4>, <81 4>;
sdc2_clk: sdc2-clk {
pinconf {
pins = "sdc2_clk";
bias-disable;
/*
* It seems that mmc_test reports errors if drive
* strength is not 16 on clk, cmd, and data pins.
*/
drive-strength = <16>;
};
};
sdc2_cmd: sdc2-cmd {
pinconf {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <16>;
};
};
sdc2_data: sdc2-data {
pinconf {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <16>;
};
};
sd_card_det_n: sd-card-det-n {
pinmux {
pins = "gpio126";
function = "gpio";
};
pinconf {
pins = "gpio126";
bias-pull-up;
};
};
};
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