2019-05-27 06:55:05 +00:00
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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2008-10-03 14:57:50 +00:00
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/*
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* atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
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*
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* Copyright (C) 2005 SAN People
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* Copyright (C) 2008 Atmel
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*
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* Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
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* ATMEL CORP.
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*
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* Based on at91-ssc.c by
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* Frank Mandarino <fmandarino@endrelia.com>
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* Based on pxa2xx Platform drivers by
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2009-02-02 22:23:22 +00:00
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* Liam Girdwood <lrg@slimlogic.co.uk>
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2008-10-03 14:57:50 +00:00
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*/
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#ifndef _ATMEL_SSC_DAI_H
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#define _ATMEL_SSC_DAI_H
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#include <linux/types.h>
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#include <linux/atmel-ssc.h>
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#include "atmel-pcm.h"
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/* SSC system clock ids */
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#define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
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/* SSC divider ids */
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#define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */
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#define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */
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#define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */
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/*
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* SSC direction masks
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*/
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#define SSC_DIR_MASK_UNUSED 0
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#define SSC_DIR_MASK_PLAYBACK 1
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#define SSC_DIR_MASK_CAPTURE 2
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/*
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* SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
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* are expected to be used with SSC_BF
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*/
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/* START bit field values */
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#define SSC_START_CONTINUOUS 0
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#define SSC_START_TX_RX 1
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#define SSC_START_LOW_RF 2
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#define SSC_START_HIGH_RF 3
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#define SSC_START_FALLING_RF 4
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#define SSC_START_RISING_RF 5
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#define SSC_START_LEVEL_RF 6
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#define SSC_START_EDGE_RF 7
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#define SSS_START_COMPARE_0 8
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/* CKI bit field values */
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#define SSC_CKI_FALLING 0
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#define SSC_CKI_RISING 1
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/* CKO bit field values */
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#define SSC_CKO_NONE 0
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#define SSC_CKO_CONTINUOUS 1
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#define SSC_CKO_TRANSFER 2
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/* CKS bit field values */
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#define SSC_CKS_DIV 0
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#define SSC_CKS_CLOCK 1
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#define SSC_CKS_PIN 2
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/* FSEDGE bit field values */
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#define SSC_FSEDGE_POSITIVE 0
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#define SSC_FSEDGE_NEGATIVE 1
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/* FSOS bit field values */
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#define SSC_FSOS_NONE 0
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#define SSC_FSOS_NEGATIVE 1
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#define SSC_FSOS_POSITIVE 2
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#define SSC_FSOS_LOW 3
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#define SSC_FSOS_HIGH 4
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#define SSC_FSOS_TOGGLE 5
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#define START_DELAY 1
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struct atmel_ssc_state {
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u32 ssc_cmr;
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u32 ssc_rcmr;
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u32 ssc_rfmr;
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u32 ssc_tcmr;
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u32 ssc_tfmr;
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u32 ssc_sr;
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u32 ssc_imr;
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};
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struct atmel_ssc_info {
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char *name;
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struct ssc_device *ssc;
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unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */
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unsigned short initialized; /* true if SSC has been initialized */
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unsigned short daifmt;
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unsigned short cmr_div;
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unsigned short tcmr_period;
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unsigned short rcmr_period;
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2016-11-15 18:38:13 +00:00
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unsigned int forced_divider;
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2008-10-03 14:57:50 +00:00
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struct atmel_pcm_dma_params *dma_params[2];
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struct atmel_ssc_state ssc_state;
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2015-02-09 15:08:25 +00:00
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unsigned long mck_rate;
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2008-10-03 14:57:50 +00:00
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};
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2012-11-14 10:09:09 +00:00
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int atmel_ssc_set_audio(int ssc_id);
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void atmel_ssc_put_audio(int ssc_id);
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2010-08-18 15:29:37 +00:00
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2008-10-03 14:57:50 +00:00
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#endif /* _AT91_SSC_DAI_H */
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