2018-06-30 00:53:28 +00:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* FPGA Region Driver for FPGA Management Engine (FME)
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*
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* Copyright (C) 2017-2018 Intel Corporation, Inc.
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*
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* Authors:
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* Wu Hao <hao.wu@intel.com>
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* Joseph Grecco <joe.grecco@intel.com>
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* Enno Luebbers <enno.luebbers@intel.com>
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* Tim Whisonant <tim.whisonant@intel.com>
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* Ananda Ravuri <ananda.ravuri@intel.com>
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* Henry Mitchel <henry.mitchel@intel.com>
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*/
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#include <linux/module.h>
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2018-09-12 14:43:23 +00:00
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#include <linux/fpga/fpga-mgr.h>
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2018-06-30 00:53:28 +00:00
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#include <linux/fpga/fpga-region.h>
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#include "dfl-fme-pr.h"
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static int fme_region_get_bridges(struct fpga_region *region)
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{
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struct dfl_fme_region_pdata *pdata = region->priv;
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struct device *dev = &pdata->br->dev;
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return fpga_bridge_get_to_list(dev, region->info, ®ion->bridge_list);
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}
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static int fme_region_probe(struct platform_device *pdev)
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{
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struct dfl_fme_region_pdata *pdata = dev_get_platdata(&pdev->dev);
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struct device *dev = &pdev->dev;
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struct fpga_region *region;
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struct fpga_manager *mgr;
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int ret;
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mgr = fpga_mgr_get(&pdata->mgr->dev);
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if (IS_ERR(mgr))
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return -EPROBE_DEFER;
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region = fpga_region_create(dev, mgr, fme_region_get_bridges);
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if (!region) {
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ret = -ENOMEM;
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goto eprobe_mgr_put;
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}
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region->priv = pdata;
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2018-06-30 00:53:29 +00:00
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region->compat_id = mgr->compat_id;
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2018-06-30 00:53:28 +00:00
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platform_set_drvdata(pdev, region);
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ret = fpga_region_register(region);
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if (ret)
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goto region_free;
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dev_dbg(dev, "DFL FME FPGA Region probed\n");
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return 0;
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region_free:
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fpga_region_free(region);
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eprobe_mgr_put:
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fpga_mgr_put(mgr);
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return ret;
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}
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static int fme_region_remove(struct platform_device *pdev)
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{
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struct fpga_region *region = dev_get_drvdata(&pdev->dev);
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2018-09-12 14:43:23 +00:00
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struct fpga_manager *mgr = region->mgr;
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2018-06-30 00:53:28 +00:00
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fpga_region_unregister(region);
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2018-09-12 14:43:23 +00:00
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fpga_mgr_put(mgr);
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2018-06-30 00:53:28 +00:00
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return 0;
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}
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static struct platform_driver fme_region_driver = {
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.driver = {
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.name = DFL_FPGA_FME_REGION,
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},
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.probe = fme_region_probe,
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.remove = fme_region_remove,
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};
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module_platform_driver(fme_region_driver);
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MODULE_DESCRIPTION("FPGA Region for DFL FPGA Management Engine");
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MODULE_AUTHOR("Intel Corporation");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:dfl-fme-region");
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