2019-08-21 16:47:28 +00:00
|
|
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
|
|
|
|
%YAML 1.2
|
|
|
|
|
---
|
|
|
|
|
$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml#
|
|
|
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
|
|
|
|
|
|
title: NXP i.MX8 DSP core
|
|
|
|
|
|
|
|
|
|
maintainers:
|
|
|
|
|
- Daniel Baluta <daniel.baluta@nxp.com>
|
|
|
|
|
|
|
|
|
|
description: |
|
|
|
|
|
Some boards from i.MX8 family contain a DSP core used for
|
|
|
|
|
advanced pre- and post- audio processing.
|
|
|
|
|
|
|
|
|
|
properties:
|
|
|
|
|
compatible:
|
|
|
|
|
enum:
|
|
|
|
|
- fsl,imx8qxp-dsp
|
2020-04-09 07:18:32 +00:00
|
|
|
- fsl,imx8qm-dsp
|
|
|
|
|
- fsl,imx8mp-dsp
|
2019-08-21 16:47:28 +00:00
|
|
|
|
|
|
|
|
reg:
|
2021-01-04 23:02:53 +00:00
|
|
|
maxItems: 1
|
2019-08-21 16:47:28 +00:00
|
|
|
|
|
|
|
|
clocks:
|
|
|
|
|
items:
|
|
|
|
|
- description: ipg clock
|
|
|
|
|
- description: ocram clock
|
|
|
|
|
- description: core clock
|
|
|
|
|
|
|
|
|
|
clock-names:
|
|
|
|
|
items:
|
|
|
|
|
- const: ipg
|
|
|
|
|
- const: ocram
|
|
|
|
|
- const: core
|
|
|
|
|
|
|
|
|
|
power-domains:
|
|
|
|
|
description:
|
|
|
|
|
List of phandle and PM domain specifier as documented in
|
|
|
|
|
Documentation/devicetree/bindings/power/power_domain.txt
|
|
|
|
|
maxItems: 4
|
|
|
|
|
|
|
|
|
|
mboxes:
|
|
|
|
|
description:
|
|
|
|
|
List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB
|
|
|
|
|
(see mailbox/fsl,mu.txt)
|
|
|
|
|
maxItems: 4
|
|
|
|
|
|
|
|
|
|
mbox-names:
|
|
|
|
|
items:
|
|
|
|
|
- const: txdb0
|
|
|
|
|
- const: txdb1
|
|
|
|
|
- const: rxdb0
|
|
|
|
|
- const: rxdb1
|
|
|
|
|
|
|
|
|
|
memory-region:
|
|
|
|
|
description:
|
2020-04-21 02:24:47 +00:00
|
|
|
phandle to a node describing reserved memory (System RAM memory)
|
|
|
|
|
used by DSP (see bindings/reserved-memory/reserved-memory.txt)
|
2019-08-21 16:47:28 +00:00
|
|
|
maxItems: 1
|
|
|
|
|
|
|
|
|
|
required:
|
|
|
|
|
- compatible
|
|
|
|
|
- reg
|
|
|
|
|
- clocks
|
|
|
|
|
- clock-names
|
|
|
|
|
- power-domains
|
|
|
|
|
- mboxes
|
|
|
|
|
- mbox-names
|
|
|
|
|
- memory-region
|
|
|
|
|
|
2020-03-25 22:05:41 +00:00
|
|
|
additionalProperties: false
|
|
|
|
|
|
2019-08-21 16:47:28 +00:00
|
|
|
examples:
|
|
|
|
|
- |
|
|
|
|
|
#include <dt-bindings/firmware/imx/rsrc.h>
|
|
|
|
|
#include <dt-bindings/clock/imx8-clock.h>
|
|
|
|
|
dsp@596e8000 {
|
|
|
|
|
compatible = "fsl,imx8qxp-dsp";
|
|
|
|
|
reg = <0x596e8000 0x88000>;
|
|
|
|
|
clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>,
|
|
|
|
|
<&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>,
|
|
|
|
|
<&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>;
|
|
|
|
|
clock-names = "ipg", "ocram", "core";
|
|
|
|
|
power-domains = <&pd IMX_SC_R_MU_13A>,
|
|
|
|
|
<&pd IMX_SC_R_MU_13B>,
|
|
|
|
|
<&pd IMX_SC_R_DSP>,
|
|
|
|
|
<&pd IMX_SC_R_DSP_RAM>;
|
|
|
|
|
mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1";
|
|
|
|
|
mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;
|
2019-10-02 14:42:04 +00:00
|
|
|
memory-region = <&dsp_reserved>;
|
2019-08-21 16:47:28 +00:00
|
|
|
};
|
