2018-01-17 16:36:44 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2016-08-23 22:13:30 +00:00
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/*
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* Freescale Management Complex (MC) bus private declarations
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*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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*/
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#ifndef _FSL_MC_PRIVATE_H_
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#define _FSL_MC_PRIVATE_H_
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2016-10-17 18:42:28 +00:00
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#include "../include/mc.h"
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2017-06-27 14:41:30 +00:00
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#include <linux/mutex.h>
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2018-01-16 13:19:04 +00:00
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/*
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* Data Path Management Complex (DPMNG) General API
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*/
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/* DPMNG command versioning */
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#define DPMNG_CMD_BASE_VERSION 1
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#define DPMNG_CMD_ID_OFFSET 4
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#define DPMNG_CMD(id) (((id) << DPMNG_CMD_ID_OFFSET) | DPMNG_CMD_BASE_VERSION)
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/* DPMNG command IDs */
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#define DPMNG_CMDID_GET_VERSION DPMNG_CMD(0x831)
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struct dpmng_rsp_get_version {
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__le32 revision;
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__le32 version_major;
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__le32 version_minor;
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};
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/*
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* Data Path Management Command Portal (DPMCP) API
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*/
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/* Minimal supported DPMCP Version */
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#define DPMCP_MIN_VER_MAJOR 3
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#define DPMCP_MIN_VER_MINOR 0
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/* DPMCP command versioning */
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#define DPMCP_CMD_BASE_VERSION 1
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#define DPMCP_CMD_ID_OFFSET 4
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#define DPMCP_CMD(id) (((id) << DPMCP_CMD_ID_OFFSET) | DPMCP_CMD_BASE_VERSION)
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/* DPMCP command IDs */
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#define DPMCP_CMDID_CLOSE DPMCP_CMD(0x800)
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#define DPMCP_CMDID_OPEN DPMCP_CMD(0x80b)
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#define DPMCP_CMDID_RESET DPMCP_CMD(0x005)
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struct dpmcp_cmd_open {
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__le32 dpmcp_id;
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};
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/*
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* Initialization and runtime control APIs for DPMCP
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*/
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int dpmcp_open(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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int dpmcp_id,
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u16 *token);
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int dpmcp_close(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token);
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int dpmcp_reset(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token);
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/*
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* Data Path Resource Container (DPRC) API
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*/
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/* Minimal supported DPRC Version */
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#define DPRC_MIN_VER_MAJOR 6
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#define DPRC_MIN_VER_MINOR 0
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/* DPRC command versioning */
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#define DPRC_CMD_BASE_VERSION 1
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#define DPRC_CMD_ID_OFFSET 4
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#define DPRC_CMD(id) (((id) << DPRC_CMD_ID_OFFSET) | DPRC_CMD_BASE_VERSION)
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/* DPRC command IDs */
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#define DPRC_CMDID_CLOSE DPRC_CMD(0x800)
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#define DPRC_CMDID_OPEN DPRC_CMD(0x805)
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#define DPRC_CMDID_GET_API_VERSION DPRC_CMD(0xa05)
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#define DPRC_CMDID_GET_ATTR DPRC_CMD(0x004)
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#define DPRC_CMDID_SET_IRQ DPRC_CMD(0x010)
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#define DPRC_CMDID_SET_IRQ_ENABLE DPRC_CMD(0x012)
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#define DPRC_CMDID_SET_IRQ_MASK DPRC_CMD(0x014)
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#define DPRC_CMDID_GET_IRQ_STATUS DPRC_CMD(0x016)
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#define DPRC_CMDID_CLEAR_IRQ_STATUS DPRC_CMD(0x017)
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#define DPRC_CMDID_GET_CONT_ID DPRC_CMD(0x830)
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#define DPRC_CMDID_GET_OBJ_COUNT DPRC_CMD(0x159)
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#define DPRC_CMDID_GET_OBJ DPRC_CMD(0x15A)
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#define DPRC_CMDID_GET_OBJ_REG DPRC_CMD(0x15E)
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#define DPRC_CMDID_SET_OBJ_IRQ DPRC_CMD(0x15F)
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struct dprc_cmd_open {
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__le32 container_id;
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};
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struct dprc_cmd_set_irq {
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/* cmd word 0 */
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__le32 irq_val;
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u8 irq_index;
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u8 pad[3];
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/* cmd word 1 */
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__le64 irq_addr;
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/* cmd word 2 */
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__le32 irq_num;
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};
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#define DPRC_ENABLE 0x1
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struct dprc_cmd_set_irq_enable {
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u8 enable;
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u8 pad[3];
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u8 irq_index;
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};
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struct dprc_cmd_set_irq_mask {
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__le32 mask;
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u8 irq_index;
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};
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struct dprc_cmd_get_irq_status {
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__le32 status;
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u8 irq_index;
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};
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struct dprc_rsp_get_irq_status {
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__le32 status;
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};
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struct dprc_cmd_clear_irq_status {
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__le32 status;
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u8 irq_index;
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};
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struct dprc_rsp_get_attributes {
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/* response word 0 */
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__le32 container_id;
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__le16 icid;
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__le16 pad;
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/* response word 1 */
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__le32 options;
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__le32 portal_id;
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};
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struct dprc_rsp_get_obj_count {
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__le32 pad;
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__le32 obj_count;
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};
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struct dprc_cmd_get_obj {
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__le32 obj_index;
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};
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struct dprc_rsp_get_obj {
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/* response word 0 */
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__le32 pad0;
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__le32 id;
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/* response word 1 */
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__le16 vendor;
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u8 irq_count;
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u8 region_count;
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__le32 state;
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/* response word 2 */
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__le16 version_major;
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__le16 version_minor;
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__le16 flags;
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__le16 pad1;
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/* response word 3-4 */
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u8 type[16];
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/* response word 5-6 */
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u8 label[16];
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};
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struct dprc_cmd_get_obj_region {
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/* cmd word 0 */
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__le32 obj_id;
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__le16 pad0;
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u8 region_index;
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u8 pad1;
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/* cmd word 1-2 */
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__le64 pad2[2];
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/* cmd word 3-4 */
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u8 obj_type[16];
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};
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struct dprc_rsp_get_obj_region {
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/* response word 0 */
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__le64 pad;
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/* response word 1 */
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__le64 base_addr;
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/* response word 2 */
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__le32 size;
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};
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struct dprc_cmd_set_obj_irq {
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/* cmd word 0 */
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__le32 irq_val;
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u8 irq_index;
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u8 pad[3];
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/* cmd word 1 */
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__le64 irq_addr;
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/* cmd word 2 */
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__le32 irq_num;
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__le32 obj_id;
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/* cmd word 3-4 */
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u8 obj_type[16];
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};
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/*
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* DPRC API for managing and querying DPAA resources
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*/
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int dprc_open(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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int container_id,
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u16 *token);
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int dprc_close(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token);
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/* DPRC IRQ events */
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/* IRQ event - Indicates that a new object added to the container */
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#define DPRC_IRQ_EVENT_OBJ_ADDED 0x00000001
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/* IRQ event - Indicates that an object was removed from the container */
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#define DPRC_IRQ_EVENT_OBJ_REMOVED 0x00000002
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/*
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* IRQ event - Indicates that one of the descendant containers that opened by
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* this container is destroyed
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*/
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#define DPRC_IRQ_EVENT_CONTAINER_DESTROYED 0x00000010
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/*
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* IRQ event - Indicates that on one of the container's opened object is
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* destroyed
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*/
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#define DPRC_IRQ_EVENT_OBJ_DESTROYED 0x00000020
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/* Irq event - Indicates that object is created at the container */
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#define DPRC_IRQ_EVENT_OBJ_CREATED 0x00000040
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/**
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* struct dprc_irq_cfg - IRQ configuration
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* @paddr: Address that must be written to signal a message-based interrupt
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* @val: Value to write into irq_addr address
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* @irq_num: A user defined number associated with this IRQ
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*/
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struct dprc_irq_cfg {
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phys_addr_t paddr;
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u32 val;
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int irq_num;
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};
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int dprc_set_irq(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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struct dprc_irq_cfg *irq_cfg);
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int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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u8 en);
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int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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u32 mask);
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int dprc_get_irq_status(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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u32 *status);
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int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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u32 status);
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/**
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* struct dprc_attributes - Container attributes
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* @container_id: Container's ID
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* @icid: Container's ICID
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* @portal_id: Container's portal ID
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* @options: Container's options as set at container's creation
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*/
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struct dprc_attributes {
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int container_id;
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u16 icid;
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int portal_id;
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u64 options;
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};
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int dprc_get_attributes(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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struct dprc_attributes *attributes);
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int dprc_get_obj_count(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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int *obj_count);
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int dprc_get_obj(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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int obj_index,
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struct fsl_mc_obj_desc *obj_desc);
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int dprc_set_obj_irq(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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char *obj_type,
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int obj_id,
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u8 irq_index,
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struct dprc_irq_cfg *irq_cfg);
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/* Region flags */
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/* Cacheable - Indicates that region should be mapped as cacheable */
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#define DPRC_REGION_CACHEABLE 0x00000001
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/**
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* enum dprc_region_type - Region type
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* @DPRC_REGION_TYPE_MC_PORTAL: MC portal region
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* @DPRC_REGION_TYPE_QBMAN_PORTAL: Qbman portal region
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*/
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enum dprc_region_type {
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DPRC_REGION_TYPE_MC_PORTAL,
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DPRC_REGION_TYPE_QBMAN_PORTAL
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};
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/**
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* struct dprc_region_desc - Mappable region descriptor
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* @base_offset: Region offset from region's base address.
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* For DPMCP and DPRC objects, region base is offset from SoC MC portals
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* base address; For DPIO, region base is offset from SoC QMan portals
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* base address
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* @size: Region size (in bytes)
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* @flags: Region attributes
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* @type: Portal region type
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*/
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struct dprc_region_desc {
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u32 base_offset;
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u32 size;
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u32 flags;
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enum dprc_region_type type;
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};
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int dprc_get_obj_region(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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char *obj_type,
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int obj_id,
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u8 region_index,
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struct dprc_region_desc *region_desc);
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int dprc_get_api_version(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 *major_ver,
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u16 *minor_ver);
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int dprc_get_container_id(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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int *container_id);
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2017-06-27 14:41:30 +00:00
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/**
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* Maximum number of total IRQs that can be pre-allocated for an MC bus'
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* IRQ pool
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*/
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#define FSL_MC_IRQ_POOL_MAX_TOTAL_IRQS 256
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/**
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* struct fsl_mc_resource_pool - Pool of MC resources of a given
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* type
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* @type: type of resources in the pool
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* @max_count: maximum number of resources in the pool
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* @free_count: number of free resources in the pool
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* @mutex: mutex to serialize access to the pool's free list
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* @free_list: anchor node of list of free resources in the pool
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* @mc_bus: pointer to the MC bus that owns this resource pool
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*/
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struct fsl_mc_resource_pool {
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enum fsl_mc_pool_type type;
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int max_count;
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int free_count;
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struct mutex mutex; /* serializes access to free_list */
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struct list_head free_list;
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struct fsl_mc_bus *mc_bus;
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};
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/**
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* struct fsl_mc_bus - logical bus that corresponds to a physical DPRC
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* @mc_dev: fsl-mc device for the bus device itself.
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* @resource_pools: array of resource pools (one pool per resource type)
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* for this MC bus. These resources represent allocatable entities
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* from the physical DPRC.
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* @irq_resources: Pointer to array of IRQ objects for the IRQ pool
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* @scan_mutex: Serializes bus scanning
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* @dprc_attr: DPRC attributes
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*/
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struct fsl_mc_bus {
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struct fsl_mc_device mc_dev;
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struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES];
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struct fsl_mc_device_irq *irq_resources;
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struct mutex scan_mutex; /* serializes bus scanning */
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struct dprc_attributes dprc_attr;
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};
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#define to_fsl_mc_bus(_mc_dev) \
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container_of(_mc_dev, struct fsl_mc_bus, mc_dev)
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2016-10-17 18:42:28 +00:00
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2017-06-27 14:41:24 +00:00
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int __must_check fsl_mc_device_add(struct fsl_mc_obj_desc *obj_desc,
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2016-08-23 22:13:30 +00:00
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struct fsl_mc_io *mc_io,
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struct device *parent_dev,
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struct fsl_mc_device **new_mc_dev);
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void fsl_mc_device_remove(struct fsl_mc_device *mc_dev);
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int __init dprc_driver_init(void);
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void dprc_driver_exit(void);
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int __init fsl_mc_allocator_driver_init(void);
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2017-06-27 14:41:30 +00:00
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void fsl_mc_init_all_resource_pools(struct fsl_mc_device *mc_bus_dev);
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void fsl_mc_cleanup_all_resource_pools(struct fsl_mc_device *mc_bus_dev);
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2016-08-23 22:13:30 +00:00
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int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
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enum fsl_mc_pool_type pool_type,
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struct fsl_mc_resource
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**new_resource);
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void fsl_mc_resource_free(struct fsl_mc_resource *resource);
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int fsl_mc_msi_domain_alloc_irqs(struct device *dev,
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unsigned int irq_count);
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void fsl_mc_msi_domain_free_irqs(struct device *dev);
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2017-06-27 14:41:30 +00:00
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int fsl_mc_find_msi_domain(struct device *mc_platform_dev,
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struct irq_domain **mc_msi_domain);
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int fsl_mc_populate_irq_pool(struct fsl_mc_bus *mc_bus,
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unsigned int irq_count);
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void fsl_mc_cleanup_irq_pool(struct fsl_mc_bus *mc_bus);
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2016-08-23 22:14:14 +00:00
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int __must_check fsl_create_mc_io(struct device *dev,
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phys_addr_t mc_portal_phys_addr,
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u32 mc_portal_size,
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struct fsl_mc_device *dpmcp_dev,
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u32 flags, struct fsl_mc_io **new_mc_io);
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void fsl_destroy_mc_io(struct fsl_mc_io *mc_io);
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2017-06-27 14:41:30 +00:00
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bool fsl_mc_is_root_dprc(struct device *dev);
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2016-08-23 22:13:30 +00:00
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#endif /* _FSL_MC_PRIVATE_H_ */
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