2018-05-08 11:59:53 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2017-03-29 17:47:51 +00:00
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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******************************************************************************/
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#ifndef __ODM_TYPES_H__
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#define __ODM_TYPES_H__
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#include <drv_types.h>
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/* Deifne HW endian support */
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#define ODM_ENDIAN_BIG 0
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#define ODM_ENDIAN_LITTLE 1
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#define GET_ODM(__padapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__padapter))->odmpriv)))
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typedef enum _HAL_STATUS {
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HAL_STATUS_SUCCESS,
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HAL_STATUS_FAILURE,
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/*RT_STATUS_PENDING,
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RT_STATUS_RESOURCE,
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RT_STATUS_INVALID_CONTEXT,
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RT_STATUS_INVALID_PARAMETER,
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RT_STATUS_NOT_SUPPORT,
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RT_STATUS_OS_API_FAILED,*/
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} HAL_STATUS, *PHAL_STATUS;
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/* */
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/* Declare for ODM spin lock defintion temporarily fro compile pass. */
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/* */
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typedef enum _RT_SPINLOCK_TYPE {
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RT_TX_SPINLOCK = 1,
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RT_RX_SPINLOCK = 2,
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RT_RM_SPINLOCK = 3,
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RT_CAM_SPINLOCK = 4,
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RT_SCAN_SPINLOCK = 5,
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RT_LOG_SPINLOCK = 7,
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RT_BW_SPINLOCK = 8,
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RT_CHNLOP_SPINLOCK = 9,
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RT_RF_OPERATE_SPINLOCK = 10,
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RT_INITIAL_SPINLOCK = 11,
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RT_RF_STATE_SPINLOCK = 12, /* For RF state. Added by Bruce, 2007-10-30. */
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/* Shall we define Ndis 6.2 SpinLock Here ? */
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RT_PORT_SPINLOCK = 16,
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RT_H2C_SPINLOCK = 20, /* For H2C cmd. Added by tynli. 2009.11.09. */
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RT_BTData_SPINLOCK = 25,
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RT_WAPI_OPTION_SPINLOCK = 26,
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RT_WAPI_RX_SPINLOCK = 27,
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/* add for 92D CCK control issue */
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RT_CCK_PAGEA_SPINLOCK = 28,
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RT_BUFFER_SPINLOCK = 29,
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RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30,
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RT_GEN_TEMP_BUF_SPINLOCK = 31,
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RT_AWB_SPINLOCK = 32,
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RT_FW_PS_SPINLOCK = 33,
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RT_HW_TIMER_SPIN_LOCK = 34,
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RT_MPT_WI_SPINLOCK = 35,
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RT_P2P_SPIN_LOCK = 36, /* Protect P2P context */
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RT_DBG_SPIN_LOCK = 37,
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RT_IQK_SPINLOCK = 38,
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RT_PENDED_OID_SPINLOCK = 39,
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RT_CHNLLIST_SPINLOCK = 40,
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RT_INDIC_SPINLOCK = 41, /* protect indication */
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} RT_SPINLOCK_TYPE;
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#if defined(__LITTLE_ENDIAN)
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#define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE
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#else
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#define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG
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#endif
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typedef struct timer_list RT_TIMER, *PRT_TIMER;
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typedef void *RT_TIMER_CALL_BACK;
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#define STA_INFO_T struct sta_info
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#define PSTA_INFO_T struct sta_info *
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#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
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#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
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#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
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/* define useless flag to avoid compile warning */
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#define USE_WORKITEM 0
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#define FPGA_TWO_MAC_VERIFICATION 0
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#define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while (0)
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#define COND_ELSE 2
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#define COND_ENDIF 3
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#endif /* __ODM_TYPES_H__ */
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