2017-11-01 14:09:13 +00:00
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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2012-12-14 22:37:13 +00:00
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/*
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* vmx.h: VMX Architecture related definitions
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* Copyright (c) 2004, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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* A few random additions are:
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* Copyright (C) 2006 Qumranet
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* Avi Kivity <avi@qumranet.com>
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* Yaniv Kamay <yaniv@qumranet.com>
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*
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*/
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#ifndef _UAPIVMX_H
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#define _UAPIVMX_H
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#define VMX_EXIT_REASONS_FAILED_VMENTRY 0x80000000
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KVM: VMX: Add basic handling of VM-Exit from SGX enclave
Add support for handling VM-Exits that originate from a guest SGX
enclave. In SGX, an "enclave" is a new CPL3-only execution environment,
wherein the CPU and memory state is protected by hardware to make the
state inaccesible to code running outside of the enclave. When exiting
an enclave due to an asynchronous event (from the perspective of the
enclave), e.g. exceptions, interrupts, and VM-Exits, the enclave's state
is automatically saved and scrubbed (the CPU loads synthetic state), and
then reloaded when re-entering the enclave. E.g. after an instruction
based VM-Exit from an enclave, vmcs.GUEST_RIP will not contain the RIP
of the enclave instruction that trigered VM-Exit, but will instead point
to a RIP in the enclave's untrusted runtime (the guest userspace code
that coordinates entry/exit to/from the enclave).
To help a VMM recognize and handle exits from enclaves, SGX adds bits to
existing VMCS fields, VM_EXIT_REASON.VMX_EXIT_REASON_FROM_ENCLAVE and
GUEST_INTERRUPTIBILITY_INFO.GUEST_INTR_STATE_ENCLAVE_INTR. Define the
new architectural bits, and add a boolean to struct vcpu_vmx to cache
VMX_EXIT_REASON_FROM_ENCLAVE. Clear the bit in exit_reason so that
checks against exit_reason do not need to account for SGX, e.g.
"if (exit_reason == EXIT_REASON_EXCEPTION_NMI)" continues to work.
KVM is a largely a passive observer of the new bits, e.g. KVM needs to
account for the bits when propagating information to a nested VMM, but
otherwise doesn't need to act differently for the majority of VM-Exits
from enclaves.
The one scenario that is directly impacted is emulation, which is for
all intents and purposes impossible[1] since KVM does not have access to
the RIP or instruction stream that triggered the VM-Exit. The inability
to emulate is a non-issue for KVM, as most instructions that might
trigger VM-Exit unconditionally #UD in an enclave (before the VM-Exit
check. For the few instruction that conditionally #UD, KVM either never
sets the exiting control, e.g. PAUSE_EXITING[2], or sets it if and only
if the feature is not exposed to the guest in order to inject a #UD,
e.g. RDRAND_EXITING.
But, because it is still possible for a guest to trigger emulation,
e.g. MMIO, inject a #UD if KVM ever attempts emulation after a VM-Exit
from an enclave. This is architecturally accurate for instruction
VM-Exits, and for MMIO it's the least bad choice, e.g. it's preferable
to killing the VM. In practice, only broken or particularly stupid
guests should ever encounter this behavior.
Add a WARN in skip_emulated_instruction to detect any attempt to
modify the guest's RIP during an SGX enclave VM-Exit as all such flows
should either be unreachable or must handle exits from enclaves before
getting to skip_emulated_instruction.
[1] Impossible for all practical purposes. Not truly impossible
since KVM could implement some form of para-virtualization scheme.
[2] PAUSE_LOOP_EXITING only affects CPL0 and enclaves exist only at
CPL3, so we also don't need to worry about that interaction.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Kai Huang <kai.huang@intel.com>
Message-Id: <315f54a8507d09c292463ef29104e1d4c62e9090.1618196135.git.kai.huang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-04-12 04:21:37 +00:00
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#define VMX_EXIT_REASONS_SGX_ENCLAVE_MODE 0x08000000
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_EXCEPTION_NMI 0
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#define EXIT_REASON_EXTERNAL_INTERRUPT 1
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#define EXIT_REASON_TRIPLE_FAULT 2
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2019-08-26 10:24:48 +00:00
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#define EXIT_REASON_INIT_SIGNAL 3
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KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
Background: We have a lightweight HV, it needs INIT-VMExit and
SIPI-VMExit to wake-up APs for guests since it do not monitor
the Local APIC. But currently virtual wait-for-SIPI(WFS) state
is not supported in nVMX, so when running on top of KVM, the L1
HV cannot receive the INIT-VMExit and SIPI-VMExit which cause
the L2 guest cannot wake up the APs.
According to Intel SDM Chapter 25.2 Other Causes of VM Exits,
SIPIs cause VM exits when a logical processor is in
wait-for-SIPI state.
In this patch:
1. introduce SIPI exit reason,
2. introduce wait-for-SIPI state for nVMX,
3. advertise wait-for-SIPI support to guest.
When L1 hypervisor is not monitoring Local APIC, L0 need to emulate
INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for
L2. L2 LAPIC write would be traped by L0 Hypervisor(KVM), L0 should
emulate the INIT/SIPI vmexit to L1 hypervisor to set proper state
for L2's vcpu state.
Handle procdure:
Source vCPU:
L2 write LAPIC.ICR(INIT).
L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target
vCPU.
Target vCPU:
L0 emulate an INIT VMExit to L1 if is guest mode.
L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume.
L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state
== WAIT_SIPI).
Source vCPU:
L2 write LAPIC.ICR(SIPI).
L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget
vCPU.
Target vCPU:
L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED).
L1 set CS:IP, guest_activity_state=ACTIVE, vmresume.
L0 resume to L2.
L2 start-up.
Signed-off-by: Yadong Qi <yadong.qi@intel.com>
Message-Id: <20200922052343.84388-1-yadong.qi@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20201106065122.403183-1-yadong.qi@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-11-06 06:51:22 +00:00
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#define EXIT_REASON_SIPI_SIGNAL 4
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2012-12-14 22:37:13 +00:00
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2019-12-06 08:45:24 +00:00
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#define EXIT_REASON_INTERRUPT_WINDOW 7
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_NMI_WINDOW 8
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#define EXIT_REASON_TASK_SWITCH 9
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#define EXIT_REASON_CPUID 10
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#define EXIT_REASON_HLT 12
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#define EXIT_REASON_INVD 13
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#define EXIT_REASON_INVLPG 14
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#define EXIT_REASON_RDPMC 15
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#define EXIT_REASON_RDTSC 16
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#define EXIT_REASON_VMCALL 18
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#define EXIT_REASON_VMCLEAR 19
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#define EXIT_REASON_VMLAUNCH 20
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#define EXIT_REASON_VMPTRLD 21
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#define EXIT_REASON_VMPTRST 22
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#define EXIT_REASON_VMREAD 23
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#define EXIT_REASON_VMRESUME 24
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#define EXIT_REASON_VMWRITE 25
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#define EXIT_REASON_VMOFF 26
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#define EXIT_REASON_VMON 27
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#define EXIT_REASON_CR_ACCESS 28
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#define EXIT_REASON_DR_ACCESS 29
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#define EXIT_REASON_IO_INSTRUCTION 30
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#define EXIT_REASON_MSR_READ 31
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#define EXIT_REASON_MSR_WRITE 32
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#define EXIT_REASON_INVALID_STATE 33
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2014-12-11 05:52:58 +00:00
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#define EXIT_REASON_MSR_LOAD_FAIL 34
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_MWAIT_INSTRUCTION 36
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2015-07-05 17:08:57 +00:00
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#define EXIT_REASON_MONITOR_TRAP_FLAG 37
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_MONITOR_INSTRUCTION 39
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#define EXIT_REASON_PAUSE_INSTRUCTION 40
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#define EXIT_REASON_MCE_DURING_VMENTRY 41
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#define EXIT_REASON_TPR_BELOW_THRESHOLD 43
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#define EXIT_REASON_APIC_ACCESS 44
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2013-02-24 21:07:18 +00:00
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#define EXIT_REASON_EOI_INDUCED 45
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2016-10-25 14:06:30 +00:00
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#define EXIT_REASON_GDTR_IDTR 46
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#define EXIT_REASON_LDTR_TR 47
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_EPT_VIOLATION 48
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#define EXIT_REASON_EPT_MISCONFIG 49
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2013-08-05 08:07:17 +00:00
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#define EXIT_REASON_INVEPT 50
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2015-03-23 18:27:19 +00:00
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#define EXIT_REASON_RDTSCP 51
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2013-03-13 10:31:24 +00:00
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#define EXIT_REASON_PREEMPTION_TIMER 52
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2014-09-23 18:22:30 +00:00
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#define EXIT_REASON_INVVPID 53
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_WBINVD 54
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#define EXIT_REASON_XSETBV 55
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2013-02-24 21:07:18 +00:00
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#define EXIT_REASON_APIC_WRITE 56
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2017-03-30 09:55:31 +00:00
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#define EXIT_REASON_RDRAND 57
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2012-12-14 22:37:13 +00:00
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#define EXIT_REASON_INVPCID 58
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2017-03-30 09:55:31 +00:00
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#define EXIT_REASON_VMFUNC 59
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#define EXIT_REASON_ENCLS 60
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#define EXIT_REASON_RDSEED 61
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2015-01-28 02:54:28 +00:00
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#define EXIT_REASON_PML_FULL 62
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2014-12-02 11:14:58 +00:00
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#define EXIT_REASON_XSAVES 63
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#define EXIT_REASON_XRSTORS 64
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2019-07-16 06:55:51 +00:00
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#define EXIT_REASON_UMWAIT 67
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#define EXIT_REASON_TPAUSE 68
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2020-11-06 09:03:14 +00:00
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#define EXIT_REASON_BUS_LOCK 74
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2012-12-14 22:37:13 +00:00
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#define VMX_EXIT_REASONS \
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{ EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \
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{ EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \
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{ EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, \
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2019-08-26 10:24:48 +00:00
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{ EXIT_REASON_INIT_SIGNAL, "INIT_SIGNAL" }, \
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KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
Background: We have a lightweight HV, it needs INIT-VMExit and
SIPI-VMExit to wake-up APs for guests since it do not monitor
the Local APIC. But currently virtual wait-for-SIPI(WFS) state
is not supported in nVMX, so when running on top of KVM, the L1
HV cannot receive the INIT-VMExit and SIPI-VMExit which cause
the L2 guest cannot wake up the APs.
According to Intel SDM Chapter 25.2 Other Causes of VM Exits,
SIPIs cause VM exits when a logical processor is in
wait-for-SIPI state.
In this patch:
1. introduce SIPI exit reason,
2. introduce wait-for-SIPI state for nVMX,
3. advertise wait-for-SIPI support to guest.
When L1 hypervisor is not monitoring Local APIC, L0 need to emulate
INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for
L2. L2 LAPIC write would be traped by L0 Hypervisor(KVM), L0 should
emulate the INIT/SIPI vmexit to L1 hypervisor to set proper state
for L2's vcpu state.
Handle procdure:
Source vCPU:
L2 write LAPIC.ICR(INIT).
L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target
vCPU.
Target vCPU:
L0 emulate an INIT VMExit to L1 if is guest mode.
L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume.
L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state
== WAIT_SIPI).
Source vCPU:
L2 write LAPIC.ICR(SIPI).
L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget
vCPU.
Target vCPU:
L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED).
L1 set CS:IP, guest_activity_state=ACTIVE, vmresume.
L0 resume to L2.
L2 start-up.
Signed-off-by: Yadong Qi <yadong.qi@intel.com>
Message-Id: <20200922052343.84388-1-yadong.qi@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20201106065122.403183-1-yadong.qi@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-11-06 06:51:22 +00:00
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{ EXIT_REASON_SIPI_SIGNAL, "SIPI_SIGNAL" }, \
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2019-12-06 08:45:24 +00:00
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{ EXIT_REASON_INTERRUPT_WINDOW, "INTERRUPT_WINDOW" }, \
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2012-12-14 22:37:13 +00:00
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{ EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" }, \
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{ EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" }, \
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{ EXIT_REASON_CPUID, "CPUID" }, \
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{ EXIT_REASON_HLT, "HLT" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_INVD, "INVD" }, \
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2012-12-14 22:37:13 +00:00
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{ EXIT_REASON_INVLPG, "INVLPG" }, \
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{ EXIT_REASON_RDPMC, "RDPMC" }, \
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{ EXIT_REASON_RDTSC, "RDTSC" }, \
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{ EXIT_REASON_VMCALL, "VMCALL" }, \
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{ EXIT_REASON_VMCLEAR, "VMCLEAR" }, \
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{ EXIT_REASON_VMLAUNCH, "VMLAUNCH" }, \
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{ EXIT_REASON_VMPTRLD, "VMPTRLD" }, \
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{ EXIT_REASON_VMPTRST, "VMPTRST" }, \
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{ EXIT_REASON_VMREAD, "VMREAD" }, \
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{ EXIT_REASON_VMRESUME, "VMRESUME" }, \
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{ EXIT_REASON_VMWRITE, "VMWRITE" }, \
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{ EXIT_REASON_VMOFF, "VMOFF" }, \
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{ EXIT_REASON_VMON, "VMON" }, \
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{ EXIT_REASON_CR_ACCESS, "CR_ACCESS" }, \
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{ EXIT_REASON_DR_ACCESS, "DR_ACCESS" }, \
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{ EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" }, \
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{ EXIT_REASON_MSR_READ, "MSR_READ" }, \
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{ EXIT_REASON_MSR_WRITE, "MSR_WRITE" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \
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{ EXIT_REASON_MSR_LOAD_FAIL, "MSR_LOAD_FAIL" }, \
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2012-12-14 22:37:13 +00:00
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{ EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" }, \
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2015-07-05 17:08:57 +00:00
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{ EXIT_REASON_MONITOR_TRAP_FLAG, "MONITOR_TRAP_FLAG" }, \
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2012-12-14 22:37:13 +00:00
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{ EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" }, \
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{ EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" }, \
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{ EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" }, \
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{ EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" }, \
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{ EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \
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{ EXIT_REASON_GDTR_IDTR, "GDTR_IDTR" }, \
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{ EXIT_REASON_LDTR_TR, "LDTR_TR" }, \
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2012-12-14 22:37:13 +00:00
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{ EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" }, \
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{ EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" }, \
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2013-08-12 06:50:41 +00:00
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{ EXIT_REASON_INVEPT, "INVEPT" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_RDTSCP, "RDTSCP" }, \
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2013-08-12 06:50:41 +00:00
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{ EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_INVVPID, "INVVPID" }, \
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2013-02-24 21:07:18 +00:00
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{ EXIT_REASON_WBINVD, "WBINVD" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_XSETBV, "XSETBV" }, \
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2013-02-24 21:07:18 +00:00
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{ EXIT_REASON_APIC_WRITE, "APIC_WRITE" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_RDRAND, "RDRAND" }, \
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2014-12-02 11:14:58 +00:00
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{ EXIT_REASON_INVPCID, "INVPCID" }, \
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2017-03-30 09:55:31 +00:00
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{ EXIT_REASON_VMFUNC, "VMFUNC" }, \
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{ EXIT_REASON_ENCLS, "ENCLS" }, \
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{ EXIT_REASON_RDSEED, "RDSEED" }, \
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{ EXIT_REASON_PML_FULL, "PML_FULL" }, \
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2014-12-02 11:14:58 +00:00
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{ EXIT_REASON_XSAVES, "XSAVES" }, \
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2019-07-16 06:55:51 +00:00
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{ EXIT_REASON_XRSTORS, "XRSTORS" }, \
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{ EXIT_REASON_UMWAIT, "UMWAIT" }, \
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2020-11-06 09:03:14 +00:00
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{ EXIT_REASON_TPAUSE, "TPAUSE" }, \
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{ EXIT_REASON_BUS_LOCK, "BUS_LOCK" }
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2012-12-14 22:37:13 +00:00
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2020-05-08 23:53:48 +00:00
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#define VMX_EXIT_REASON_FLAGS \
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{ VMX_EXIT_REASONS_FAILED_VMENTRY, "FAILED_VMENTRY" }
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2014-12-11 05:52:58 +00:00
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#define VMX_ABORT_SAVE_GUEST_MSR_FAIL 1
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2016-11-30 15:03:11 +00:00
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#define VMX_ABORT_LOAD_HOST_PDPTE_FAIL 2
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2014-12-11 05:52:58 +00:00
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#define VMX_ABORT_LOAD_HOST_MSR_FAIL 4
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2012-12-14 22:37:13 +00:00
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#endif /* _UAPIVMX_H */
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