License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2006-10-04 09:16:59 +00:00
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#ifndef LINUX_MSI_H
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#define LINUX_MSI_H
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2021-12-06 22:51:49 +00:00
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/*
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* This header file contains MSI data structures and functions which are
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* only relevant for:
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* - Interrupt core code
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* - PCI/MSI core code
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* - MSI interrupt domain implementations
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* - IOMMU, low level VFIO, NTB and other justified exceptions
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* dealing with low level MSI details.
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*
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* Regular device drivers have no business with any of these functions and
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* especially storing MSI descriptor pointers in random code is considered
|
2022-11-24 23:24:14 +00:00
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* abuse.
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*
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* Device driver relevant functions are available in <linux/msi_api.h>
|
2021-12-06 22:51:49 +00:00
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*/
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2022-11-11 13:54:33 +00:00
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#include <linux/irqdomain_defs.h>
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2021-12-06 22:27:31 +00:00
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#include <linux/cpumask.h>
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2022-11-24 23:24:14 +00:00
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#include <linux/msi_api.h>
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2021-12-06 22:51:52 +00:00
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#include <linux/xarray.h>
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2021-12-06 22:51:05 +00:00
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#include <linux/mutex.h>
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2007-04-05 07:19:10 +00:00
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#include <linux/list.h>
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2022-11-24 23:25:49 +00:00
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#include <linux/irq.h>
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2022-11-24 23:25:46 +00:00
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#include <linux/bits.h>
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2020-10-24 21:35:11 +00:00
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#include <asm/msi.h>
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/* Dummy shadow structures if an architecture does not define them */
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#ifndef arch_msi_msg_addr_lo
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typedef struct arch_msi_msg_addr_lo {
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u32 address_lo;
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} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
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#endif
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#ifndef arch_msi_msg_addr_hi
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typedef struct arch_msi_msg_addr_hi {
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u32 address_hi;
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} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
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#endif
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#ifndef arch_msi_msg_data
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typedef struct arch_msi_msg_data {
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u32 data;
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} __attribute__ ((packed)) arch_msi_msg_data_t;
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#endif
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2007-04-05 07:19:10 +00:00
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2022-11-29 00:31:57 +00:00
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#ifndef arch_is_isolated_msi
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#define arch_is_isolated_msi() false
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#endif
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2020-10-24 21:35:11 +00:00
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/**
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* msi_msg - Representation of a MSI message
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* @address_lo: Low 32 bits of msi message address
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* @arch_addrlo: Architecture specific shadow of @address_lo
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* @address_hi: High 32 bits of msi message address
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* (only used when device supports it)
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* @arch_addrhi: Architecture specific shadow of @address_hi
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* @data: MSI message data (usually 16 bits)
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* @arch_data: Architecture specific shadow of @data
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*/
|
2006-10-04 09:16:59 +00:00
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struct msi_msg {
|
2020-10-24 21:35:11 +00:00
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union {
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u32 address_lo;
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arch_msi_msg_addr_lo_t arch_addr_lo;
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};
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union {
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u32 address_hi;
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arch_msi_msg_addr_hi_t arch_addr_hi;
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};
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union {
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u32 data;
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arch_msi_msg_data_t arch_data;
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};
|
2006-10-04 09:16:59 +00:00
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};
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2014-10-27 02:44:36 +00:00
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extern int pci_msi_ignore_mask;
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2007-01-18 04:50:05 +00:00
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/* Helper functions */
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2010-09-28 17:09:51 +00:00
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struct msi_desc;
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2015-07-09 08:00:45 +00:00
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struct pci_dev;
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2015-07-28 13:46:16 +00:00
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struct platform_msi_priv_data;
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2021-12-06 22:51:50 +00:00
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struct device_attribute;
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2022-11-24 23:24:22 +00:00
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struct irq_domain;
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2022-11-24 23:26:18 +00:00
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struct irq_affinity_desc;
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2021-12-10 22:19:03 +00:00
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2013-04-18 16:55:46 +00:00
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void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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2017-02-14 21:53:12 +00:00
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#ifdef CONFIG_GENERIC_MSI_IRQ
|
2013-04-18 16:55:46 +00:00
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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2017-02-14 21:53:12 +00:00
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#else
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2022-11-11 13:54:40 +00:00
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static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { }
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2017-02-14 21:53:12 +00:00
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#endif
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2014-11-09 15:10:33 +00:00
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2015-07-28 13:46:16 +00:00
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typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
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struct msi_msg *msg);
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2021-12-06 22:27:39 +00:00
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/**
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* pci_msi_desc - PCI/MSI specific MSI descriptor data
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*
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* @msi_mask: [PCI MSI] MSI cached mask bits
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* @msix_ctrl: [PCI MSI-X] MSI-X cached per vector control bits
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* @is_msix: [PCI MSI/X] True if MSI-X
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* @multiple: [PCI MSI/X] log2 num of messages allocated
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* @multi_cap: [PCI MSI/X] log2 num of messages supported
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* @can_mask: [PCI MSI/X] Masking supported?
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* @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
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* @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
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* @mask_pos: [PCI MSI] Mask register position
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* @mask_base: [PCI MSI-X] Mask register base address
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*/
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struct pci_msi_desc {
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union {
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u32 msi_mask;
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u32 msix_ctrl;
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};
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struct {
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u8 is_msix : 1;
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u8 multiple : 3;
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u8 multi_cap : 3;
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u8 can_mask : 1;
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u8 is_64 : 1;
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u8 is_virtual : 1;
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unsigned default_irq;
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} msi_attrib;
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union {
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u8 mask_pos;
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void __iomem *mask_base;
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};
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};
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2022-11-24 23:26:15 +00:00
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/**
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* union msi_domain_cookie - Opaque MSI domain specific data
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* @value: u64 value store
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* @ptr: Pointer to domain specific data
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* @iobase: Domain specific IOmem pointer
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*
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* The content of this data is implementation defined and used by the MSI
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* domain to store domain specific information which is requried for
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* interrupt chip callbacks.
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*/
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union msi_domain_cookie {
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u64 value;
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void *ptr;
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void __iomem *iobase;
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};
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/**
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* struct msi_desc_data - Generic MSI descriptor data
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* @dcookie: Cookie for MSI domain specific data which is required
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* for irq_chip callbacks
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* @icookie: Cookie for the MSI interrupt instance provided by
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* the usage site to the allocation function
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*
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* The content of this data is implementation defined, e.g. PCI/IMS
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* implementations define the meaning of the data. The MSI core ignores
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* this data completely.
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*/
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struct msi_desc_data {
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union msi_domain_cookie dcookie;
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union msi_instance_cookie icookie;
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};
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2021-12-06 22:51:12 +00:00
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#define MSI_MAX_INDEX ((unsigned int)USHRT_MAX)
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2015-07-09 08:00:46 +00:00
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/**
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* struct msi_desc - Descriptor structure for MSI based interrupts
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* @irq: The base interrupt number
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* @nvec_used: The number of vectors used
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* @dev: Pointer to the device which uses this descriptor
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* @msg: The last set MSI message cached for reuse
|
2016-07-04 08:39:26 +00:00
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* @affinity: Optional pointer to a cpu affinity mask for this descriptor
|
2021-12-06 22:51:50 +00:00
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* @sysfs_attr: Pointer to sysfs device attribute
|
2015-07-09 08:00:46 +00:00
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*
|
2019-05-23 22:30:51 +00:00
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* @write_msi_msg: Callback that may be called when the MSI message
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* address or data changes
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* @write_msi_msg_data: Data parameter for the callback.
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*
|
2021-12-10 22:19:12 +00:00
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* @msi_index: Index of the msi descriptor
|
2021-12-10 22:19:17 +00:00
|
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* @pci: PCI specific msi descriptor data
|
2022-11-24 23:26:15 +00:00
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* @data: Generic MSI descriptor data
|
2015-07-09 08:00:46 +00:00
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*/
|
2006-10-04 09:16:59 +00:00
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struct msi_desc {
|
2015-07-09 08:00:46 +00:00
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/* Shared device/bus type independent data */
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unsigned int irq;
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unsigned int nvec_used;
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struct device *dev;
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struct msi_msg msg;
|
2018-12-04 15:51:20 +00:00
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struct irq_affinity_desc *affinity;
|
2019-05-01 13:58:18 +00:00
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#ifdef CONFIG_IRQ_MSI_IOMMU
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const void *iommu_cookie;
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#endif
|
2021-12-06 22:51:50 +00:00
|
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#ifdef CONFIG_SYSFS
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struct device_attribute *sysfs_attrs;
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#endif
|
2006-10-04 09:16:59 +00:00
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2019-05-23 22:30:51 +00:00
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void (*write_msi_msg)(struct msi_desc *entry, void *data);
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void *write_msi_msg_data;
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2021-12-10 22:19:12 +00:00
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u16 msi_index;
|
2022-11-24 23:26:15 +00:00
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union {
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struct pci_msi_desc pci;
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struct msi_desc_data data;
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};
|
2006-10-04 09:16:59 +00:00
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};
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2021-12-06 22:51:08 +00:00
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/*
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* Filter values for the MSI descriptor iterators and accessor functions.
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*/
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enum msi_desc_filter {
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/* All descriptors */
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MSI_DESC_ALL,
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/* Descriptors which have no interrupt associated */
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MSI_DESC_NOTASSOCIATED,
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/* Descriptors which have an interrupt associated */
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MSI_DESC_ASSOCIATED,
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};
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2022-11-24 23:24:20 +00:00
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/**
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* struct msi_dev_domain - The internals of MSI domain info per device
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* @store: Xarray for storing MSI descriptor pointers
|
2022-11-24 23:24:22 +00:00
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* @irqdomain: Pointer to a per device interrupt domain
|
2022-11-24 23:24:20 +00:00
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*/
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struct msi_dev_domain {
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struct xarray store;
|
2022-11-24 23:24:22 +00:00
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struct irq_domain *domain;
|
2022-11-24 23:24:20 +00:00
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};
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|
2021-12-10 22:18:55 +00:00
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/**
|
|
|
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* msi_device_data - MSI per device data
|
|
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|
* @properties: MSI properties which are interesting to drivers
|
2021-12-10 22:19:11 +00:00
|
|
|
* @platform_data: Platform-MSI specific data
|
2021-12-06 22:51:52 +00:00
|
|
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* @mutex: Mutex protecting the MSI descriptor store
|
2022-11-24 23:24:20 +00:00
|
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* @__domains: Internal data for per device MSI domains
|
2021-12-06 22:51:52 +00:00
|
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* @__iter_idx: Index to search the next entry for iterators
|
2021-12-10 22:18:55 +00:00
|
|
|
*/
|
|
|
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struct msi_device_data {
|
|
|
|
unsigned long properties;
|
2021-12-10 22:19:11 +00:00
|
|
|
struct platform_msi_priv_data *platform_data;
|
2021-12-06 22:51:05 +00:00
|
|
|
struct mutex mutex;
|
2022-11-24 23:24:20 +00:00
|
|
|
struct msi_dev_domain __domains[MSI_MAX_DEVICE_IRQDOMAINS];
|
2021-12-06 22:51:52 +00:00
|
|
|
unsigned long __iter_idx;
|
2021-12-10 22:18:55 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
int msi_setup_device_data(struct device *dev);
|
|
|
|
|
2021-12-06 22:51:05 +00:00
|
|
|
void msi_lock_descs(struct device *dev);
|
|
|
|
void msi_unlock_descs(struct device *dev);
|
2021-12-10 22:19:23 +00:00
|
|
|
|
2022-11-24 23:24:24 +00:00
|
|
|
struct msi_desc *msi_domain_first_desc(struct device *dev, unsigned int domid,
|
|
|
|
enum msi_desc_filter filter);
|
2021-12-06 22:51:08 +00:00
|
|
|
|
|
|
|
/**
|
2022-11-24 23:24:24 +00:00
|
|
|
* msi_first_desc - Get the first MSI descriptor of the default irqdomain
|
|
|
|
* @dev: Device to operate on
|
|
|
|
* @filter: Descriptor state filter
|
|
|
|
*
|
|
|
|
* Must be called with the MSI descriptor mutex held, i.e. msi_lock_descs()
|
|
|
|
* must be invoked before the call.
|
|
|
|
*
|
|
|
|
* Return: Pointer to the first MSI descriptor matching the search
|
|
|
|
* criteria, NULL if none found.
|
|
|
|
*/
|
|
|
|
static inline struct msi_desc *msi_first_desc(struct device *dev,
|
|
|
|
enum msi_desc_filter filter)
|
|
|
|
{
|
|
|
|
return msi_domain_first_desc(dev, MSI_DEFAULT_DOMAIN, filter);
|
|
|
|
}
|
|
|
|
|
|
|
|
struct msi_desc *msi_next_desc(struct device *dev, unsigned int domid,
|
|
|
|
enum msi_desc_filter filter);
|
|
|
|
|
|
|
|
/**
|
|
|
|
* msi_domain_for_each_desc - Iterate the MSI descriptors in a specific domain
|
|
|
|
*
|
|
|
|
* @desc: struct msi_desc pointer used as iterator
|
|
|
|
* @dev: struct device pointer - device to iterate
|
|
|
|
* @domid: The id of the interrupt domain which should be walked.
|
|
|
|
* @filter: Filter for descriptor selection
|
|
|
|
*
|
|
|
|
* Notes:
|
|
|
|
* - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
|
|
|
|
* pair.
|
|
|
|
* - It is safe to remove a retrieved MSI descriptor in the loop.
|
|
|
|
*/
|
|
|
|
#define msi_domain_for_each_desc(desc, dev, domid, filter) \
|
|
|
|
for ((desc) = msi_domain_first_desc((dev), (domid), (filter)); (desc); \
|
|
|
|
(desc) = msi_next_desc((dev), (domid), (filter)))
|
|
|
|
|
|
|
|
/**
|
|
|
|
* msi_for_each_desc - Iterate the MSI descriptors in the default irqdomain
|
2021-12-06 22:51:08 +00:00
|
|
|
*
|
|
|
|
* @desc: struct msi_desc pointer used as iterator
|
|
|
|
* @dev: struct device pointer - device to iterate
|
|
|
|
* @filter: Filter for descriptor selection
|
|
|
|
*
|
|
|
|
* Notes:
|
|
|
|
* - The loop must be protected with a msi_lock_descs()/msi_unlock_descs()
|
|
|
|
* pair.
|
|
|
|
* - It is safe to remove a retrieved MSI descriptor in the loop.
|
|
|
|
*/
|
2022-11-24 23:24:24 +00:00
|
|
|
#define msi_for_each_desc(desc, dev, filter) \
|
|
|
|
msi_domain_for_each_desc((desc), (dev), MSI_DEFAULT_DOMAIN, (filter))
|
2021-12-06 22:51:08 +00:00
|
|
|
|
2015-07-09 08:00:45 +00:00
|
|
|
#define msi_desc_to_dev(desc) ((desc)->dev)
|
2014-11-15 14:24:03 +00:00
|
|
|
|
2019-05-01 13:58:18 +00:00
|
|
|
#ifdef CONFIG_IRQ_MSI_IOMMU
|
|
|
|
static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
|
|
|
|
{
|
|
|
|
return desc->iommu_cookie;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
|
|
|
|
const void *iommu_cookie)
|
|
|
|
{
|
|
|
|
desc->iommu_cookie = iommu_cookie;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline const void *msi_desc_get_iommu_cookie(struct msi_desc *desc)
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void msi_desc_set_iommu_cookie(struct msi_desc *desc,
|
|
|
|
const void *iommu_cookie)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2022-11-24 23:24:29 +00:00
|
|
|
int msi_domain_insert_msi_desc(struct device *dev, unsigned int domid,
|
|
|
|
struct msi_desc *init_desc);
|
|
|
|
/**
|
|
|
|
* msi_insert_msi_desc - Allocate and initialize a MSI descriptor in the
|
|
|
|
* default irqdomain and insert it at @init_desc->msi_index
|
|
|
|
* @dev: Pointer to the device for which the descriptor is allocated
|
|
|
|
* @init_desc: Pointer to an MSI descriptor to initialize the new descriptor
|
|
|
|
*
|
|
|
|
* Return: 0 on success or an appropriate failure code.
|
|
|
|
*/
|
|
|
|
static inline int msi_insert_msi_desc(struct device *dev, struct msi_desc *init_desc)
|
|
|
|
{
|
|
|
|
return msi_domain_insert_msi_desc(dev, MSI_DEFAULT_DOMAIN, init_desc);
|
|
|
|
}
|
|
|
|
|
2022-11-24 23:24:30 +00:00
|
|
|
void msi_domain_free_msi_descs_range(struct device *dev, unsigned int domid,
|
|
|
|
unsigned int first, unsigned int last);
|
2021-12-06 22:51:12 +00:00
|
|
|
|
|
|
|
/**
|
2022-11-24 23:24:30 +00:00
|
|
|
* msi_free_msi_descs_range - Free a range of MSI descriptors of a device
|
|
|
|
* in the default irqdomain
|
|
|
|
*
|
|
|
|
* @dev: Device for which to free the descriptors
|
|
|
|
* @first: Index to start freeing from (inclusive)
|
|
|
|
* @last: Last index to be freed (inclusive)
|
|
|
|
*/
|
|
|
|
static inline void msi_free_msi_descs_range(struct device *dev, unsigned int first,
|
|
|
|
unsigned int last)
|
|
|
|
{
|
|
|
|
msi_domain_free_msi_descs_range(dev, MSI_DEFAULT_DOMAIN, first, last);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* msi_free_msi_descs - Free all MSI descriptors of a device in the default irqdomain
|
2021-12-06 22:51:12 +00:00
|
|
|
* @dev: Device to free the descriptors
|
|
|
|
*/
|
|
|
|
static inline void msi_free_msi_descs(struct device *dev)
|
|
|
|
{
|
2022-11-11 13:54:22 +00:00
|
|
|
msi_free_msi_descs_range(dev, 0, MSI_MAX_INDEX);
|
2021-12-06 22:51:12 +00:00
|
|
|
}
|
2021-12-06 22:51:10 +00:00
|
|
|
|
2006-10-04 09:16:59 +00:00
|
|
|
/*
|
2020-08-26 11:17:02 +00:00
|
|
|
* The arch hooks to setup up msi irqs. Default functions are implemented
|
|
|
|
* as weak symbols so that they /can/ be overriden by architecture specific
|
2021-03-30 15:11:39 +00:00
|
|
|
* code if needed. These hooks can only be enabled by the architecture.
|
2020-08-26 11:17:02 +00:00
|
|
|
*
|
|
|
|
* If CONFIG_PCI_MSI_ARCH_FALLBACKS is not selected they are replaced by
|
|
|
|
* stubs with warnings.
|
2006-10-04 09:16:59 +00:00
|
|
|
*/
|
2020-08-26 11:17:02 +00:00
|
|
|
#ifdef CONFIG_PCI_MSI_ARCH_FALLBACKS
|
2007-01-28 19:56:37 +00:00
|
|
|
int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
|
2006-10-04 09:16:59 +00:00
|
|
|
void arch_teardown_msi_irq(unsigned int irq);
|
2013-04-18 16:55:46 +00:00
|
|
|
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
|
|
|
|
void arch_teardown_msi_irqs(struct pci_dev *dev);
|
2023-05-03 13:16:53 +00:00
|
|
|
#endif /* CONFIG_PCI_MSI_ARCH_FALLBACKS */
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Xen uses non-default msi_domain_ops and hence needs a way to populate sysfs
|
|
|
|
* entries of MSI IRQs.
|
|
|
|
*/
|
|
|
|
#if defined(CONFIG_PCI_XEN) || defined(CONFIG_PCI_MSI_ARCH_FALLBACKS)
|
2021-12-06 22:51:50 +00:00
|
|
|
#ifdef CONFIG_SYSFS
|
|
|
|
int msi_device_populate_sysfs(struct device *dev);
|
|
|
|
void msi_device_destroy_sysfs(struct device *dev);
|
|
|
|
#else /* CONFIG_SYSFS */
|
|
|
|
static inline int msi_device_populate_sysfs(struct device *dev) { return 0; }
|
|
|
|
static inline void msi_device_destroy_sysfs(struct device *dev) { }
|
|
|
|
#endif /* !CONFIG_SYSFS */
|
2023-05-03 13:16:53 +00:00
|
|
|
#endif /* CONFIG_PCI_XEN || CONFIG_PCI_MSI_ARCH_FALLBACKS */
|
2020-08-26 11:17:02 +00:00
|
|
|
|
|
|
|
/*
|
2021-12-06 22:27:42 +00:00
|
|
|
* The restore hook is still available even for fully irq domain based
|
|
|
|
* setups. Courtesy to XEN/X86.
|
2020-08-26 11:17:02 +00:00
|
|
|
*/
|
2021-12-06 22:27:42 +00:00
|
|
|
bool arch_restore_msi_irqs(struct pci_dev *dev);
|
2006-10-04 09:16:59 +00:00
|
|
|
|
2022-11-11 13:54:40 +00:00
|
|
|
#ifdef CONFIG_GENERIC_MSI_IRQ
|
2014-11-15 14:24:04 +00:00
|
|
|
|
2014-11-15 14:24:05 +00:00
|
|
|
#include <linux/irqhandler.h>
|
2014-11-15 14:24:04 +00:00
|
|
|
|
2014-11-12 10:39:03 +00:00
|
|
|
struct irq_domain;
|
platform-msi: Allow creation of a MSI-based stacked irq domain
We almost have all the needed bits requiredable to create a irq domain
on top of a MSI domain.
For this, we enable a few things:
- the virq is stored in the msi_desc
- device, msi_alloc_info and domain-specific data
are stored in the platform_priv_data structure
- we introduce a new API for platform-msi:
/* Create a MSI-based domain */
struct irq_domain *
platform_msi_create_device_domain(struct device *dev,
unsigned int nvec,
irq_write_msi_msg_t write_msi_msg,
const struct irq_domain_ops *ops,
void *host_data);
/* Allocate MSIs in an MSI domain */
int platform_msi_domain_alloc(struct irq_domain *domain,
unsigned int virq,
unsigned int nr_irqs);
/* Free MSIs from an MSI domain */
void platform_msi_domain_free(struct irq_domain *domain,
unsigned int virq,
unsigned int nvec);
/* Obtain the host data passed to platform_msi_create_device_domain */
void *platform_msi_get_host_data(struct irq_domain *domain);
platform_msi_create_device_domain() is a hybrid of irqdomain creation
and interrupt allocation, creating a domain backed by the MSIs associated
to a device. IRQs can then be allocated in that domain using
platform_msi_domain_alloc().
This now allows a wired irq to MSI bridge to be created.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-11-23 08:26:07 +00:00
|
|
|
struct irq_domain_ops;
|
2014-11-12 10:39:03 +00:00
|
|
|
struct irq_chip;
|
|
|
|
struct device_node;
|
2015-10-13 11:51:44 +00:00
|
|
|
struct fwnode_handle;
|
2014-11-12 10:39:03 +00:00
|
|
|
struct msi_domain_info;
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct msi_domain_ops - MSI interrupt domain callbacks
|
|
|
|
* @get_hwirq: Retrieve the resulting hw irq number
|
|
|
|
* @msi_init: Domain specific init function for MSI interrupts
|
|
|
|
* @msi_free: Domain specific function to free a MSI interrupts
|
2014-11-15 14:24:04 +00:00
|
|
|
* @msi_prepare: Prepare the allocation of the interrupts in the domain
|
2022-11-24 23:26:16 +00:00
|
|
|
* @prepare_desc: Optional function to prepare the allocated MSI descriptor
|
|
|
|
* in the domain
|
2014-11-15 14:24:04 +00:00
|
|
|
* @set_desc: Set the msi descriptor for an interrupt
|
2020-08-26 11:16:57 +00:00
|
|
|
* @domain_alloc_irqs: Optional function to override the default allocation
|
|
|
|
* function.
|
|
|
|
* @domain_free_irqs: Optional function to override the default free
|
|
|
|
* function.
|
2022-11-11 13:54:27 +00:00
|
|
|
* @msi_post_free: Optional function which is invoked after freeing
|
|
|
|
* all interrupts.
|
2014-11-15 14:24:04 +00:00
|
|
|
*
|
2021-12-06 22:27:29 +00:00
|
|
|
* @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
|
|
|
|
* irqdomain.
|
2014-11-15 14:24:04 +00:00
|
|
|
*
|
2022-11-24 23:26:16 +00:00
|
|
|
* @msi_check, @msi_prepare, @prepare_desc and @set_desc are callbacks used by the
|
2022-11-24 23:24:35 +00:00
|
|
|
* msi_domain_alloc/free_irqs*() variants.
|
2020-08-26 11:16:57 +00:00
|
|
|
*
|
|
|
|
* @domain_alloc_irqs, @domain_free_irqs can be used to override the
|
|
|
|
* default allocation/free functions (__msi_domain_alloc/free_irqs). This
|
|
|
|
* is initially for a wrapper around XENs seperate MSI universe which can't
|
|
|
|
* be wrapped into the regular irq domains concepts by mere mortals. This
|
|
|
|
* allows to universally use msi_domain_alloc/free_irqs without having to
|
|
|
|
* special case XEN all over the place.
|
2014-11-12 10:39:03 +00:00
|
|
|
*/
|
|
|
|
struct msi_domain_ops {
|
2014-11-15 14:24:05 +00:00
|
|
|
irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
|
|
|
|
msi_alloc_info_t *arg);
|
2014-11-12 10:39:03 +00:00
|
|
|
int (*msi_init)(struct irq_domain *domain,
|
|
|
|
struct msi_domain_info *info,
|
|
|
|
unsigned int virq, irq_hw_number_t hwirq,
|
2014-11-15 14:24:05 +00:00
|
|
|
msi_alloc_info_t *arg);
|
2014-11-12 10:39:03 +00:00
|
|
|
void (*msi_free)(struct irq_domain *domain,
|
|
|
|
struct msi_domain_info *info,
|
|
|
|
unsigned int virq);
|
2014-11-15 14:24:04 +00:00
|
|
|
int (*msi_prepare)(struct irq_domain *domain,
|
|
|
|
struct device *dev, int nvec,
|
|
|
|
msi_alloc_info_t *arg);
|
2022-11-24 23:26:16 +00:00
|
|
|
void (*prepare_desc)(struct irq_domain *domain, msi_alloc_info_t *arg,
|
|
|
|
struct msi_desc *desc);
|
2014-11-15 14:24:04 +00:00
|
|
|
void (*set_desc)(msi_alloc_info_t *arg,
|
|
|
|
struct msi_desc *desc);
|
2020-08-26 11:16:57 +00:00
|
|
|
int (*domain_alloc_irqs)(struct irq_domain *domain,
|
|
|
|
struct device *dev, int nvec);
|
|
|
|
void (*domain_free_irqs)(struct irq_domain *domain,
|
|
|
|
struct device *dev);
|
2022-11-11 13:54:27 +00:00
|
|
|
void (*msi_post_free)(struct irq_domain *domain,
|
|
|
|
struct device *dev);
|
2014-11-12 10:39:03 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* struct msi_domain_info - MSI interrupt domain data
|
2014-11-15 14:24:05 +00:00
|
|
|
* @flags: Flags to decribe features and capabilities
|
2022-11-11 13:54:33 +00:00
|
|
|
* @bus_token: The domain bus token
|
2022-11-24 23:25:51 +00:00
|
|
|
* @hwsize: The hardware table size or the software index limit.
|
|
|
|
* If 0 then the size is considered unlimited and
|
|
|
|
* gets initialized to the maximum software index limit
|
|
|
|
* by the domain creation code.
|
2014-11-15 14:24:05 +00:00
|
|
|
* @ops: The callback data structure
|
|
|
|
* @chip: Optional: associated interrupt chip
|
|
|
|
* @chip_data: Optional: associated interrupt chip data
|
|
|
|
* @handler: Optional: associated interrupt flow handler
|
|
|
|
* @handler_data: Optional: associated interrupt flow handler data
|
|
|
|
* @handler_name: Optional: associated interrupt flow handler name
|
|
|
|
* @data: Optional: domain specific data
|
2014-11-12 10:39:03 +00:00
|
|
|
*/
|
|
|
|
struct msi_domain_info {
|
2022-11-11 13:54:33 +00:00
|
|
|
u32 flags;
|
|
|
|
enum irq_domain_bus_token bus_token;
|
2022-11-24 23:25:51 +00:00
|
|
|
unsigned int hwsize;
|
2022-11-11 13:54:33 +00:00
|
|
|
struct msi_domain_ops *ops;
|
|
|
|
struct irq_chip *chip;
|
|
|
|
void *chip_data;
|
|
|
|
irq_flow_handler_t handler;
|
|
|
|
void *handler_data;
|
|
|
|
const char *handler_name;
|
|
|
|
void *data;
|
2014-11-12 10:39:03 +00:00
|
|
|
};
|
|
|
|
|
2022-11-24 23:25:49 +00:00
|
|
|
/**
|
|
|
|
* struct msi_domain_template - Template for MSI device domains
|
|
|
|
* @name: Storage for the resulting name. Filled in by the core.
|
|
|
|
* @chip: Interrupt chip for this domain
|
|
|
|
* @ops: MSI domain ops
|
|
|
|
* @info: MSI domain info data
|
|
|
|
*/
|
|
|
|
struct msi_domain_template {
|
|
|
|
char name[48];
|
|
|
|
struct irq_chip chip;
|
|
|
|
struct msi_domain_ops ops;
|
|
|
|
struct msi_domain_info info;
|
|
|
|
};
|
|
|
|
|
2022-11-24 23:25:46 +00:00
|
|
|
/*
|
|
|
|
* Flags for msi_domain_info
|
|
|
|
*
|
|
|
|
* Bit 0-15: Generic MSI functionality which is not subject to restriction
|
|
|
|
* by parent domains
|
|
|
|
*
|
|
|
|
* Bit 16-31: Functionality which depends on the underlying parent domain and
|
|
|
|
* can be masked out by msi_parent_ops::init_dev_msi_info() when
|
|
|
|
* a device MSI domain is initialized.
|
|
|
|
*/
|
2014-11-15 14:24:05 +00:00
|
|
|
enum {
|
|
|
|
/*
|
|
|
|
* Init non implemented ops callbacks with default MSI domain
|
|
|
|
* callbacks.
|
|
|
|
*/
|
|
|
|
MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
|
|
|
|
/*
|
|
|
|
* Init non implemented chip callbacks with default MSI chip
|
|
|
|
* callbacks.
|
|
|
|
*/
|
|
|
|
MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
|
2016-07-13 16:18:33 +00:00
|
|
|
/* Needs early activate, required for PCI */
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_ACTIVATE_EARLY = (1 << 2),
|
2017-09-13 21:29:13 +00:00
|
|
|
/*
|
|
|
|
* Must reactivate when irq is started even when
|
|
|
|
* MSI_FLAG_ACTIVATE_EARLY has been set.
|
|
|
|
*/
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_MUST_REACTIVATE = (1 << 3),
|
2021-12-10 22:18:55 +00:00
|
|
|
/* Populate sysfs on alloc() and destroy it on free() */
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_DEV_SYSFS = (1 << 4),
|
2021-12-06 22:51:12 +00:00
|
|
|
/* Allocate simple MSI descriptors */
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS = (1 << 5),
|
2021-12-06 22:51:12 +00:00
|
|
|
/* Free MSI descriptors */
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_FREE_MSI_DESCS = (1 << 6),
|
2022-11-24 23:24:08 +00:00
|
|
|
/*
|
|
|
|
* Quirk to handle MSI implementations which do not provide
|
|
|
|
* masking. Currently known to affect x86, but has to be partially
|
|
|
|
* handled in the core MSI code.
|
|
|
|
*/
|
2022-11-24 23:25:46 +00:00
|
|
|
MSI_FLAG_NOMASK_QUIRK = (1 << 7),
|
|
|
|
|
|
|
|
/* Mask for the generic functionality */
|
|
|
|
MSI_GENERIC_FLAGS_MASK = GENMASK(15, 0),
|
|
|
|
|
|
|
|
/* Mask for the domain specific functionality */
|
|
|
|
MSI_DOMAIN_FLAGS_MASK = GENMASK(31, 16),
|
|
|
|
|
|
|
|
/* Support multiple PCI MSI interrupts */
|
|
|
|
MSI_FLAG_MULTI_PCI_MSI = (1 << 16),
|
|
|
|
/* Support PCI MSIX interrupts */
|
|
|
|
MSI_FLAG_PCI_MSIX = (1 << 17),
|
|
|
|
/* Is level-triggered capable, using two messages */
|
|
|
|
MSI_FLAG_LEVEL_CAPABLE = (1 << 18),
|
|
|
|
/* MSI-X entries must be contiguous */
|
|
|
|
MSI_FLAG_MSIX_CONTIGUOUS = (1 << 19),
|
2022-11-24 23:26:20 +00:00
|
|
|
/* PCI/MSI-X vectors can be dynamically allocated/freed post MSI-X enable */
|
|
|
|
MSI_FLAG_PCI_MSIX_ALLOC_DYN = (1 << 20),
|
2022-11-24 23:26:28 +00:00
|
|
|
/* Support for PCI/IMS */
|
|
|
|
MSI_FLAG_PCI_IMS = (1 << 21),
|
2014-11-15 14:24:05 +00:00
|
|
|
};
|
|
|
|
|
2022-11-24 23:25:48 +00:00
|
|
|
/**
|
|
|
|
* struct msi_parent_ops - MSI parent domain callbacks and configuration info
|
|
|
|
*
|
|
|
|
* @supported_flags: Required: The supported MSI flags of the parent domain
|
|
|
|
* @prefix: Optional: Prefix for the domain and chip name
|
|
|
|
* @init_dev_msi_info: Required: Callback for MSI parent domains to setup parent
|
|
|
|
* domain specific domain flags, domain ops and interrupt chip
|
|
|
|
* callbacks when a per device domain is created.
|
|
|
|
*/
|
|
|
|
struct msi_parent_ops {
|
|
|
|
u32 supported_flags;
|
|
|
|
const char *prefix;
|
|
|
|
bool (*init_dev_msi_info)(struct device *dev, struct irq_domain *domain,
|
|
|
|
struct irq_domain *msi_parent_domain,
|
|
|
|
struct msi_domain_info *msi_child_info);
|
|
|
|
};
|
|
|
|
|
|
|
|
bool msi_parent_init_dev_msi_info(struct device *dev, struct irq_domain *domain,
|
|
|
|
struct irq_domain *msi_parent_domain,
|
|
|
|
struct msi_domain_info *msi_child_info);
|
|
|
|
|
2014-11-12 10:39:03 +00:00
|
|
|
int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
|
|
|
|
bool force);
|
|
|
|
|
2015-10-13 11:51:44 +00:00
|
|
|
struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
|
2014-11-12 10:39:03 +00:00
|
|
|
struct msi_domain_info *info,
|
|
|
|
struct irq_domain *parent);
|
2022-11-24 23:24:33 +00:00
|
|
|
|
2022-11-24 23:25:56 +00:00
|
|
|
bool msi_create_device_irq_domain(struct device *dev, unsigned int domid,
|
|
|
|
const struct msi_domain_template *template,
|
|
|
|
unsigned int hwsize, void *domain_data,
|
|
|
|
void *chip_data);
|
|
|
|
void msi_remove_device_irq_domain(struct device *dev, unsigned int domid);
|
|
|
|
|
2022-11-24 23:25:57 +00:00
|
|
|
bool msi_match_device_irq_domain(struct device *dev, unsigned int domid,
|
|
|
|
enum irq_domain_bus_token bus_token);
|
|
|
|
|
2022-11-24 23:24:35 +00:00
|
|
|
int msi_domain_alloc_irqs_range_locked(struct device *dev, unsigned int domid,
|
|
|
|
unsigned int first, unsigned int last);
|
|
|
|
int msi_domain_alloc_irqs_range(struct device *dev, unsigned int domid,
|
|
|
|
unsigned int first, unsigned int last);
|
|
|
|
int msi_domain_alloc_irqs_all_locked(struct device *dev, unsigned int domid, int nirqs);
|
|
|
|
|
2022-11-24 23:26:18 +00:00
|
|
|
struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, unsigned int index,
|
|
|
|
const struct irq_affinity_desc *affdesc,
|
|
|
|
union msi_instance_cookie *cookie);
|
2022-11-24 23:24:35 +00:00
|
|
|
|
2022-11-24 23:24:33 +00:00
|
|
|
void msi_domain_free_irqs_range_locked(struct device *dev, unsigned int domid,
|
|
|
|
unsigned int first, unsigned int last);
|
|
|
|
void msi_domain_free_irqs_range(struct device *dev, unsigned int domid,
|
|
|
|
unsigned int first, unsigned int last);
|
|
|
|
void msi_domain_free_irqs_all_locked(struct device *dev, unsigned int domid);
|
|
|
|
void msi_domain_free_irqs_all(struct device *dev, unsigned int domid);
|
|
|
|
|
2014-11-12 10:39:03 +00:00
|
|
|
struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
|
|
|
|
|
2015-10-13 11:51:44 +00:00
|
|
|
struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
|
2015-07-28 13:46:16 +00:00
|
|
|
struct msi_domain_info *info,
|
|
|
|
struct irq_domain *parent);
|
|
|
|
int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
|
|
|
|
irq_write_msi_msg_t write_msi_msg);
|
|
|
|
void platform_msi_domain_free_irqs(struct device *dev);
|
2015-11-23 08:26:05 +00:00
|
|
|
|
|
|
|
/* When an MSI domain is used as an intermediate domain */
|
|
|
|
int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
|
|
|
|
int nvec, msi_alloc_info_t *args);
|
2015-11-23 08:26:06 +00:00
|
|
|
int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
|
|
|
|
int virq, int nvec, msi_alloc_info_t *args);
|
2023-03-01 21:07:48 +00:00
|
|
|
void msi_domain_depopulate_descs(struct device *dev, int virq, int nvec);
|
|
|
|
|
platform-msi: Allow creation of a MSI-based stacked irq domain
We almost have all the needed bits requiredable to create a irq domain
on top of a MSI domain.
For this, we enable a few things:
- the virq is stored in the msi_desc
- device, msi_alloc_info and domain-specific data
are stored in the platform_priv_data structure
- we introduce a new API for platform-msi:
/* Create a MSI-based domain */
struct irq_domain *
platform_msi_create_device_domain(struct device *dev,
unsigned int nvec,
irq_write_msi_msg_t write_msi_msg,
const struct irq_domain_ops *ops,
void *host_data);
/* Allocate MSIs in an MSI domain */
int platform_msi_domain_alloc(struct irq_domain *domain,
unsigned int virq,
unsigned int nr_irqs);
/* Free MSIs from an MSI domain */
void platform_msi_domain_free(struct irq_domain *domain,
unsigned int virq,
unsigned int nvec);
/* Obtain the host data passed to platform_msi_create_device_domain */
void *platform_msi_get_host_data(struct irq_domain *domain);
platform_msi_create_device_domain() is a hybrid of irqdomain creation
and interrupt allocation, creating a domain backed by the MSIs associated
to a device. IRQs can then be allocated in that domain using
platform_msi_domain_alloc().
This now allows a wired irq to MSI bridge to be created.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-11-23 08:26:07 +00:00
|
|
|
struct irq_domain *
|
2018-10-01 14:13:45 +00:00
|
|
|
__platform_msi_create_device_domain(struct device *dev,
|
|
|
|
unsigned int nvec,
|
|
|
|
bool is_tree,
|
|
|
|
irq_write_msi_msg_t write_msi_msg,
|
|
|
|
const struct irq_domain_ops *ops,
|
|
|
|
void *host_data);
|
|
|
|
|
|
|
|
#define platform_msi_create_device_domain(dev, nvec, write, ops, data) \
|
|
|
|
__platform_msi_create_device_domain(dev, nvec, false, write, ops, data)
|
|
|
|
#define platform_msi_create_device_tree_domain(dev, nvec, write, ops, data) \
|
|
|
|
__platform_msi_create_device_domain(dev, nvec, true, write, ops, data)
|
|
|
|
|
2021-12-10 22:19:09 +00:00
|
|
|
int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int virq,
|
|
|
|
unsigned int nr_irqs);
|
|
|
|
void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
|
|
|
|
unsigned int nvec);
|
platform-msi: Allow creation of a MSI-based stacked irq domain
We almost have all the needed bits requiredable to create a irq domain
on top of a MSI domain.
For this, we enable a few things:
- the virq is stored in the msi_desc
- device, msi_alloc_info and domain-specific data
are stored in the platform_priv_data structure
- we introduce a new API for platform-msi:
/* Create a MSI-based domain */
struct irq_domain *
platform_msi_create_device_domain(struct device *dev,
unsigned int nvec,
irq_write_msi_msg_t write_msi_msg,
const struct irq_domain_ops *ops,
void *host_data);
/* Allocate MSIs in an MSI domain */
int platform_msi_domain_alloc(struct irq_domain *domain,
unsigned int virq,
unsigned int nr_irqs);
/* Free MSIs from an MSI domain */
void platform_msi_domain_free(struct irq_domain *domain,
unsigned int virq,
unsigned int nvec);
/* Obtain the host data passed to platform_msi_create_device_domain */
void *platform_msi_get_host_data(struct irq_domain *domain);
platform_msi_create_device_domain() is a hybrid of irqdomain creation
and interrupt allocation, creating a domain backed by the MSIs associated
to a device. IRQs can then be allocated in that domain using
platform_msi_domain_alloc().
This now allows a wired irq to MSI bridge to be created.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2015-11-23 08:26:07 +00:00
|
|
|
void *platform_msi_get_host_data(struct irq_domain *domain);
|
2022-11-28 21:06:42 +00:00
|
|
|
|
|
|
|
bool msi_device_has_isolated_msi(struct device *dev);
|
|
|
|
#else /* CONFIG_GENERIC_MSI_IRQ */
|
|
|
|
static inline bool msi_device_has_isolated_msi(struct device *dev)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Arguably if the platform does not enable MSI support then it has
|
|
|
|
* "isolated MSI", as an interrupt controller that cannot receive MSIs
|
2022-11-29 00:31:57 +00:00
|
|
|
* is inherently isolated by our definition. The default definition for
|
|
|
|
* arch_is_isolated_msi() is conservative and returns false anyhow.
|
2022-11-28 21:06:42 +00:00
|
|
|
*/
|
2022-11-29 00:31:57 +00:00
|
|
|
return arch_is_isolated_msi();
|
2022-11-28 21:06:42 +00:00
|
|
|
}
|
2022-11-11 13:54:40 +00:00
|
|
|
#endif /* CONFIG_GENERIC_MSI_IRQ */
|
2014-11-12 10:39:03 +00:00
|
|
|
|
2022-11-11 13:54:38 +00:00
|
|
|
/* PCI specific interfaces */
|
|
|
|
#ifdef CONFIG_PCI_MSI
|
|
|
|
struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
|
|
|
|
void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
|
|
|
|
void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
|
|
|
|
void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
|
|
|
|
void pci_msi_mask_irq(struct irq_data *data);
|
|
|
|
void pci_msi_unmask_irq(struct irq_data *data);
|
2015-10-13 11:51:44 +00:00
|
|
|
struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
|
2014-11-11 13:02:18 +00:00
|
|
|
struct msi_domain_info *info,
|
|
|
|
struct irq_domain *parent);
|
2015-10-08 22:10:49 +00:00
|
|
|
u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
|
2015-10-02 13:43:06 +00:00
|
|
|
struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
|
2022-11-11 13:54:38 +00:00
|
|
|
#else /* CONFIG_PCI_MSI */
|
2015-10-02 13:43:06 +00:00
|
|
|
static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
|
|
|
|
{
|
|
|
|
return NULL;
|
|
|
|
}
|
2022-11-11 13:54:38 +00:00
|
|
|
static inline void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg) { }
|
|
|
|
#endif /* !CONFIG_PCI_MSI */
|
2014-11-11 13:02:18 +00:00
|
|
|
|
2006-10-04 09:16:59 +00:00
|
|
|
#endif /* LINUX_MSI_H */
|