2013-01-20 23:28:06 +00:00
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/*
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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2013-01-20 23:28:06 +00:00
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#include <linux/mman.h>
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#include <linux/kvm_host.h>
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#include <linux/io.h>
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2012-11-01 16:14:45 +00:00
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#include <linux/hugetlb.h>
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2013-01-20 23:43:58 +00:00
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#include <trace/events/kvm.h>
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2013-01-20 23:28:06 +00:00
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#include <asm/pgalloc.h>
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2013-01-20 23:28:12 +00:00
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#include <asm/cacheflush.h>
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2013-01-20 23:28:06 +00:00
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#include <asm/kvm_arm.h>
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#include <asm/kvm_mmu.h>
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2013-01-20 23:43:58 +00:00
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#include <asm/kvm_mmio.h>
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2013-01-20 23:28:07 +00:00
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#include <asm/kvm_asm.h>
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2013-01-20 23:28:12 +00:00
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#include <asm/kvm_emulate.h>
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2013-01-20 23:28:07 +00:00
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#include "trace.h"
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2013-01-20 23:28:06 +00:00
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extern char __hyp_idmap_text_start[], __hyp_idmap_text_end[];
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ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
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static pgd_t *boot_hyp_pgd;
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2013-04-12 18:12:03 +00:00
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static pgd_t *hyp_pgd;
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2015-03-19 16:42:28 +00:00
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static pgd_t *merged_hyp_pgd;
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2013-01-20 23:28:06 +00:00
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static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
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ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
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static unsigned long hyp_idmap_start;
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static unsigned long hyp_idmap_end;
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static phys_addr_t hyp_idmap_vector;
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2014-10-10 10:14:28 +00:00
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#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
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2014-03-28 14:25:19 +00:00
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2013-10-02 22:32:01 +00:00
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#define kvm_pmd_huge(_x) (pmd_huge(_x) || pmd_trans_huge(_x))
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2015-01-15 23:58:56 +00:00
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#define kvm_pud_huge(_x) pud_huge(_x)
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2012-11-01 16:14:45 +00:00
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2015-01-15 23:58:58 +00:00
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#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
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#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
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static bool memslot_is_logging(struct kvm_memory_slot *memslot)
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{
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return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
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2015-01-15 23:59:01 +00:00
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}
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/**
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* kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
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* @kvm: pointer to kvm structure.
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*
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* Interface to HYP function to flush all VM TLB entries
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*/
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void kvm_flush_remote_tlbs(struct kvm *kvm)
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{
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kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
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2015-01-15 23:58:58 +00:00
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}
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2012-11-01 16:14:45 +00:00
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2013-01-28 15:27:00 +00:00
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static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
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2013-01-20 23:28:07 +00:00
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{
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2013-05-14 11:11:34 +00:00
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/*
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* This function also gets called when dealing with HYP page
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* tables. As HYP doesn't have an associated struct kvm (and
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* the HYP page tables are fairly static), we don't do
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* anything there.
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*/
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if (kvm)
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kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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2013-01-20 23:28:07 +00:00
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}
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2014-12-19 16:48:06 +00:00
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/*
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* D-Cache management functions. They take the page table entries by
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* value, as they are flushing the cache using the kernel mapping (or
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* kmap on 32bit).
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*/
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static void kvm_flush_dcache_pte(pte_t pte)
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{
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__kvm_flush_dcache_pte(pte);
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}
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static void kvm_flush_dcache_pmd(pmd_t pmd)
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{
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__kvm_flush_dcache_pmd(pmd);
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}
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static void kvm_flush_dcache_pud(pud_t pud)
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{
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__kvm_flush_dcache_pud(pud);
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}
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2015-01-15 23:58:58 +00:00
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/**
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* stage2_dissolve_pmd() - clear and flush huge PMD entry
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* @kvm: pointer to kvm structure.
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* @addr: IPA
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* @pmd: pmd pointer for IPA
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*
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* Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
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* pages in the range dirty.
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*/
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static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
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{
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if (!kvm_pmd_huge(*pmd))
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return;
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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put_page(virt_to_page(pmd));
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}
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2013-01-20 23:28:07 +00:00
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static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
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int min, int max)
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{
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void *page;
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BUG_ON(max > KVM_NR_MEM_OBJS);
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if (cache->nobjs >= min)
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return 0;
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while (cache->nobjs < max) {
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page = (void *)__get_free_page(PGALLOC_GFP);
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if (!page)
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return -ENOMEM;
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cache->objects[cache->nobjs++] = page;
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}
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return 0;
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}
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static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
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{
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while (mc->nobjs)
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free_page((unsigned long)mc->objects[--mc->nobjs]);
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}
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static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
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{
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void *p;
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BUG_ON(!mc || !mc->nobjs);
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p = mc->objects[--mc->nobjs];
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return p;
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}
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2014-05-09 21:31:31 +00:00
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static void clear_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
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arm64: KVM: fix 2-level page tables unmapping
When using 64kB pages, we only have two levels of page tables,
meaning that PGD, PUD and PMD are fused. In this case, trying
to refcount PUDs and PMDs independently is a a complete disaster,
as they are the same.
We manage to get it right for the allocation (stage2_set_pte uses
{pmd,pud}_none), but the unmapping path clears both pud and pmd
refcounts, which fails spectacularly with 2-level page tables.
The fix is to avoid calling clear_pud_entry when both the pmd and
pud pages are empty. For this, and instead of introducing another
pud_empty function, consolidate both pte_empty and pmd_empty into
page_empty (the code is actually identical) and use that to also
test the validity of the pud.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-06 12:05:48 +00:00
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{
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2014-05-09 21:31:31 +00:00
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pud_t *pud_table __maybe_unused = pud_offset(pgd, 0);
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pgd_clear(pgd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pud_free(NULL, pud_table);
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put_page(virt_to_page(pgd));
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arm64: KVM: fix 2-level page tables unmapping
When using 64kB pages, we only have two levels of page tables,
meaning that PGD, PUD and PMD are fused. In this case, trying
to refcount PUDs and PMDs independently is a a complete disaster,
as they are the same.
We manage to get it right for the allocation (stage2_set_pte uses
{pmd,pud}_none), but the unmapping path clears both pud and pmd
refcounts, which fails spectacularly with 2-level page tables.
The fix is to avoid calling clear_pud_entry when both the pmd and
pud pages are empty. For this, and instead of introducing another
pud_empty function, consolidate both pte_empty and pmd_empty into
page_empty (the code is actually identical) and use that to also
test the validity of the pud.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-08-06 12:05:48 +00:00
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}
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2013-05-14 11:11:34 +00:00
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static void clear_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
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2013-01-20 23:28:06 +00:00
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{
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2014-05-09 21:31:31 +00:00
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pmd_t *pmd_table = pmd_offset(pud, 0);
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VM_BUG_ON(pud_huge(*pud));
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pud_clear(pud);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pmd_free(NULL, pmd_table);
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2013-04-12 18:12:05 +00:00
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put_page(virt_to_page(pud));
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}
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2013-01-20 23:28:06 +00:00
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2013-05-14 11:11:34 +00:00
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static void clear_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
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2013-04-12 18:12:05 +00:00
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{
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2014-05-09 21:31:31 +00:00
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pte_t *pte_table = pte_offset_kernel(pmd, 0);
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VM_BUG_ON(kvm_pmd_huge(*pmd));
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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pte_free_kernel(NULL, pte_table);
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2013-04-12 18:12:05 +00:00
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put_page(virt_to_page(pmd));
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}
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2014-12-19 16:48:06 +00:00
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/*
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* Unmapping vs dcache management:
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*
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* If a guest maps certain memory pages as uncached, all writes will
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* bypass the data cache and go directly to RAM. However, the CPUs
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* can still speculate reads (not writes) and fill cache lines with
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* data.
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*
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* Those cache lines will be *clean* cache lines though, so a
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* clean+invalidate operation is equivalent to an invalidate
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* operation, because no cache lines are marked dirty.
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*
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* Those clean cache lines could be filled prior to an uncached write
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* by the guest, and the cache coherent IO subsystem would therefore
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* end up writing old data to disk.
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*
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* This is why right after unmapping a page/section and invalidating
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* the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
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* the IO subsystem will never hit in the cache.
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*/
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2014-05-09 21:31:31 +00:00
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static void unmap_ptes(struct kvm *kvm, pmd_t *pmd,
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phys_addr_t addr, phys_addr_t end)
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2013-04-12 18:12:05 +00:00
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{
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2014-05-09 21:31:31 +00:00
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phys_addr_t start_addr = addr;
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pte_t *pte, *start_pte;
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start_pte = pte = pte_offset_kernel(pmd, addr);
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do {
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if (!pte_none(*pte)) {
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2014-12-19 16:48:06 +00:00
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pte_t old_pte = *pte;
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2014-05-09 21:31:31 +00:00
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kvm_set_pte(pte, __pte(0));
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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2014-12-19 16:48:06 +00:00
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/* No need to invalidate the cache for device mappings */
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if ((pte_val(old_pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
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kvm_flush_dcache_pte(old_pte);
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put_page(virt_to_page(pte));
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2014-05-09 21:31:31 +00:00
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}
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} while (pte++, addr += PAGE_SIZE, addr != end);
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2014-10-10 10:14:28 +00:00
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if (kvm_pte_table_empty(kvm, start_pte))
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2014-05-09 21:31:31 +00:00
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clear_pmd_entry(kvm, pmd, start_addr);
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2013-01-20 23:28:06 +00:00
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}
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2014-05-09 21:31:31 +00:00
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static void unmap_pmds(struct kvm *kvm, pud_t *pud,
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phys_addr_t addr, phys_addr_t end)
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2013-03-05 02:43:17 +00:00
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{
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2014-05-09 21:31:31 +00:00
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phys_addr_t next, start_addr = addr;
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pmd_t *pmd, *start_pmd;
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2013-03-05 02:43:17 +00:00
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2014-05-09 21:31:31 +00:00
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start_pmd = pmd = pmd_offset(pud, addr);
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do {
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next = kvm_pmd_addr_end(addr, end);
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if (!pmd_none(*pmd)) {
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if (kvm_pmd_huge(*pmd)) {
|
2014-12-19 16:48:06 +00:00
|
|
|
pmd_t old_pmd = *pmd;
|
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
pmd_clear(pmd);
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2014-12-19 16:48:06 +00:00
|
|
|
|
|
|
|
kvm_flush_dcache_pmd(old_pmd);
|
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
put_page(virt_to_page(pmd));
|
|
|
|
} else {
|
|
|
|
unmap_ptes(kvm, pmd, addr, next);
|
|
|
|
}
|
2012-11-01 16:14:45 +00:00
|
|
|
}
|
2014-05-09 21:31:31 +00:00
|
|
|
} while (pmd++, addr = next, addr != end);
|
2012-11-01 16:14:45 +00:00
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
if (kvm_pmd_table_empty(kvm, start_pmd))
|
2014-05-09 21:31:31 +00:00
|
|
|
clear_pud_entry(kvm, pud, start_addr);
|
|
|
|
}
|
2013-03-05 02:43:17 +00:00
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
static void unmap_puds(struct kvm *kvm, pgd_t *pgd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
phys_addr_t next, start_addr = addr;
|
|
|
|
pud_t *pud, *start_pud;
|
2013-04-12 18:12:05 +00:00
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
start_pud = pud = pud_offset(pgd, addr);
|
|
|
|
do {
|
|
|
|
next = kvm_pud_addr_end(addr, end);
|
|
|
|
if (!pud_none(*pud)) {
|
|
|
|
if (pud_huge(*pud)) {
|
2014-12-19 16:48:06 +00:00
|
|
|
pud_t old_pud = *pud;
|
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
pud_clear(pud);
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2014-12-19 16:48:06 +00:00
|
|
|
|
|
|
|
kvm_flush_dcache_pud(old_pud);
|
|
|
|
|
2014-05-09 21:31:31 +00:00
|
|
|
put_page(virt_to_page(pud));
|
|
|
|
} else {
|
|
|
|
unmap_pmds(kvm, pud, addr, next);
|
2013-04-12 18:12:05 +00:00
|
|
|
}
|
|
|
|
}
|
2014-05-09 21:31:31 +00:00
|
|
|
} while (pud++, addr = next, addr != end);
|
2013-04-12 18:12:05 +00:00
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
if (kvm_pud_table_empty(kvm, start_pud))
|
2014-05-09 21:31:31 +00:00
|
|
|
clear_pgd_entry(kvm, pgd, start_addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
|
|
|
|
phys_addr_t start, u64 size)
|
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
phys_addr_t addr = start, end = start + size;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2015-03-10 19:07:00 +00:00
|
|
|
pgd = pgdp + kvm_pgd_index(addr);
|
2014-05-09 21:31:31 +00:00
|
|
|
do {
|
|
|
|
next = kvm_pgd_addr_end(addr, end);
|
2014-10-28 19:36:45 +00:00
|
|
|
if (!pgd_none(*pgd))
|
|
|
|
unmap_puds(kvm, pgd, addr, next);
|
2014-05-09 21:31:31 +00:00
|
|
|
} while (pgd++, addr = next, addr != end);
|
2013-03-05 02:43:17 +00:00
|
|
|
}
|
|
|
|
|
2014-01-15 12:50:23 +00:00
|
|
|
static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
2014-12-19 16:48:06 +00:00
|
|
|
if (!pte_none(*pte) &&
|
|
|
|
(pte_val(*pte) & PAGE_S2_DEVICE) != PAGE_S2_DEVICE)
|
|
|
|
kvm_flush_dcache_pte(*pte);
|
2014-01-15 12:50:23 +00:00
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
|
|
|
pmd = pmd_offset(pud, addr);
|
|
|
|
do {
|
|
|
|
next = kvm_pmd_addr_end(addr, end);
|
|
|
|
if (!pmd_none(*pmd)) {
|
2014-12-19 16:48:06 +00:00
|
|
|
if (kvm_pmd_huge(*pmd))
|
|
|
|
kvm_flush_dcache_pmd(*pmd);
|
|
|
|
else
|
2014-01-15 12:50:23 +00:00
|
|
|
stage2_flush_ptes(kvm, pmd, addr, next);
|
|
|
|
}
|
|
|
|
} while (pmd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
|
|
|
|
phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
|
|
|
pud = pud_offset(pgd, addr);
|
|
|
|
do {
|
|
|
|
next = kvm_pud_addr_end(addr, end);
|
|
|
|
if (!pud_none(*pud)) {
|
2014-12-19 16:48:06 +00:00
|
|
|
if (pud_huge(*pud))
|
|
|
|
kvm_flush_dcache_pud(*pud);
|
|
|
|
else
|
2014-01-15 12:50:23 +00:00
|
|
|
stage2_flush_pmds(kvm, pud, addr, next);
|
|
|
|
}
|
|
|
|
} while (pud++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void stage2_flush_memslot(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot)
|
|
|
|
{
|
|
|
|
phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
|
|
|
|
phys_addr_t next;
|
|
|
|
pgd_t *pgd;
|
|
|
|
|
2015-03-10 19:07:00 +00:00
|
|
|
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
2014-01-15 12:50:23 +00:00
|
|
|
do {
|
|
|
|
next = kvm_pgd_addr_end(addr, end);
|
|
|
|
stage2_flush_puds(kvm, pgd, addr, next);
|
|
|
|
} while (pgd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_flush_vm - Invalidate cache for pages mapped in stage 2
|
|
|
|
* @kvm: The struct kvm pointer
|
|
|
|
*
|
|
|
|
* Go through the stage 2 page tables and invalidate any cache lines
|
|
|
|
* backing memory already mapped to the VM.
|
|
|
|
*/
|
2014-12-19 16:05:31 +00:00
|
|
|
static void stage2_flush_vm(struct kvm *kvm)
|
2014-01-15 12:50:23 +00:00
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
|
|
|
int idx;
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&kvm->srcu);
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
kvm_for_each_memslot(memslot, slots)
|
|
|
|
stage2_flush_memslot(kvm, memslot);
|
|
|
|
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
srcu_read_unlock(&kvm->srcu, idx);
|
|
|
|
}
|
|
|
|
|
2013-04-12 18:12:07 +00:00
|
|
|
/**
|
|
|
|
* free_boot_hyp_pgd - free HYP boot page tables
|
|
|
|
*
|
|
|
|
* Free the HYP boot page tables. The bounce page is also freed.
|
|
|
|
*/
|
|
|
|
void free_boot_hyp_pgd(void)
|
|
|
|
{
|
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
|
|
|
|
|
|
|
if (boot_hyp_pgd) {
|
2013-05-14 11:11:34 +00:00
|
|
|
unmap_range(NULL, boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
|
|
|
|
unmap_range(NULL, boot_hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
|
2014-10-10 10:14:28 +00:00
|
|
|
free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
|
2013-04-12 18:12:07 +00:00
|
|
|
boot_hyp_pgd = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (hyp_pgd)
|
2013-05-14 11:11:34 +00:00
|
|
|
unmap_range(NULL, hyp_pgd, TRAMPOLINE_VA, PAGE_SIZE);
|
2013-04-12 18:12:07 +00:00
|
|
|
|
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:06 +00:00
|
|
|
/**
|
2013-04-12 18:12:05 +00:00
|
|
|
* free_hyp_pgds - free Hyp-mode page tables
|
2013-01-20 23:28:06 +00:00
|
|
|
*
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
* Assumes hyp_pgd is a page table used strictly in Hyp-mode and
|
|
|
|
* therefore contains either mappings in the kernel memory area (above
|
|
|
|
* PAGE_OFFSET), or device mappings in the vmalloc range (from
|
|
|
|
* VMALLOC_START to VMALLOC_END).
|
|
|
|
*
|
|
|
|
* boot_hyp_pgd should only map two pages for the init code.
|
2013-01-20 23:28:06 +00:00
|
|
|
*/
|
2013-04-12 18:12:05 +00:00
|
|
|
void free_hyp_pgds(void)
|
2013-01-20 23:28:06 +00:00
|
|
|
{
|
|
|
|
unsigned long addr;
|
|
|
|
|
2013-04-12 18:12:07 +00:00
|
|
|
free_boot_hyp_pgd();
|
2013-04-12 18:12:05 +00:00
|
|
|
|
2013-04-12 18:12:07 +00:00
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
|
2013-04-12 18:12:05 +00:00
|
|
|
if (hyp_pgd) {
|
|
|
|
for (addr = PAGE_OFFSET; virt_addr_valid(addr); addr += PGDIR_SIZE)
|
2013-05-14 11:11:34 +00:00
|
|
|
unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
|
2013-04-12 18:12:05 +00:00
|
|
|
for (addr = VMALLOC_START; is_vmalloc_addr((void*)addr); addr += PGDIR_SIZE)
|
2013-05-14 11:11:34 +00:00
|
|
|
unmap_range(NULL, hyp_pgd, KERN_TO_HYP(addr), PGDIR_SIZE);
|
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
|
2013-04-12 18:12:07 +00:00
|
|
|
hyp_pgd = NULL;
|
2013-04-12 18:12:05 +00:00
|
|
|
}
|
2015-03-19 16:42:28 +00:00
|
|
|
if (merged_hyp_pgd) {
|
|
|
|
clear_page(merged_hyp_pgd);
|
|
|
|
free_page((unsigned long)merged_hyp_pgd);
|
|
|
|
merged_hyp_pgd = NULL;
|
|
|
|
}
|
2013-04-12 18:12:05 +00:00
|
|
|
|
2013-01-20 23:28:06 +00:00
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
|
2013-04-12 18:12:01 +00:00
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
2013-01-20 23:28:06 +00:00
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
unsigned long addr;
|
|
|
|
|
2013-04-12 18:12:02 +00:00
|
|
|
addr = start;
|
|
|
|
do {
|
2013-04-12 18:12:01 +00:00
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
|
|
|
kvm_set_pte(pte, pfn_pte(pfn, prot));
|
2013-04-12 18:12:05 +00:00
|
|
|
get_page(virt_to_page(pte));
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
kvm_flush_dcache_to_poc(pte, sizeof(*pte));
|
2013-04-12 18:12:01 +00:00
|
|
|
pfn++;
|
2013-04-12 18:12:02 +00:00
|
|
|
} while (addr += PAGE_SIZE, addr != end);
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
|
2013-04-12 18:12:01 +00:00
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
2013-01-20 23:28:06 +00:00
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
unsigned long addr, next;
|
|
|
|
|
2013-04-12 18:12:02 +00:00
|
|
|
addr = start;
|
|
|
|
do {
|
2013-04-12 18:12:01 +00:00
|
|
|
pmd = pmd_offset(pud, addr);
|
2013-01-20 23:28:06 +00:00
|
|
|
|
|
|
|
BUG_ON(pmd_sect(*pmd));
|
|
|
|
|
|
|
|
if (pmd_none(*pmd)) {
|
2013-04-12 18:12:01 +00:00
|
|
|
pte = pte_alloc_one_kernel(NULL, addr);
|
2013-01-20 23:28:06 +00:00
|
|
|
if (!pte) {
|
|
|
|
kvm_err("Cannot allocate Hyp pte\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
pmd_populate_kernel(NULL, pmd, pte);
|
2013-04-12 18:12:05 +00:00
|
|
|
get_page(virt_to_page(pmd));
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
next = pmd_addr_end(addr, end);
|
|
|
|
|
2013-04-12 18:12:01 +00:00
|
|
|
create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
|
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
2013-04-12 18:12:02 +00:00
|
|
|
} while (addr = next, addr != end);
|
2013-01-20 23:28:06 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
|
|
|
|
unsigned long end, unsigned long pfn,
|
|
|
|
pgprot_t prot)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
pmd_t *pmd;
|
|
|
|
unsigned long addr, next;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
addr = start;
|
|
|
|
do {
|
|
|
|
pud = pud_offset(pgd, addr);
|
|
|
|
|
|
|
|
if (pud_none_or_clear_bad(pud)) {
|
|
|
|
pmd = pmd_alloc_one(NULL, addr);
|
|
|
|
if (!pmd) {
|
|
|
|
kvm_err("Cannot allocate Hyp pmd\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
pud_populate(NULL, pud, pmd);
|
|
|
|
get_page(virt_to_page(pud));
|
|
|
|
kvm_flush_dcache_to_poc(pud, sizeof(*pud));
|
|
|
|
}
|
|
|
|
|
|
|
|
next = pud_addr_end(addr, end);
|
|
|
|
ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
|
|
|
} while (addr = next, addr != end);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-12 18:12:01 +00:00
|
|
|
static int __create_hyp_mappings(pgd_t *pgdp,
|
|
|
|
unsigned long start, unsigned long end,
|
|
|
|
unsigned long pfn, pgprot_t prot)
|
2013-01-20 23:28:06 +00:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
pud_t *pud;
|
|
|
|
unsigned long addr, next;
|
|
|
|
int err = 0;
|
|
|
|
|
|
|
|
mutex_lock(&kvm_hyp_pgd_mutex);
|
2013-04-12 18:12:02 +00:00
|
|
|
addr = start & PAGE_MASK;
|
|
|
|
end = PAGE_ALIGN(end);
|
|
|
|
do {
|
2013-04-12 18:12:01 +00:00
|
|
|
pgd = pgdp + pgd_index(addr);
|
2013-01-20 23:28:06 +00:00
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
if (pgd_none(*pgd)) {
|
|
|
|
pud = pud_alloc_one(NULL, addr);
|
|
|
|
if (!pud) {
|
|
|
|
kvm_err("Cannot allocate Hyp pud\n");
|
2013-01-20 23:28:06 +00:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
2014-10-10 10:14:28 +00:00
|
|
|
pgd_populate(NULL, pgd, pud);
|
|
|
|
get_page(virt_to_page(pgd));
|
|
|
|
kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
next = pgd_addr_end(addr, end);
|
2014-10-10 10:14:28 +00:00
|
|
|
err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
|
2013-01-20 23:28:06 +00:00
|
|
|
if (err)
|
|
|
|
goto out;
|
2013-04-12 18:12:01 +00:00
|
|
|
pfn += (next - addr) >> PAGE_SHIFT;
|
2013-04-12 18:12:02 +00:00
|
|
|
} while (addr = next, addr != end);
|
2013-01-20 23:28:06 +00:00
|
|
|
out:
|
|
|
|
mutex_unlock(&kvm_hyp_pgd_mutex);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
2013-11-15 21:14:12 +00:00
|
|
|
static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
|
|
|
|
{
|
|
|
|
if (!is_vmalloc_addr(kaddr)) {
|
|
|
|
BUG_ON(!virt_addr_valid(kaddr));
|
|
|
|
return __pa(kaddr);
|
|
|
|
} else {
|
|
|
|
return page_to_phys(vmalloc_to_page(kaddr)) +
|
|
|
|
offset_in_page(kaddr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:06 +00:00
|
|
|
/**
|
2012-10-28 00:09:14 +00:00
|
|
|
* create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
|
2013-01-20 23:28:06 +00:00
|
|
|
* @from: The virtual kernel start address of the range
|
|
|
|
* @to: The virtual kernel end address of the range (exclusive)
|
|
|
|
*
|
2012-10-28 00:09:14 +00:00
|
|
|
* The same virtual address as the kernel virtual address is also used
|
|
|
|
* in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
|
|
|
|
* physical pages.
|
2013-01-20 23:28:06 +00:00
|
|
|
*/
|
|
|
|
int create_hyp_mappings(void *from, void *to)
|
|
|
|
{
|
2013-11-15 21:14:12 +00:00
|
|
|
phys_addr_t phys_addr;
|
|
|
|
unsigned long virt_addr;
|
2013-04-12 18:12:01 +00:00
|
|
|
unsigned long start = KERN_TO_HYP((unsigned long)from);
|
|
|
|
unsigned long end = KERN_TO_HYP((unsigned long)to);
|
|
|
|
|
2013-11-15 21:14:12 +00:00
|
|
|
start = start & PAGE_MASK;
|
|
|
|
end = PAGE_ALIGN(end);
|
2013-04-12 18:12:01 +00:00
|
|
|
|
2013-11-15 21:14:12 +00:00
|
|
|
for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
|
|
|
|
int err;
|
2013-04-12 18:12:01 +00:00
|
|
|
|
2013-11-15 21:14:12 +00:00
|
|
|
phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
|
|
|
|
err = __create_hyp_mappings(hyp_pgd, virt_addr,
|
|
|
|
virt_addr + PAGE_SIZE,
|
|
|
|
__phys_to_pfn(phys_addr),
|
|
|
|
PAGE_HYP);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
2012-10-28 00:09:14 +00:00
|
|
|
* create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
|
|
|
|
* @from: The kernel start VA of the range
|
|
|
|
* @to: The kernel end VA of the range (exclusive)
|
2013-04-12 18:12:01 +00:00
|
|
|
* @phys_addr: The physical start address which gets mapped
|
2012-10-28 00:09:14 +00:00
|
|
|
*
|
|
|
|
* The resulting HYP VA is the same as the kernel VA, modulo
|
|
|
|
* HYP_PAGE_OFFSET.
|
2013-01-20 23:28:06 +00:00
|
|
|
*/
|
2013-04-12 18:12:01 +00:00
|
|
|
int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
|
2013-01-20 23:28:06 +00:00
|
|
|
{
|
2013-04-12 18:12:01 +00:00
|
|
|
unsigned long start = KERN_TO_HYP((unsigned long)from);
|
|
|
|
unsigned long end = KERN_TO_HYP((unsigned long)to);
|
|
|
|
|
|
|
|
/* Check for a valid kernel IO mapping */
|
|
|
|
if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return __create_hyp_mappings(hyp_pgd, start, end,
|
|
|
|
__phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
2015-03-10 19:06:59 +00:00
|
|
|
/* Free the HW pgd, one page at a time */
|
|
|
|
static void kvm_free_hwpgd(void *hwpgd)
|
|
|
|
{
|
|
|
|
free_pages_exact(hwpgd, kvm_get_hwpgd_size());
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Allocate the HW PGD, making sure that each page gets its own refcount */
|
|
|
|
static void *kvm_alloc_hwpgd(void)
|
|
|
|
{
|
|
|
|
unsigned int size = kvm_get_hwpgd_size();
|
|
|
|
|
|
|
|
return alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:07 +00:00
|
|
|
/**
|
|
|
|
* kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
|
|
|
|
* @kvm: The KVM struct pointer for the VM.
|
|
|
|
*
|
|
|
|
* Allocates the 1st level table only of size defined by S2_PGD_ORDER (can
|
|
|
|
* support either full 40-bit input addresses or limited to 32-bit input
|
|
|
|
* addresses). Clears the allocated pages.
|
|
|
|
*
|
|
|
|
* Note we don't need locking here as this is only called when the VM is
|
|
|
|
* created, which can only be done once.
|
|
|
|
*/
|
|
|
|
int kvm_alloc_stage2_pgd(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
2015-03-10 19:06:59 +00:00
|
|
|
void *hwpgd;
|
2013-01-20 23:28:07 +00:00
|
|
|
|
|
|
|
if (kvm->arch.pgd != NULL) {
|
|
|
|
kvm_err("kvm_arch already initialized?\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-03-10 19:06:59 +00:00
|
|
|
hwpgd = kvm_alloc_hwpgd();
|
|
|
|
if (!hwpgd)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
/* When the kernel uses more levels of page tables than the
|
|
|
|
* guest, we allocate a fake PGD and pre-populate it to point
|
|
|
|
* to the next-level page table, which will be the real
|
|
|
|
* initial page table pointed to by the VTTBR.
|
|
|
|
*
|
|
|
|
* When KVM_PREALLOC_LEVEL==2, we allocate a single page for
|
|
|
|
* the PMD and the kernel will use folded pud.
|
|
|
|
* When KVM_PREALLOC_LEVEL==1, we allocate 2 consecutive PUD
|
|
|
|
* pages.
|
|
|
|
*/
|
2014-10-10 10:14:28 +00:00
|
|
|
if (KVM_PREALLOC_LEVEL > 0) {
|
2015-03-10 19:06:59 +00:00
|
|
|
int i;
|
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
/*
|
|
|
|
* Allocate fake pgd for the page table manipulation macros to
|
|
|
|
* work. This is not used by the hardware and we have no
|
|
|
|
* alignment requirement for this allocation.
|
|
|
|
*/
|
2015-04-23 10:07:40 +00:00
|
|
|
pgd = kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
|
|
|
|
GFP_KERNEL | __GFP_ZERO);
|
2015-03-10 19:06:59 +00:00
|
|
|
|
|
|
|
if (!pgd) {
|
|
|
|
kvm_free_hwpgd(hwpgd);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Plug the HW PGD into the fake one. */
|
|
|
|
for (i = 0; i < PTRS_PER_S2_PGD; i++) {
|
|
|
|
if (KVM_PREALLOC_LEVEL == 1)
|
|
|
|
pgd_populate(NULL, pgd + i,
|
|
|
|
(pud_t *)hwpgd + i * PTRS_PER_PUD);
|
|
|
|
else if (KVM_PREALLOC_LEVEL == 2)
|
|
|
|
pud_populate(NULL, pud_offset(pgd, 0) + i,
|
|
|
|
(pmd_t *)hwpgd + i * PTRS_PER_PMD);
|
|
|
|
}
|
2014-10-10 10:14:28 +00:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* Allocate actual first-level Stage-2 page table used by the
|
|
|
|
* hardware for Stage-2 page table walks.
|
|
|
|
*/
|
2015-03-10 19:06:59 +00:00
|
|
|
pgd = (pgd_t *)hwpgd;
|
2014-10-10 10:14:28 +00:00
|
|
|
}
|
|
|
|
|
2012-10-15 10:27:37 +00:00
|
|
|
kvm_clean_pgd(pgd);
|
2013-01-20 23:28:07 +00:00
|
|
|
kvm->arch.pgd = pgd;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* unmap_stage2_range -- Clear stage2 page table entries to unmap a range
|
|
|
|
* @kvm: The VM pointer
|
|
|
|
* @start: The intermediate physical base address of the range to unmap
|
|
|
|
* @size: The size of the area to unmap
|
|
|
|
*
|
|
|
|
* Clear a range of stage-2 mappings, lowering the various ref-counts. Must
|
|
|
|
* be called while holding mmu_lock (unless for freeing the stage2 pgd before
|
|
|
|
* destroying the VM), otherwise another faulting VCPU may come in and mess
|
|
|
|
* with things behind our backs.
|
|
|
|
*/
|
|
|
|
static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
|
|
|
|
{
|
2013-05-14 11:11:34 +00:00
|
|
|
unmap_range(kvm, kvm->arch.pgd, start, size);
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
|
2014-11-27 09:35:03 +00:00
|
|
|
static void stage2_unmap_memslot(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot)
|
|
|
|
{
|
|
|
|
hva_t hva = memslot->userspace_addr;
|
|
|
|
phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t size = PAGE_SIZE * memslot->npages;
|
|
|
|
hva_t reg_end = hva + size;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* A memory region could potentially cover multiple VMAs, and any holes
|
|
|
|
* between them, so iterate over all of them to find out if we should
|
|
|
|
* unmap any of them.
|
|
|
|
*
|
|
|
|
* +--------------------------------------------+
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | : VMA 1 | VMA 2 | | VMA 3 : |
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | memory region |
|
|
|
|
* +--------------------------------------------+
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
struct vm_area_struct *vma = find_vma(current->mm, hva);
|
|
|
|
hva_t vm_start, vm_end;
|
|
|
|
|
|
|
|
if (!vma || vma->vm_start >= reg_end)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the intersection of this VMA with the memory region
|
|
|
|
*/
|
|
|
|
vm_start = max(hva, vma->vm_start);
|
|
|
|
vm_end = min(reg_end, vma->vm_end);
|
|
|
|
|
|
|
|
if (!(vma->vm_flags & VM_PFNMAP)) {
|
|
|
|
gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
|
|
|
|
unmap_stage2_range(kvm, gpa, vm_end - vm_start);
|
|
|
|
}
|
|
|
|
hva = vm_end;
|
|
|
|
} while (hva < reg_end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_unmap_vm - Unmap Stage-2 RAM mappings
|
|
|
|
* @kvm: The struct kvm pointer
|
|
|
|
*
|
|
|
|
* Go through the memregions and unmap any reguler RAM
|
|
|
|
* backing memory already mapped to the VM.
|
|
|
|
*/
|
|
|
|
void stage2_unmap_vm(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
|
|
|
int idx;
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&kvm->srcu);
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
kvm_for_each_memslot(memslot, slots)
|
|
|
|
stage2_unmap_memslot(kvm, memslot);
|
|
|
|
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
srcu_read_unlock(&kvm->srcu, idx);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:07 +00:00
|
|
|
/**
|
|
|
|
* kvm_free_stage2_pgd - free all stage-2 tables
|
|
|
|
* @kvm: The KVM struct pointer for the VM.
|
|
|
|
*
|
|
|
|
* Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
|
|
|
|
* underlying level-2 and level-3 tables before freeing the actual level-1 table
|
|
|
|
* and setting the struct pointer to NULL.
|
|
|
|
*
|
|
|
|
* Note we don't need locking here as this is only called when the VM is
|
|
|
|
* destroyed, which can only be done once.
|
|
|
|
*/
|
|
|
|
void kvm_free_stage2_pgd(struct kvm *kvm)
|
|
|
|
{
|
|
|
|
if (kvm->arch.pgd == NULL)
|
|
|
|
return;
|
|
|
|
|
|
|
|
unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
|
2015-03-10 19:06:59 +00:00
|
|
|
kvm_free_hwpgd(kvm_get_hwpgd(kvm));
|
2014-10-10 10:14:28 +00:00
|
|
|
if (KVM_PREALLOC_LEVEL > 0)
|
|
|
|
kfree(kvm->arch.pgd);
|
2015-03-10 19:06:59 +00:00
|
|
|
|
2013-01-20 23:28:07 +00:00
|
|
|
kvm->arch.pgd = NULL;
|
|
|
|
}
|
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
2012-11-01 16:14:45 +00:00
|
|
|
phys_addr_t addr)
|
2013-01-20 23:28:07 +00:00
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
pud_t *pud;
|
|
|
|
|
2015-03-10 19:07:00 +00:00
|
|
|
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
2014-10-10 10:14:28 +00:00
|
|
|
if (WARN_ON(pgd_none(*pgd))) {
|
|
|
|
if (!cache)
|
|
|
|
return NULL;
|
|
|
|
pud = mmu_memory_cache_alloc(cache);
|
|
|
|
pgd_populate(NULL, pgd, pud);
|
|
|
|
get_page(virt_to_page(pgd));
|
|
|
|
}
|
|
|
|
|
|
|
|
return pud_offset(pgd, addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
|
|
|
phys_addr_t addr)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
pmd_t *pmd;
|
|
|
|
|
|
|
|
pud = stage2_get_pud(kvm, cache, addr);
|
2013-01-20 23:28:07 +00:00
|
|
|
if (pud_none(*pud)) {
|
|
|
|
if (!cache)
|
2012-11-01 16:14:45 +00:00
|
|
|
return NULL;
|
2013-01-20 23:28:07 +00:00
|
|
|
pmd = mmu_memory_cache_alloc(cache);
|
|
|
|
pud_populate(NULL, pud, pmd);
|
|
|
|
get_page(virt_to_page(pud));
|
2012-10-15 10:27:37 +00:00
|
|
|
}
|
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
return pmd_offset(pud, addr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
|
|
|
|
*cache, phys_addr_t addr, const pmd_t *new_pmd)
|
|
|
|
{
|
|
|
|
pmd_t *pmd, old_pmd;
|
|
|
|
|
|
|
|
pmd = stage2_get_pmd(kvm, cache, addr);
|
|
|
|
VM_BUG_ON(!pmd);
|
2013-01-20 23:28:07 +00:00
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
/*
|
|
|
|
* Mapping in huge pages should only happen through a fault. If a
|
|
|
|
* page is merged into a transparent huge page, the individual
|
|
|
|
* subpages of that huge page should be unmapped through MMU
|
|
|
|
* notifiers before we get here.
|
|
|
|
*
|
|
|
|
* Merging of CompoundPages is not supported; they should become
|
|
|
|
* splitting first, unmapped, merged, and mapped back in on-demand.
|
|
|
|
*/
|
|
|
|
VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
|
|
|
|
|
|
|
|
old_pmd = *pmd;
|
|
|
|
kvm_set_pmd(pmd, *new_pmd);
|
|
|
|
if (pmd_present(old_pmd))
|
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
|
|
|
else
|
|
|
|
get_page(virt_to_page(pmd));
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
|
2015-01-15 23:58:58 +00:00
|
|
|
phys_addr_t addr, const pte_t *new_pte,
|
|
|
|
unsigned long flags)
|
2012-11-01 16:14:45 +00:00
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte, old_pte;
|
2015-01-15 23:58:58 +00:00
|
|
|
bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
|
|
|
|
bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
|
|
|
|
|
|
|
|
VM_BUG_ON(logging_active && !cache);
|
2012-11-01 16:14:45 +00:00
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
/* Create stage-2 page table mapping - Levels 0 and 1 */
|
2012-11-01 16:14:45 +00:00
|
|
|
pmd = stage2_get_pmd(kvm, cache, addr);
|
|
|
|
if (!pmd) {
|
|
|
|
/*
|
|
|
|
* Ignore calls from kvm_set_spte_hva for unallocated
|
|
|
|
* address ranges.
|
|
|
|
*/
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
/*
|
|
|
|
* While dirty page logging - dissolve huge PMD, then continue on to
|
|
|
|
* allocate page.
|
|
|
|
*/
|
|
|
|
if (logging_active)
|
|
|
|
stage2_dissolve_pmd(kvm, addr, pmd);
|
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
/* Create stage-2 page mappings - Level 2 */
|
2013-01-20 23:28:07 +00:00
|
|
|
if (pmd_none(*pmd)) {
|
|
|
|
if (!cache)
|
|
|
|
return 0; /* ignore calls from kvm_set_spte_hva */
|
|
|
|
pte = mmu_memory_cache_alloc(cache);
|
2012-10-15 10:27:37 +00:00
|
|
|
kvm_clean_pte(pte);
|
2013-01-20 23:28:07 +00:00
|
|
|
pmd_populate_kernel(NULL, pmd, pte);
|
|
|
|
get_page(virt_to_page(pmd));
|
2012-10-15 10:27:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
2013-01-20 23:28:07 +00:00
|
|
|
|
|
|
|
if (iomap && pte_present(*pte))
|
|
|
|
return -EFAULT;
|
|
|
|
|
|
|
|
/* Create 2nd stage page table mapping - Level 3 */
|
|
|
|
old_pte = *pte;
|
|
|
|
kvm_set_pte(pte, *new_pte);
|
|
|
|
if (pte_present(old_pte))
|
2013-01-28 15:27:00 +00:00
|
|
|
kvm_tlb_flush_vmid_ipa(kvm, addr);
|
2013-01-20 23:28:07 +00:00
|
|
|
else
|
|
|
|
get_page(virt_to_page(pte));
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* kvm_phys_addr_ioremap - map a device range to guest IPA
|
|
|
|
*
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @guest_ipa: The IPA at which to insert the mapping
|
|
|
|
* @pa: The physical address of the device
|
|
|
|
* @size: The size of the mapping
|
|
|
|
*/
|
|
|
|
int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
|
2014-09-17 21:56:18 +00:00
|
|
|
phys_addr_t pa, unsigned long size, bool writable)
|
2013-01-20 23:28:07 +00:00
|
|
|
{
|
|
|
|
phys_addr_t addr, end;
|
|
|
|
int ret = 0;
|
|
|
|
unsigned long pfn;
|
|
|
|
struct kvm_mmu_memory_cache cache = { 0, };
|
|
|
|
|
|
|
|
end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
|
|
|
|
pfn = __phys_to_pfn(pa);
|
|
|
|
|
|
|
|
for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
|
2012-10-15 10:27:37 +00:00
|
|
|
pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
|
2013-01-20 23:28:07 +00:00
|
|
|
|
2014-09-17 21:56:18 +00:00
|
|
|
if (writable)
|
|
|
|
kvm_set_s2pte_writable(&pte);
|
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
|
|
|
|
KVM_NR_MEM_OBJS);
|
2013-01-20 23:28:07 +00:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
2015-01-15 23:58:58 +00:00
|
|
|
ret = stage2_set_pte(kvm, &cache, addr, &pte,
|
|
|
|
KVM_S2PTE_FLAG_IS_IOMAP);
|
2013-01-20 23:28:07 +00:00
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
pfn++;
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
|
|
|
mmu_free_memory_cache(&cache);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-10-02 22:32:01 +00:00
|
|
|
static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap)
|
|
|
|
{
|
|
|
|
pfn_t pfn = *pfnp;
|
|
|
|
gfn_t gfn = *ipap >> PAGE_SHIFT;
|
|
|
|
|
|
|
|
if (PageTransCompound(pfn_to_page(pfn))) {
|
|
|
|
unsigned long mask;
|
|
|
|
/*
|
|
|
|
* The address we faulted on is backed by a transparent huge
|
|
|
|
* page. However, because we map the compound huge page and
|
|
|
|
* not the individual tail page, we need to transfer the
|
|
|
|
* refcount to the head page. We have to be careful that the
|
|
|
|
* THP doesn't start to split while we are adjusting the
|
|
|
|
* refcounts.
|
|
|
|
*
|
|
|
|
* We are sure this doesn't happen, because mmu_notifier_retry
|
|
|
|
* was successful and we are holding the mmu_lock, so if this
|
|
|
|
* THP is trying to split, it will be blocked in the mmu
|
|
|
|
* notifier before touching any of the pages, specifically
|
|
|
|
* before being able to call __split_huge_page_refcount().
|
|
|
|
*
|
|
|
|
* We can therefore safely transfer the refcount from PG_tail
|
|
|
|
* to PG_head and switch the pfn from a tail page to the head
|
|
|
|
* page accordingly.
|
|
|
|
*/
|
|
|
|
mask = PTRS_PER_PMD - 1;
|
|
|
|
VM_BUG_ON((gfn & mask) != (pfn & mask));
|
|
|
|
if (pfn & mask) {
|
|
|
|
*ipap &= PMD_MASK;
|
|
|
|
kvm_release_pfn_clean(pfn);
|
|
|
|
pfn &= ~mask;
|
|
|
|
kvm_get_pfn(pfn);
|
|
|
|
*pfnp = pfn;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2014-09-09 10:27:09 +00:00
|
|
|
static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
if (kvm_vcpu_trap_is_iabt(vcpu))
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return kvm_vcpu_dabt_iswrite(vcpu);
|
|
|
|
}
|
|
|
|
|
2014-11-10 08:33:55 +00:00
|
|
|
static bool kvm_is_device_pfn(unsigned long pfn)
|
|
|
|
{
|
|
|
|
return !pfn_valid(pfn);
|
|
|
|
}
|
|
|
|
|
2015-01-15 23:58:56 +00:00
|
|
|
/**
|
|
|
|
* stage2_wp_ptes - write protect PMD range
|
|
|
|
* @pmd: pointer to pmd entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*/
|
|
|
|
static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, addr);
|
|
|
|
do {
|
|
|
|
if (!pte_none(*pte)) {
|
|
|
|
if (!kvm_s2pte_readonly(pte))
|
|
|
|
kvm_set_s2pte_readonly(pte);
|
|
|
|
}
|
|
|
|
} while (pte++, addr += PAGE_SIZE, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_wp_pmds - write protect PUD range
|
|
|
|
* @pud: pointer to pud entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*/
|
|
|
|
static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
|
|
|
pmd = pmd_offset(pud, addr);
|
|
|
|
|
|
|
|
do {
|
|
|
|
next = kvm_pmd_addr_end(addr, end);
|
|
|
|
if (!pmd_none(*pmd)) {
|
|
|
|
if (kvm_pmd_huge(*pmd)) {
|
|
|
|
if (!kvm_s2pmd_readonly(pmd))
|
|
|
|
kvm_set_s2pmd_readonly(pmd);
|
|
|
|
} else {
|
|
|
|
stage2_wp_ptes(pmd, addr, next);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} while (pmd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_wp_puds - write protect PGD range
|
|
|
|
* @pgd: pointer to pgd entry
|
|
|
|
* @addr: range start address
|
|
|
|
* @end: range end address
|
|
|
|
*
|
|
|
|
* Process PUD entries, for a huge PUD we cause a panic.
|
|
|
|
*/
|
|
|
|
static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pud_t *pud;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
|
|
|
pud = pud_offset(pgd, addr);
|
|
|
|
do {
|
|
|
|
next = kvm_pud_addr_end(addr, end);
|
|
|
|
if (!pud_none(*pud)) {
|
|
|
|
/* TODO:PUD not supported, revisit later if supported */
|
|
|
|
BUG_ON(kvm_pud_huge(*pud));
|
|
|
|
stage2_wp_pmds(pud, addr, next);
|
|
|
|
}
|
|
|
|
} while (pud++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* stage2_wp_range() - write protect stage2 memory region range
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @addr: Start address of range
|
|
|
|
* @end: End address of range
|
|
|
|
*/
|
|
|
|
static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
|
|
|
|
{
|
|
|
|
pgd_t *pgd;
|
|
|
|
phys_addr_t next;
|
|
|
|
|
2015-03-10 19:07:00 +00:00
|
|
|
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
2015-01-15 23:58:56 +00:00
|
|
|
do {
|
|
|
|
/*
|
|
|
|
* Release kvm_mmu_lock periodically if the memory region is
|
|
|
|
* large. Otherwise, we may see kernel panics with
|
2015-01-23 09:49:31 +00:00
|
|
|
* CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
|
|
|
|
* CONFIG_LOCKDEP. Additionally, holding the lock too long
|
2015-01-15 23:58:56 +00:00
|
|
|
* will also starve other vCPUs.
|
|
|
|
*/
|
|
|
|
if (need_resched() || spin_needbreak(&kvm->mmu_lock))
|
|
|
|
cond_resched_lock(&kvm->mmu_lock);
|
|
|
|
|
|
|
|
next = kvm_pgd_addr_end(addr, end);
|
|
|
|
if (pgd_present(*pgd))
|
|
|
|
stage2_wp_puds(pgd, addr, next);
|
|
|
|
} while (pgd++, addr = next, addr != end);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
|
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @slot: The memory slot to write protect
|
|
|
|
*
|
|
|
|
* Called to start logging dirty pages after memory region
|
|
|
|
* KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
|
|
|
|
* all present PMD and PTEs are write protected in the memory region.
|
|
|
|
* Afterwards read of dirty page log can be called.
|
|
|
|
*
|
|
|
|
* Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
|
|
|
|
* serializing operations for VM memory regions.
|
|
|
|
*/
|
|
|
|
void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
|
|
|
|
{
|
2015-05-17 14:20:07 +00:00
|
|
|
struct kvm_memslots *slots = kvm_memslots(kvm);
|
|
|
|
struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
|
2015-01-15 23:58:56 +00:00
|
|
|
phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
|
|
|
|
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
stage2_wp_range(kvm, start, end);
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
kvm_flush_remote_tlbs(kvm);
|
|
|
|
}
|
2015-01-15 23:58:57 +00:00
|
|
|
|
|
|
|
/**
|
2015-01-28 02:54:23 +00:00
|
|
|
* kvm_mmu_write_protect_pt_masked() - write protect dirty pages
|
2015-01-15 23:58:57 +00:00
|
|
|
* @kvm: The KVM pointer
|
|
|
|
* @slot: The memory slot associated with mask
|
|
|
|
* @gfn_offset: The gfn offset in memory slot
|
|
|
|
* @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
|
|
|
|
* slot to be write protected
|
|
|
|
*
|
|
|
|
* Walks bits set in mask write protects the associated pte's. Caller must
|
|
|
|
* acquire kvm_mmu_lock.
|
|
|
|
*/
|
2015-01-28 02:54:23 +00:00
|
|
|
static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
|
2015-01-15 23:58:57 +00:00
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask)
|
|
|
|
{
|
|
|
|
phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
|
|
|
|
phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
|
|
|
|
phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
|
|
|
|
|
|
|
|
stage2_wp_range(kvm, start, end);
|
|
|
|
}
|
2015-01-15 23:58:56 +00:00
|
|
|
|
2015-01-28 02:54:23 +00:00
|
|
|
/*
|
|
|
|
* kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
|
|
|
|
* dirty pages.
|
|
|
|
*
|
|
|
|
* It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
|
|
|
|
* enable dirty logging for them.
|
|
|
|
*/
|
|
|
|
void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *slot,
|
|
|
|
gfn_t gfn_offset, unsigned long mask)
|
|
|
|
{
|
|
|
|
kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
|
|
|
|
}
|
|
|
|
|
arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.
That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.
At that point, the DC/IC instructions can generate a fault, which
we handle with kvm->mmu_lock held. The box quickly deadlocks, user
is unhappy.
Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-05 21:13:24 +00:00
|
|
|
static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
|
|
|
|
unsigned long size, bool uncached)
|
|
|
|
{
|
|
|
|
__coherent_cache_guest_page(vcpu, pfn, size, uncached);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:12 +00:00
|
|
|
static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
|
2014-08-19 10:18:04 +00:00
|
|
|
struct kvm_memory_slot *memslot, unsigned long hva,
|
2013-01-20 23:28:12 +00:00
|
|
|
unsigned long fault_status)
|
|
|
|
{
|
|
|
|
int ret;
|
2013-10-02 22:32:01 +00:00
|
|
|
bool write_fault, writable, hugetlb = false, force_pte = false;
|
2013-01-20 23:28:12 +00:00
|
|
|
unsigned long mmu_seq;
|
2012-11-01 16:14:45 +00:00
|
|
|
gfn_t gfn = fault_ipa >> PAGE_SHIFT;
|
|
|
|
struct kvm *kvm = vcpu->kvm;
|
2013-01-20 23:28:12 +00:00
|
|
|
struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
|
2012-11-01 16:14:45 +00:00
|
|
|
struct vm_area_struct *vma;
|
|
|
|
pfn_t pfn;
|
2014-06-26 00:45:51 +00:00
|
|
|
pgprot_t mem_type = PAGE_S2;
|
2014-11-17 14:58:52 +00:00
|
|
|
bool fault_ipa_uncached;
|
2015-01-15 23:58:58 +00:00
|
|
|
bool logging_active = memslot_is_logging(memslot);
|
|
|
|
unsigned long flags = 0;
|
2013-01-20 23:28:12 +00:00
|
|
|
|
2014-09-09 10:27:09 +00:00
|
|
|
write_fault = kvm_is_write_fault(vcpu);
|
2013-01-20 23:28:12 +00:00
|
|
|
if (fault_status == FSC_PERM && !write_fault) {
|
|
|
|
kvm_err("Unexpected L2 read permission error\n");
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
/* Let's check if we will get back a huge page backed by hugetlbfs */
|
|
|
|
down_read(¤t->mm->mmap_sem);
|
|
|
|
vma = find_vma_intersection(current->mm, hva, hva + 1);
|
2014-09-17 21:56:17 +00:00
|
|
|
if (unlikely(!vma)) {
|
|
|
|
kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
if (is_vm_hugetlb_page(vma) && !logging_active) {
|
2012-11-01 16:14:45 +00:00
|
|
|
hugetlb = true;
|
|
|
|
gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
|
2013-10-02 22:32:01 +00:00
|
|
|
} else {
|
|
|
|
/*
|
2013-12-13 16:56:06 +00:00
|
|
|
* Pages belonging to memslots that don't have the same
|
|
|
|
* alignment for userspace and IPA cannot be mapped using
|
|
|
|
* block descriptors even if the pages belong to a THP for
|
|
|
|
* the process, because the stage-2 block descriptor will
|
|
|
|
* cover more than a single THP and we loose atomicity for
|
|
|
|
* unmapping, updates, and splits of the THP or other pages
|
|
|
|
* in the stage-2 block range.
|
2013-10-02 22:32:01 +00:00
|
|
|
*/
|
2013-12-13 16:56:06 +00:00
|
|
|
if ((memslot->userspace_addr & ~PMD_MASK) !=
|
|
|
|
((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
|
2013-10-02 22:32:01 +00:00
|
|
|
force_pte = true;
|
2012-11-01 16:14:45 +00:00
|
|
|
}
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
|
|
|
2013-01-20 23:28:12 +00:00
|
|
|
/* We need minimum second+third level pages */
|
2014-10-10 10:14:28 +00:00
|
|
|
ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
|
|
|
|
KVM_NR_MEM_OBJS);
|
2013-01-20 23:28:12 +00:00
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
mmu_seq = vcpu->kvm->mmu_notifier_seq;
|
|
|
|
/*
|
|
|
|
* Ensure the read of mmu_notifier_seq happens before we call
|
|
|
|
* gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
|
|
|
|
* the page we just got a reference to gets unmapped before we have a
|
|
|
|
* chance to grab the mmu_lock, which ensure that if the page gets
|
|
|
|
* unmapped afterwards, the call to kvm_unmap_hva will take it away
|
|
|
|
* from us again properly. This smp_rmb() interacts with the smp_wmb()
|
|
|
|
* in kvm_mmu_notifier_invalidate_<page|range_end>.
|
|
|
|
*/
|
|
|
|
smp_rmb();
|
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
|
2013-01-20 23:28:12 +00:00
|
|
|
if (is_error_pfn(pfn))
|
|
|
|
return -EFAULT;
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
if (kvm_is_device_pfn(pfn)) {
|
2014-06-26 00:45:51 +00:00
|
|
|
mem_type = PAGE_S2_DEVICE;
|
2015-01-15 23:58:58 +00:00
|
|
|
flags |= KVM_S2PTE_FLAG_IS_IOMAP;
|
|
|
|
} else if (logging_active) {
|
|
|
|
/*
|
|
|
|
* Faults on pages in a memslot with logging enabled
|
|
|
|
* should not be mapped with huge pages (it introduces churn
|
|
|
|
* and performance degradation), so force a pte mapping.
|
|
|
|
*/
|
|
|
|
force_pte = true;
|
|
|
|
flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Only actually map the page as writable if this was a write
|
|
|
|
* fault.
|
|
|
|
*/
|
|
|
|
if (!write_fault)
|
|
|
|
writable = false;
|
|
|
|
}
|
2014-06-26 00:45:51 +00:00
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
if (mmu_notifier_retry(kvm, mmu_seq))
|
2013-01-20 23:28:12 +00:00
|
|
|
goto out_unlock;
|
2015-01-15 23:58:58 +00:00
|
|
|
|
2013-10-02 22:32:01 +00:00
|
|
|
if (!hugetlb && !force_pte)
|
|
|
|
hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
|
2012-11-01 16:14:45 +00:00
|
|
|
|
2014-11-17 14:58:53 +00:00
|
|
|
fault_ipa_uncached = memslot->flags & KVM_MEMSLOT_INCOHERENT;
|
2014-11-17 14:58:52 +00:00
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
if (hugetlb) {
|
2014-06-26 00:45:51 +00:00
|
|
|
pmd_t new_pmd = pfn_pmd(pfn, mem_type);
|
2012-11-01 16:14:45 +00:00
|
|
|
new_pmd = pmd_mkhuge(new_pmd);
|
|
|
|
if (writable) {
|
|
|
|
kvm_set_s2pmd_writable(&new_pmd);
|
|
|
|
kvm_set_pfn_dirty(pfn);
|
|
|
|
}
|
arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.
That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.
At that point, the DC/IC instructions can generate a fault, which
we handle with kvm->mmu_lock held. The box quickly deadlocks, user
is unhappy.
Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-05 21:13:24 +00:00
|
|
|
coherent_cache_guest_page(vcpu, pfn, PMD_SIZE, fault_ipa_uncached);
|
2012-11-01 16:14:45 +00:00
|
|
|
ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
|
|
|
|
} else {
|
2014-06-26 00:45:51 +00:00
|
|
|
pte_t new_pte = pfn_pte(pfn, mem_type);
|
2015-01-15 23:58:58 +00:00
|
|
|
|
2012-11-01 16:14:45 +00:00
|
|
|
if (writable) {
|
|
|
|
kvm_set_s2pte_writable(&new_pte);
|
|
|
|
kvm_set_pfn_dirty(pfn);
|
2015-01-15 23:58:58 +00:00
|
|
|
mark_page_dirty(kvm, gfn);
|
2012-11-01 16:14:45 +00:00
|
|
|
}
|
arm/arm64: KVM: Use kernel mapping to perform invalidation on page fault
When handling a fault in stage-2, we need to resync I$ and D$, just
to be sure we don't leave any old cache line behind.
That's very good, except that we do so using the *user* address.
Under heavy load (swapping like crazy), we may end up in a situation
where the page gets mapped in stage-2 while being unmapped from
userspace by another CPU.
At that point, the DC/IC instructions can generate a fault, which
we handle with kvm->mmu_lock held. The box quickly deadlocks, user
is unhappy.
Instead, perform this invalidation through the kernel mapping,
which is guaranteed to be present. The box is much happier, and so
am I.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2015-01-05 21:13:24 +00:00
|
|
|
coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE, fault_ipa_uncached);
|
2015-01-15 23:58:58 +00:00
|
|
|
ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
|
2013-01-20 23:28:12 +00:00
|
|
|
}
|
2012-11-01 16:14:45 +00:00
|
|
|
|
2013-01-20 23:28:12 +00:00
|
|
|
out_unlock:
|
2012-11-01 16:14:45 +00:00
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2015-03-12 18:16:51 +00:00
|
|
|
kvm_set_pfn_accessed(pfn);
|
2013-01-20 23:28:12 +00:00
|
|
|
kvm_release_pfn_clean(pfn);
|
2012-11-01 16:14:45 +00:00
|
|
|
return ret;
|
2013-01-20 23:28:12 +00:00
|
|
|
}
|
|
|
|
|
2015-03-12 18:16:52 +00:00
|
|
|
/*
|
|
|
|
* Resolve the access fault by making the page young again.
|
|
|
|
* Note that because the faulting entry is guaranteed not to be
|
|
|
|
* cached in the TLB, we don't need to invalidate anything.
|
|
|
|
*/
|
|
|
|
static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
pfn_t pfn;
|
|
|
|
bool pfn_valid = false;
|
|
|
|
|
|
|
|
trace_kvm_access_fault(fault_ipa);
|
|
|
|
|
|
|
|
spin_lock(&vcpu->kvm->mmu_lock);
|
|
|
|
|
|
|
|
pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
|
|
|
|
if (!pmd || pmd_none(*pmd)) /* Nothing there */
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
|
|
|
|
*pmd = pmd_mkyoung(*pmd);
|
|
|
|
pfn = pmd_pfn(*pmd);
|
|
|
|
pfn_valid = true;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, fault_ipa);
|
|
|
|
if (pte_none(*pte)) /* Nothing there either */
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
*pte = pte_mkyoung(*pte); /* Just a page... */
|
|
|
|
pfn = pte_pfn(*pte);
|
|
|
|
pfn_valid = true;
|
|
|
|
out:
|
|
|
|
spin_unlock(&vcpu->kvm->mmu_lock);
|
|
|
|
if (pfn_valid)
|
|
|
|
kvm_set_pfn_accessed(pfn);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:12 +00:00
|
|
|
/**
|
|
|
|
* kvm_handle_guest_abort - handles all 2nd stage aborts
|
|
|
|
* @vcpu: the VCPU pointer
|
|
|
|
* @run: the kvm_run structure
|
|
|
|
*
|
|
|
|
* Any abort that gets to the host is almost guaranteed to be caused by a
|
|
|
|
* missing second stage translation table entry, which can mean that either the
|
|
|
|
* guest simply needs more memory and we must allocate an appropriate page or it
|
|
|
|
* can mean that the guest tried to access I/O memory, which is emulated by user
|
|
|
|
* space. The distinction is based on the IPA causing the fault and whether this
|
|
|
|
* memory region has been registered as standard RAM by user space.
|
|
|
|
*/
|
2013-01-20 23:28:06 +00:00
|
|
|
int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|
|
|
{
|
2013-01-20 23:28:12 +00:00
|
|
|
unsigned long fault_status;
|
|
|
|
phys_addr_t fault_ipa;
|
|
|
|
struct kvm_memory_slot *memslot;
|
2014-08-19 10:18:04 +00:00
|
|
|
unsigned long hva;
|
|
|
|
bool is_iabt, write_fault, writable;
|
2013-01-20 23:28:12 +00:00
|
|
|
gfn_t gfn;
|
|
|
|
int ret, idx;
|
|
|
|
|
2012-10-15 09:33:38 +00:00
|
|
|
is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
|
2012-09-17 18:27:09 +00:00
|
|
|
fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
|
2013-01-20 23:28:12 +00:00
|
|
|
|
2012-09-17 18:27:09 +00:00
|
|
|
trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
|
|
|
|
kvm_vcpu_get_hfar(vcpu), fault_ipa);
|
2013-01-20 23:28:12 +00:00
|
|
|
|
|
|
|
/* Check the stage-2 fault is trans. fault or write fault */
|
2014-09-26 10:29:34 +00:00
|
|
|
fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
|
2015-03-12 18:16:51 +00:00
|
|
|
if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
|
|
|
|
fault_status != FSC_ACCESS) {
|
2014-09-26 10:29:34 +00:00
|
|
|
kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
|
|
|
|
kvm_vcpu_trap_get_class(vcpu),
|
|
|
|
(unsigned long)kvm_vcpu_trap_get_fault(vcpu),
|
|
|
|
(unsigned long)kvm_vcpu_get_hsr(vcpu));
|
2013-01-20 23:28:12 +00:00
|
|
|
return -EFAULT;
|
|
|
|
}
|
|
|
|
|
|
|
|
idx = srcu_read_lock(&vcpu->kvm->srcu);
|
|
|
|
|
|
|
|
gfn = fault_ipa >> PAGE_SHIFT;
|
2014-08-19 10:18:04 +00:00
|
|
|
memslot = gfn_to_memslot(vcpu->kvm, gfn);
|
|
|
|
hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
|
2014-09-09 10:27:09 +00:00
|
|
|
write_fault = kvm_is_write_fault(vcpu);
|
2014-08-19 10:18:04 +00:00
|
|
|
if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
|
2013-01-20 23:28:12 +00:00
|
|
|
if (is_iabt) {
|
|
|
|
/* Prefetch Abort on I/O address */
|
2012-09-17 18:27:09 +00:00
|
|
|
kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
|
2013-01-20 23:28:12 +00:00
|
|
|
ret = 1;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2012-12-12 14:42:09 +00:00
|
|
|
/*
|
|
|
|
* The IPA is reported as [MAX:12], so we need to
|
|
|
|
* complement it with the bottom 12 bits from the
|
|
|
|
* faulting VA. This is always 12 bits, irrespective
|
|
|
|
* of the page size.
|
|
|
|
*/
|
|
|
|
fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
|
2013-01-20 23:43:58 +00:00
|
|
|
ret = io_mem_abort(vcpu, run, fault_ipa);
|
2013-01-20 23:28:12 +00:00
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2014-10-10 10:14:29 +00:00
|
|
|
/* Userspace should not be able to register out-of-bounds IPAs */
|
|
|
|
VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
|
|
|
|
|
2015-03-12 18:16:52 +00:00
|
|
|
if (fault_status == FSC_ACCESS) {
|
|
|
|
handle_access_fault(vcpu, fault_ipa);
|
|
|
|
ret = 1;
|
|
|
|
goto out_unlock;
|
|
|
|
}
|
|
|
|
|
2014-08-19 10:18:04 +00:00
|
|
|
ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
|
2013-01-20 23:28:12 +00:00
|
|
|
if (ret == 0)
|
|
|
|
ret = 1;
|
|
|
|
out_unlock:
|
|
|
|
srcu_read_unlock(&vcpu->kvm->srcu, idx);
|
|
|
|
return ret;
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
2015-03-12 18:16:50 +00:00
|
|
|
static int handle_hva_to_gpa(struct kvm *kvm,
|
|
|
|
unsigned long start,
|
|
|
|
unsigned long end,
|
|
|
|
int (*handler)(struct kvm *kvm,
|
|
|
|
gpa_t gpa, void *data),
|
|
|
|
void *data)
|
2013-01-20 23:28:07 +00:00
|
|
|
{
|
|
|
|
struct kvm_memslots *slots;
|
|
|
|
struct kvm_memory_slot *memslot;
|
2015-03-12 18:16:50 +00:00
|
|
|
int ret = 0;
|
2013-01-20 23:28:07 +00:00
|
|
|
|
|
|
|
slots = kvm_memslots(kvm);
|
|
|
|
|
|
|
|
/* we only care about the pages that the guest sees */
|
|
|
|
kvm_for_each_memslot(memslot, slots) {
|
|
|
|
unsigned long hva_start, hva_end;
|
|
|
|
gfn_t gfn, gfn_end;
|
|
|
|
|
|
|
|
hva_start = max(start, memslot->userspace_addr);
|
|
|
|
hva_end = min(end, memslot->userspace_addr +
|
|
|
|
(memslot->npages << PAGE_SHIFT));
|
|
|
|
if (hva_start >= hva_end)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* {gfn(page) | page intersects with [hva_start, hva_end)} =
|
|
|
|
* {gfn_start, gfn_start+1, ..., gfn_end-1}.
|
|
|
|
*/
|
|
|
|
gfn = hva_to_gfn_memslot(hva_start, memslot);
|
|
|
|
gfn_end = hva_to_gfn_memslot(hva_end + PAGE_SIZE - 1, memslot);
|
|
|
|
|
|
|
|
for (; gfn < gfn_end; ++gfn) {
|
|
|
|
gpa_t gpa = gfn << PAGE_SHIFT;
|
2015-03-12 18:16:50 +00:00
|
|
|
ret |= handler(kvm, gpa, data);
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
}
|
2015-03-12 18:16:50 +00:00
|
|
|
|
|
|
|
return ret;
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
|
2015-03-12 18:16:50 +00:00
|
|
|
static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
|
2013-01-20 23:28:07 +00:00
|
|
|
{
|
|
|
|
unmap_stage2_range(kvm, gpa, PAGE_SIZE);
|
2015-03-12 18:16:50 +00:00
|
|
|
return 0;
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
|
|
|
unsigned long end = hva + PAGE_SIZE;
|
|
|
|
|
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
trace_kvm_unmap_hva(hva);
|
|
|
|
handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm,
|
|
|
|
unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
trace_kvm_unmap_hva_range(start, end);
|
|
|
|
handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-03-12 18:16:50 +00:00
|
|
|
static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, void *data)
|
2013-01-20 23:28:07 +00:00
|
|
|
{
|
|
|
|
pte_t *pte = (pte_t *)data;
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
/*
|
|
|
|
* We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
|
|
|
|
* flag clear because MMU notifiers will have unmapped a huge PMD before
|
|
|
|
* calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
|
|
|
|
* therefore stage2_set_pte() never needs to clear out a huge PMD
|
|
|
|
* through this calling path.
|
|
|
|
*/
|
|
|
|
stage2_set_pte(kvm, NULL, gpa, pte, 0);
|
2015-03-12 18:16:50 +00:00
|
|
|
return 0;
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
|
|
{
|
|
|
|
unsigned long end = hva + PAGE_SIZE;
|
|
|
|
pte_t stage2_pte;
|
|
|
|
|
|
|
|
if (!kvm->arch.pgd)
|
|
|
|
return;
|
|
|
|
|
|
|
|
trace_kvm_set_spte_hva(hva);
|
|
|
|
stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
|
|
|
|
handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
|
|
|
|
}
|
|
|
|
|
2015-03-12 18:16:51 +00:00
|
|
|
static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pmd = stage2_get_pmd(kvm, NULL, gpa);
|
|
|
|
if (!pmd || pmd_none(*pmd)) /* Nothing there */
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (kvm_pmd_huge(*pmd)) { /* THP, HugeTLB */
|
|
|
|
if (pmd_young(*pmd)) {
|
|
|
|
*pmd = pmd_mkold(*pmd);
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, gpa);
|
|
|
|
if (pte_none(*pte))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (pte_young(*pte)) {
|
|
|
|
*pte = pte_mkold(*pte); /* Just a page... */
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, void *data)
|
|
|
|
{
|
|
|
|
pmd_t *pmd;
|
|
|
|
pte_t *pte;
|
|
|
|
|
|
|
|
pmd = stage2_get_pmd(kvm, NULL, gpa);
|
|
|
|
if (!pmd || pmd_none(*pmd)) /* Nothing there */
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (kvm_pmd_huge(*pmd)) /* THP, HugeTLB */
|
|
|
|
return pmd_young(*pmd);
|
|
|
|
|
|
|
|
pte = pte_offset_kernel(pmd, gpa);
|
|
|
|
if (!pte_none(*pte)) /* Just a page... */
|
|
|
|
return pte_young(*pte);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
|
|
{
|
|
|
|
trace_kvm_age_hva(start, end);
|
|
|
|
return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
|
|
{
|
|
|
|
trace_kvm_test_age_hva(hva);
|
|
|
|
return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:07 +00:00
|
|
|
void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
|
|
|
|
{
|
|
|
|
mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:06 +00:00
|
|
|
phys_addr_t kvm_mmu_get_httbr(void)
|
|
|
|
{
|
2015-03-19 16:42:28 +00:00
|
|
|
if (__kvm_cpu_uses_extended_idmap())
|
|
|
|
return virt_to_phys(merged_hyp_pgd);
|
|
|
|
else
|
|
|
|
return virt_to_phys(hyp_pgd);
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
|
|
|
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
phys_addr_t kvm_mmu_get_boot_httbr(void)
|
|
|
|
{
|
2015-03-19 16:42:28 +00:00
|
|
|
if (__kvm_cpu_uses_extended_idmap())
|
|
|
|
return virt_to_phys(merged_hyp_pgd);
|
|
|
|
else
|
|
|
|
return virt_to_phys(boot_hyp_pgd);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
phys_addr_t kvm_get_idmap_vector(void)
|
|
|
|
{
|
|
|
|
return hyp_idmap_vector;
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:06 +00:00
|
|
|
int kvm_mmu_init(void)
|
|
|
|
{
|
2013-04-12 18:12:03 +00:00
|
|
|
int err;
|
|
|
|
|
2013-11-19 19:59:12 +00:00
|
|
|
hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
|
|
|
|
hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
|
|
|
|
hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
|
ARM, arm64: kvm: get rid of the bounce page
The HYP init bounce page is a runtime construct that ensures that the
HYP init code does not cross a page boundary. However, this is something
we can do perfectly well at build time, by aligning the code appropriately.
For arm64, we just align to 4 KB, and enforce that the code size is less
than 4 KB, regardless of the chosen page size.
For ARM, the whole code is less than 256 bytes, so we tweak the linker
script to align at a power of 2 upper bound of the code size
Note that this also fixes a benign off-by-one error in the original bounce
page code, where a bounce page would be allocated unnecessarily if the code
was exactly 1 page in size.
On ARM, it also fixes an issue with very large kernels reported by Arnd
Bergmann, where stub sections with linker emitted veneers could erroneously
trigger the size/alignment ASSERT() in the linker script.
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2015-03-19 16:42:26 +00:00
|
|
|
/*
|
|
|
|
* We rely on the linker script to ensure at build time that the HYP
|
|
|
|
* init code does not cross a page boundary.
|
|
|
|
*/
|
|
|
|
BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
|
2014-10-10 10:14:28 +00:00
|
|
|
hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
|
|
|
|
boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
|
2014-03-28 14:25:19 +00:00
|
|
|
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
if (!hyp_pgd || !boot_hyp_pgd) {
|
2013-01-20 23:28:07 +00:00
|
|
|
kvm_err("Hyp mode PGD not allocated\n");
|
2013-04-12 18:12:03 +00:00
|
|
|
err = -ENOMEM;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Create the idmap in the boot page tables */
|
|
|
|
err = __create_hyp_mappings(boot_hyp_pgd,
|
|
|
|
hyp_idmap_start, hyp_idmap_end,
|
|
|
|
__phys_to_pfn(hyp_idmap_start),
|
|
|
|
PAGE_HYP);
|
|
|
|
|
|
|
|
if (err) {
|
|
|
|
kvm_err("Failed to idmap %lx-%lx\n",
|
|
|
|
hyp_idmap_start, hyp_idmap_end);
|
|
|
|
goto out;
|
2013-01-20 23:28:07 +00:00
|
|
|
}
|
|
|
|
|
2015-03-19 16:42:28 +00:00
|
|
|
if (__kvm_cpu_uses_extended_idmap()) {
|
|
|
|
merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
|
|
|
|
if (!merged_hyp_pgd) {
|
|
|
|
kvm_err("Failed to allocate extra HYP pgd\n");
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
__kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
|
|
|
|
hyp_idmap_start);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
ARM: KVM: switch to a dual-step HYP init code
Our HYP init code suffers from two major design issues:
- it cannot support CPU hotplug, as we tear down the idmap very early
- it cannot perform a TLB invalidation when switching from init to
runtime mappings, as pages are manipulated from PL1 exclusively
The hotplug problem mandates that we keep two sets of page tables
(boot and runtime). The TLB problem mandates that we're able to
transition from one PGD to another while in HYP, invalidating the TLBs
in the process.
To be able to do this, we need to share a page between the two page
tables. A page that will have the same VA in both configurations. All we
need is a VA that has the following properties:
- This VA can't be used to represent a kernel mapping.
- This VA will not conflict with the physical address of the kernel text
The vectors page seems to satisfy this requirement:
- The kernel never maps anything else there
- The kernel text being copied at the beginning of the physical memory,
it is unlikely to use the last 64kB (I doubt we'll ever support KVM
on a system with something like 4MB of RAM, but patches are very
welcome).
Let's call this VA the trampoline VA.
Now, we map our init page at 3 locations:
- idmap in the boot pgd
- trampoline VA in the boot pgd
- trampoline VA in the runtime pgd
The init scenario is now the following:
- We jump in HYP with four parameters: boot HYP pgd, runtime HYP pgd,
runtime stack, runtime vectors
- Enable the MMU with the boot pgd
- Jump to a target into the trampoline page (remember, this is the same
physical page!)
- Now switch to the runtime pgd (same VA, and still the same physical
page!)
- Invalidate TLBs
- Set stack and vectors
- Profit! (or eret, if you only care about the code).
Note that we keep the boot mapping permanently (it is not strictly an
idmap anymore) to allow for CPU hotplug in later patches.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <cdall@cs.columbia.edu>
2013-04-12 18:12:06 +00:00
|
|
|
/* Map the very same page at the trampoline VA */
|
|
|
|
err = __create_hyp_mappings(boot_hyp_pgd,
|
|
|
|
TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
|
|
|
|
__phys_to_pfn(hyp_idmap_start),
|
|
|
|
PAGE_HYP);
|
|
|
|
if (err) {
|
|
|
|
kvm_err("Failed to map trampoline @%lx into boot HYP pgd\n",
|
|
|
|
TRAMPOLINE_VA);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Map the same page again into the runtime page tables */
|
|
|
|
err = __create_hyp_mappings(hyp_pgd,
|
|
|
|
TRAMPOLINE_VA, TRAMPOLINE_VA + PAGE_SIZE,
|
|
|
|
__phys_to_pfn(hyp_idmap_start),
|
|
|
|
PAGE_HYP);
|
|
|
|
if (err) {
|
|
|
|
kvm_err("Failed to map trampoline @%lx into runtime HYP pgd\n",
|
|
|
|
TRAMPOLINE_VA);
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2013-01-20 23:28:07 +00:00
|
|
|
return 0;
|
2013-04-12 18:12:03 +00:00
|
|
|
out:
|
2013-04-12 18:12:05 +00:00
|
|
|
free_hyp_pgds();
|
2013-04-12 18:12:03 +00:00
|
|
|
return err;
|
2013-01-20 23:28:06 +00:00
|
|
|
}
|
2014-06-06 09:10:23 +00:00
|
|
|
|
|
|
|
void kvm_arch_commit_memory_region(struct kvm *kvm,
|
2015-05-18 11:59:39 +00:00
|
|
|
const struct kvm_userspace_memory_region *mem,
|
2014-06-06 09:10:23 +00:00
|
|
|
const struct kvm_memory_slot *old,
|
2015-05-18 11:20:23 +00:00
|
|
|
const struct kvm_memory_slot *new,
|
2014-06-06 09:10:23 +00:00
|
|
|
enum kvm_mr_change change)
|
|
|
|
{
|
2015-01-15 23:58:56 +00:00
|
|
|
/*
|
|
|
|
* At this point memslot has been committed and there is an
|
|
|
|
* allocated dirty_bitmap[], dirty pages will be be tracked while the
|
|
|
|
* memory slot is write protected.
|
|
|
|
*/
|
|
|
|
if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
|
|
|
|
kvm_mmu_wp_memory_region(kvm, mem->slot);
|
2014-06-06 09:10:23 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_prepare_memory_region(struct kvm *kvm,
|
|
|
|
struct kvm_memory_slot *memslot,
|
2015-05-18 11:59:39 +00:00
|
|
|
const struct kvm_userspace_memory_region *mem,
|
2014-06-06 09:10:23 +00:00
|
|
|
enum kvm_mr_change change)
|
|
|
|
{
|
2014-10-10 15:00:32 +00:00
|
|
|
hva_t hva = mem->userspace_addr;
|
|
|
|
hva_t reg_end = hva + mem->memory_size;
|
|
|
|
bool writable = !(mem->flags & KVM_MEM_READONLY);
|
|
|
|
int ret = 0;
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
|
|
|
|
change != KVM_MR_FLAGS_ONLY)
|
2014-10-10 15:00:32 +00:00
|
|
|
return 0;
|
|
|
|
|
2014-10-10 10:14:29 +00:00
|
|
|
/*
|
|
|
|
* Prevent userspace from creating a memory region outside of the IPA
|
|
|
|
* space addressable by the KVM guest IPA space.
|
|
|
|
*/
|
|
|
|
if (memslot->base_gfn + memslot->npages >=
|
|
|
|
(KVM_PHYS_SIZE >> PAGE_SHIFT))
|
|
|
|
return -EFAULT;
|
|
|
|
|
2014-10-10 15:00:32 +00:00
|
|
|
/*
|
|
|
|
* A memory region could potentially cover multiple VMAs, and any holes
|
|
|
|
* between them, so iterate over all of them to find out if we can map
|
|
|
|
* any of them right now.
|
|
|
|
*
|
|
|
|
* +--------------------------------------------+
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | : VMA 1 | VMA 2 | | VMA 3 : |
|
|
|
|
* +---------------+----------------+ +----------------+
|
|
|
|
* | memory region |
|
|
|
|
* +--------------------------------------------+
|
|
|
|
*/
|
|
|
|
do {
|
|
|
|
struct vm_area_struct *vma = find_vma(current->mm, hva);
|
|
|
|
hva_t vm_start, vm_end;
|
|
|
|
|
|
|
|
if (!vma || vma->vm_start >= reg_end)
|
|
|
|
break;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Mapping a read-only VMA is only allowed if the
|
|
|
|
* memory region is configured as read-only.
|
|
|
|
*/
|
|
|
|
if (writable && !(vma->vm_flags & VM_WRITE)) {
|
|
|
|
ret = -EPERM;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Take the intersection of this VMA with the memory region
|
|
|
|
*/
|
|
|
|
vm_start = max(hva, vma->vm_start);
|
|
|
|
vm_end = min(reg_end, vma->vm_end);
|
|
|
|
|
|
|
|
if (vma->vm_flags & VM_PFNMAP) {
|
|
|
|
gpa_t gpa = mem->guest_phys_addr +
|
|
|
|
(vm_start - mem->userspace_addr);
|
2015-09-16 10:04:55 +00:00
|
|
|
phys_addr_t pa;
|
|
|
|
|
|
|
|
pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
|
|
|
|
pa += vm_start - vma->vm_start;
|
2014-10-10 15:00:32 +00:00
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
/* IO region dirty page logging not allowed */
|
|
|
|
if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2014-10-10 15:00:32 +00:00
|
|
|
ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
|
|
|
|
vm_end - vm_start,
|
|
|
|
writable);
|
|
|
|
if (ret)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
hva = vm_end;
|
|
|
|
} while (hva < reg_end);
|
|
|
|
|
2015-01-15 23:58:58 +00:00
|
|
|
if (change == KVM_MR_FLAGS_ONLY)
|
|
|
|
return ret;
|
|
|
|
|
2014-11-17 14:58:53 +00:00
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
|
|
if (ret)
|
2014-10-10 15:00:32 +00:00
|
|
|
unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
|
2014-11-17 14:58:53 +00:00
|
|
|
else
|
|
|
|
stage2_flush_memslot(kvm, memslot);
|
|
|
|
spin_unlock(&kvm->mmu_lock);
|
2014-10-10 15:00:32 +00:00
|
|
|
return ret;
|
2014-06-06 09:10:23 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
|
|
|
|
struct kvm_memory_slot *dont)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
|
|
|
|
unsigned long npages)
|
|
|
|
{
|
2014-11-17 14:58:53 +00:00
|
|
|
/*
|
|
|
|
* Readonly memslots are not incoherent with the caches by definition,
|
|
|
|
* but in practice, they are used mostly to emulate ROMs or NOR flashes
|
|
|
|
* that the guest may consider devices and hence map as uncached.
|
|
|
|
* To prevent incoherency issues in these cases, tag all readonly
|
|
|
|
* regions as incoherent.
|
|
|
|
*/
|
|
|
|
if (slot->flags & KVM_MEM_READONLY)
|
|
|
|
slot->flags |= KVM_MEMSLOT_INCOHERENT;
|
2014-06-06 09:10:23 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-17 19:26:08 +00:00
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void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
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2014-06-06 09:10:23 +00:00
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{
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}
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void kvm_arch_flush_shadow_all(struct kvm *kvm)
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{
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}
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void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
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struct kvm_memory_slot *slot)
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{
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2014-10-10 15:00:32 +00:00
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gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
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phys_addr_t size = slot->npages << PAGE_SHIFT;
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spin_lock(&kvm->mmu_lock);
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unmap_stage2_range(kvm, gpa, size);
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spin_unlock(&kvm->mmu_lock);
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2014-06-06 09:10:23 +00:00
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}
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2014-12-19 16:05:31 +00:00
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/*
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* See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
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*
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* Main problems:
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* - S/W ops are local to a CPU (not broadcast)
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* - We have line migration behind our back (speculation)
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* - System caches don't support S/W at all (damn!)
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*
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* In the face of the above, the best we can do is to try and convert
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* S/W ops to VA ops. Because the guest is not allowed to infer the
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* S/W to PA mapping, it can only use S/W to nuke the whole cache,
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* which is a rather good thing for us.
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*
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* Also, it is only used when turning caches on/off ("The expected
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* usage of the cache maintenance instructions that operate by set/way
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* is associated with the cache maintenance instructions associated
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* with the powerdown and powerup of caches, if this is required by
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* the implementation.").
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*
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* We use the following policy:
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*
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* - If we trap a S/W operation, we enable VM trapping to detect
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* caches being turned on/off, and do a full clean.
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*
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* - We flush the caches on both caches being turned on and off.
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*
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* - Once the caches are enabled, we stop trapping VM ops.
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*/
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void kvm_set_way_flush(struct kvm_vcpu *vcpu)
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{
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unsigned long hcr = vcpu_get_hcr(vcpu);
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/*
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* If this is the first time we do a S/W operation
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* (i.e. HCR_TVM not set) flush the whole memory, and set the
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* VM trapping.
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*
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* Otherwise, rely on the VM trapping to wait for the MMU +
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* Caches to be turned off. At that point, we'll be able to
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* clean the caches again.
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*/
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if (!(hcr & HCR_TVM)) {
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trace_kvm_set_way_flush(*vcpu_pc(vcpu),
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vcpu_has_cache_enabled(vcpu));
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stage2_flush_vm(vcpu->kvm);
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vcpu_set_hcr(vcpu, hcr | HCR_TVM);
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}
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}
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void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
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{
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bool now_enabled = vcpu_has_cache_enabled(vcpu);
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/*
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* If switching the MMU+caches on, need to invalidate the caches.
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* If switching it off, need to clean the caches.
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* Clean + invalidate does the trick always.
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*/
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if (now_enabled != was_enabled)
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stage2_flush_vm(vcpu->kvm);
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/* Caches are now on, stop trapping VM ops (until a S/W op) */
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if (now_enabled)
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vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
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trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
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}
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