License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 14:07:57 +00:00
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// SPDX-License-Identifier: GPL-2.0
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2015-06-06 20:30:40 +00:00
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#include <linux/kernel.h>
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#include <linux/init.h>
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2015-07-31 12:48:57 +00:00
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#include <linux/gpio/driver.h>
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#include <linux/of_gpio.h>
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#include <linux/io.h>
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#include <linux/interrupt.h>
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2015-06-06 20:30:40 +00:00
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#include <linux/platform_device.h>
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#define ETRAX_FS_rw_pa_dout 0
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#define ETRAX_FS_r_pa_din 4
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#define ETRAX_FS_rw_pa_oe 8
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#define ETRAX_FS_rw_intr_cfg 12
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#define ETRAX_FS_rw_intr_mask 16
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#define ETRAX_FS_rw_ack_intr 20
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#define ETRAX_FS_r_intr 24
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#define ETRAX_FS_r_masked_intr 28
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2015-06-06 20:30:40 +00:00
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#define ETRAX_FS_rw_pb_dout 32
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#define ETRAX_FS_r_pb_din 36
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#define ETRAX_FS_rw_pb_oe 40
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#define ETRAX_FS_rw_pc_dout 48
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#define ETRAX_FS_r_pc_din 52
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#define ETRAX_FS_rw_pc_oe 56
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#define ETRAX_FS_rw_pd_dout 64
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#define ETRAX_FS_r_pd_din 68
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#define ETRAX_FS_rw_pd_oe 72
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#define ETRAX_FS_rw_pe_dout 80
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#define ETRAX_FS_r_pe_din 84
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#define ETRAX_FS_rw_pe_oe 88
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2015-07-22 13:05:19 +00:00
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#define ARTPEC3_r_pa_din 0
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#define ARTPEC3_rw_pa_dout 4
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#define ARTPEC3_rw_pa_oe 8
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#define ARTPEC3_r_pb_din 44
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#define ARTPEC3_rw_pb_dout 48
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#define ARTPEC3_rw_pb_oe 52
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#define ARTPEC3_r_pc_din 88
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#define ARTPEC3_rw_pc_dout 92
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#define ARTPEC3_rw_pc_oe 96
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#define ARTPEC3_r_pd_din 116
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2015-07-31 12:48:57 +00:00
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#define ARTPEC3_rw_intr_cfg 120
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#define ARTPEC3_rw_intr_pins 124
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#define ARTPEC3_rw_intr_mask 128
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#define ARTPEC3_rw_ack_intr 132
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#define ARTPEC3_r_masked_intr 140
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#define GIO_CFG_OFF 0
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#define GIO_CFG_HI 1
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#define GIO_CFG_LO 2
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#define GIO_CFG_SET 3
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#define GIO_CFG_POSEDGE 5
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#define GIO_CFG_NEGEDGE 6
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#define GIO_CFG_ANYEDGE 7
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struct etraxfs_gpio_info;
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struct etraxfs_gpio_block {
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2017-03-09 16:21:55 +00:00
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raw_spinlock_t lock;
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2015-07-31 12:48:57 +00:00
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u32 mask;
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u32 cfg;
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u32 pins;
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unsigned int group[8];
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void __iomem *regs;
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const struct etraxfs_gpio_info *info;
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};
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struct etraxfs_gpio_chip {
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2015-12-04 13:02:58 +00:00
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struct gpio_chip gc;
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2015-07-31 12:48:57 +00:00
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struct etraxfs_gpio_block *block;
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};
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2015-07-22 13:05:19 +00:00
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2015-06-06 20:30:40 +00:00
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struct etraxfs_gpio_port {
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const char *label;
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unsigned int oe;
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unsigned int dout;
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unsigned int din;
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unsigned int ngpio;
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};
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struct etraxfs_gpio_info {
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unsigned int num_ports;
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const struct etraxfs_gpio_port *ports;
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2015-07-31 12:48:57 +00:00
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unsigned int rw_ack_intr;
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unsigned int rw_intr_mask;
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unsigned int rw_intr_cfg;
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unsigned int rw_intr_pins;
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unsigned int r_masked_intr;
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2015-06-06 20:30:40 +00:00
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};
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static const struct etraxfs_gpio_port etraxfs_gpio_etraxfs_ports[] = {
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{
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.label = "A",
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.ngpio = 8,
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.oe = ETRAX_FS_rw_pa_oe,
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.dout = ETRAX_FS_rw_pa_dout,
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.din = ETRAX_FS_r_pa_din,
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},
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{
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.label = "B",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pb_oe,
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.dout = ETRAX_FS_rw_pb_dout,
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.din = ETRAX_FS_r_pb_din,
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},
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{
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.label = "C",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pc_oe,
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.dout = ETRAX_FS_rw_pc_dout,
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.din = ETRAX_FS_r_pc_din,
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},
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{
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.label = "D",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pd_oe,
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.dout = ETRAX_FS_rw_pd_dout,
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.din = ETRAX_FS_r_pd_din,
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},
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{
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.label = "E",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pe_oe,
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.dout = ETRAX_FS_rw_pe_dout,
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.din = ETRAX_FS_r_pe_din,
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},
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};
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static const struct etraxfs_gpio_info etraxfs_gpio_etraxfs = {
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.num_ports = ARRAY_SIZE(etraxfs_gpio_etraxfs_ports),
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.ports = etraxfs_gpio_etraxfs_ports,
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2015-07-31 12:48:57 +00:00
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.rw_ack_intr = ETRAX_FS_rw_ack_intr,
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.rw_intr_mask = ETRAX_FS_rw_intr_mask,
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.rw_intr_cfg = ETRAX_FS_rw_intr_cfg,
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.r_masked_intr = ETRAX_FS_r_masked_intr,
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2015-06-06 20:30:40 +00:00
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};
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2015-07-22 13:05:19 +00:00
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static const struct etraxfs_gpio_port etraxfs_gpio_artpec3_ports[] = {
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{
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.label = "A",
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.ngpio = 32,
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.oe = ARTPEC3_rw_pa_oe,
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.dout = ARTPEC3_rw_pa_dout,
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.din = ARTPEC3_r_pa_din,
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},
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{
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.label = "B",
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.ngpio = 32,
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.oe = ARTPEC3_rw_pb_oe,
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.dout = ARTPEC3_rw_pb_dout,
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.din = ARTPEC3_r_pb_din,
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},
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{
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.label = "C",
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.ngpio = 16,
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.oe = ARTPEC3_rw_pc_oe,
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.dout = ARTPEC3_rw_pc_dout,
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.din = ARTPEC3_r_pc_din,
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},
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{
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.label = "D",
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.ngpio = 32,
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.din = ARTPEC3_r_pd_din,
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},
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};
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static const struct etraxfs_gpio_info etraxfs_gpio_artpec3 = {
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.num_ports = ARRAY_SIZE(etraxfs_gpio_artpec3_ports),
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.ports = etraxfs_gpio_artpec3_ports,
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2015-07-31 12:48:57 +00:00
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.rw_ack_intr = ARTPEC3_rw_ack_intr,
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.rw_intr_mask = ARTPEC3_rw_intr_mask,
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.rw_intr_cfg = ARTPEC3_rw_intr_cfg,
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.r_masked_intr = ARTPEC3_r_masked_intr,
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.rw_intr_pins = ARTPEC3_rw_intr_pins,
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2015-07-22 13:05:19 +00:00
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};
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2015-07-31 12:48:57 +00:00
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static unsigned int etraxfs_gpio_chip_to_port(struct gpio_chip *gc)
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{
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return gc->label[0] - 'A';
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}
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2015-06-06 20:30:40 +00:00
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static int etraxfs_gpio_of_xlate(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec,
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u32 *flags)
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{
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/*
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* Port numbers are A to E, and the properties are integers, so we
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* specify them as 0xA - 0xE.
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*/
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2015-07-31 12:48:57 +00:00
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if (etraxfs_gpio_chip_to_port(gc) + 0xA != gpiospec->args[2])
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2015-06-06 20:30:40 +00:00
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return -EINVAL;
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return of_gpio_simple_xlate(gc, gpiospec, flags);
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}
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static const struct of_device_id etraxfs_gpio_of_table[] = {
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{
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.compatible = "axis,etraxfs-gio",
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.data = &etraxfs_gpio_etraxfs,
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},
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{
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.compatible = "axis,artpec3-gio",
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.data = &etraxfs_gpio_artpec3,
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},
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2015-06-06 20:30:40 +00:00
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{},
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};
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2015-07-31 12:48:57 +00:00
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static unsigned int etraxfs_gpio_to_group_irq(unsigned int gpio)
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{
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return gpio % 8;
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}
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static unsigned int etraxfs_gpio_to_group_pin(struct etraxfs_gpio_chip *chip,
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unsigned int gpio)
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{
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2015-12-04 13:02:58 +00:00
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return 4 * etraxfs_gpio_chip_to_port(&chip->gc) + gpio / 8;
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2015-07-31 12:48:57 +00:00
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}
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static void etraxfs_gpio_irq_ack(struct irq_data *d)
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{
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2015-08-25 08:40:23 +00:00
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struct etraxfs_gpio_chip *chip =
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2015-12-04 13:02:58 +00:00
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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2015-07-31 12:48:57 +00:00
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struct etraxfs_gpio_block *block = chip->block;
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unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
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writel(BIT(grpirq), block->regs + block->info->rw_ack_intr);
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}
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static void etraxfs_gpio_irq_mask(struct irq_data *d)
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{
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2015-08-25 08:40:23 +00:00
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struct etraxfs_gpio_chip *chip =
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2015-12-04 13:02:58 +00:00
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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2015-07-31 12:48:57 +00:00
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struct etraxfs_gpio_block *block = chip->block;
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unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
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2017-03-09 16:21:55 +00:00
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raw_spin_lock(&block->lock);
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2015-07-31 12:48:57 +00:00
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block->mask &= ~BIT(grpirq);
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writel(block->mask, block->regs + block->info->rw_intr_mask);
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2017-03-09 16:21:55 +00:00
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raw_spin_unlock(&block->lock);
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2015-07-31 12:48:57 +00:00
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}
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static void etraxfs_gpio_irq_unmask(struct irq_data *d)
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{
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2015-08-25 08:40:23 +00:00
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struct etraxfs_gpio_chip *chip =
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2015-12-04 13:02:58 +00:00
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gpiochip_get_data(irq_data_get_irq_chip_data(d));
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2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_block *block = chip->block;
|
|
|
|
unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
|
|
|
|
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_lock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
block->mask |= BIT(grpirq);
|
|
|
|
writel(block->mask, block->regs + block->info->rw_intr_mask);
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_unlock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int etraxfs_gpio_irq_set_type(struct irq_data *d, u32 type)
|
|
|
|
{
|
2015-08-25 08:40:23 +00:00
|
|
|
struct etraxfs_gpio_chip *chip =
|
2015-12-04 13:02:58 +00:00
|
|
|
gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_block *block = chip->block;
|
|
|
|
unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
|
|
|
|
u32 cfg;
|
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case IRQ_TYPE_EDGE_RISING:
|
|
|
|
cfg = GIO_CFG_POSEDGE;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_EDGE_FALLING:
|
|
|
|
cfg = GIO_CFG_NEGEDGE;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_EDGE_BOTH:
|
|
|
|
cfg = GIO_CFG_ANYEDGE;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_LEVEL_LOW:
|
|
|
|
cfg = GIO_CFG_LO;
|
|
|
|
break;
|
|
|
|
case IRQ_TYPE_LEVEL_HIGH:
|
|
|
|
cfg = GIO_CFG_HI;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_lock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
block->cfg &= ~(0x7 << (grpirq * 3));
|
|
|
|
block->cfg |= (cfg << (grpirq * 3));
|
|
|
|
writel(block->cfg, block->regs + block->info->rw_intr_cfg);
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_unlock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int etraxfs_gpio_irq_request_resources(struct irq_data *d)
|
|
|
|
{
|
2015-08-25 08:40:23 +00:00
|
|
|
struct etraxfs_gpio_chip *chip =
|
2015-12-04 13:02:58 +00:00
|
|
|
gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_block *block = chip->block;
|
|
|
|
unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
|
2015-08-31 06:56:04 +00:00
|
|
|
int ret = -EBUSY;
|
2015-07-31 12:48:57 +00:00
|
|
|
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_lock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
if (block->group[grpirq])
|
|
|
|
goto out;
|
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
ret = gpiochip_lock_as_irq(&chip->gc, d->hwirq);
|
2015-07-31 12:48:57 +00:00
|
|
|
if (ret)
|
|
|
|
goto out;
|
|
|
|
|
|
|
|
block->group[grpirq] = d->irq;
|
|
|
|
if (block->info->rw_intr_pins) {
|
|
|
|
unsigned int pin = etraxfs_gpio_to_group_pin(chip, d->hwirq);
|
|
|
|
|
|
|
|
block->pins &= ~(0xf << (grpirq * 4));
|
|
|
|
block->pins |= (pin << (grpirq * 4));
|
|
|
|
|
|
|
|
writel(block->pins, block->regs + block->info->rw_intr_pins);
|
|
|
|
}
|
|
|
|
|
|
|
|
out:
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_unlock(&block->lock);
|
2015-08-31 06:56:04 +00:00
|
|
|
return ret;
|
2015-07-31 12:48:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void etraxfs_gpio_irq_release_resources(struct irq_data *d)
|
|
|
|
{
|
2015-08-25 08:40:23 +00:00
|
|
|
struct etraxfs_gpio_chip *chip =
|
2015-12-04 13:02:58 +00:00
|
|
|
gpiochip_get_data(irq_data_get_irq_chip_data(d));
|
2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_block *block = chip->block;
|
|
|
|
unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq);
|
|
|
|
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_lock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
block->group[grpirq] = 0;
|
2015-12-04 13:02:58 +00:00
|
|
|
gpiochip_unlock_as_irq(&chip->gc, d->hwirq);
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_unlock(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct irq_chip etraxfs_gpio_irq_chip = {
|
|
|
|
.name = "gpio-etraxfs",
|
|
|
|
.irq_ack = etraxfs_gpio_irq_ack,
|
|
|
|
.irq_mask = etraxfs_gpio_irq_mask,
|
|
|
|
.irq_unmask = etraxfs_gpio_irq_unmask,
|
|
|
|
.irq_set_type = etraxfs_gpio_irq_set_type,
|
|
|
|
.irq_request_resources = etraxfs_gpio_irq_request_resources,
|
|
|
|
.irq_release_resources = etraxfs_gpio_irq_release_resources,
|
|
|
|
};
|
|
|
|
|
|
|
|
static irqreturn_t etraxfs_gpio_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct etraxfs_gpio_block *block = dev_id;
|
|
|
|
unsigned long intr = readl(block->regs + block->info->r_masked_intr);
|
|
|
|
int bit;
|
|
|
|
|
|
|
|
for_each_set_bit(bit, &intr, 8)
|
|
|
|
generic_handle_irq(block->group[bit]);
|
|
|
|
|
|
|
|
return IRQ_RETVAL(intr & 0xff);
|
|
|
|
}
|
|
|
|
|
2015-06-06 20:30:40 +00:00
|
|
|
static int etraxfs_gpio_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct device *dev = &pdev->dev;
|
|
|
|
const struct etraxfs_gpio_info *info;
|
|
|
|
const struct of_device_id *match;
|
2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_block *block;
|
|
|
|
struct etraxfs_gpio_chip *chips;
|
|
|
|
struct resource *res, *irq;
|
|
|
|
bool allportsirq = false;
|
2015-06-06 20:30:40 +00:00
|
|
|
void __iomem *regs;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
regs = devm_ioremap_resource(dev, res);
|
2015-07-09 13:19:53 +00:00
|
|
|
if (IS_ERR(regs))
|
|
|
|
return PTR_ERR(regs);
|
2015-06-06 20:30:40 +00:00
|
|
|
|
|
|
|
match = of_match_node(etraxfs_gpio_of_table, dev->of_node);
|
|
|
|
if (!match)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
info = match->data;
|
|
|
|
|
|
|
|
chips = devm_kzalloc(dev, sizeof(*chips) * info->num_ports, GFP_KERNEL);
|
|
|
|
if (!chips)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2015-07-31 12:48:57 +00:00
|
|
|
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (!irq)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
block = devm_kzalloc(dev, sizeof(*block), GFP_KERNEL);
|
|
|
|
if (!block)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2017-03-09 16:21:55 +00:00
|
|
|
raw_spin_lock_init(&block->lock);
|
2015-07-31 12:48:57 +00:00
|
|
|
|
|
|
|
block->regs = regs;
|
|
|
|
block->info = info;
|
|
|
|
|
|
|
|
writel(0, block->regs + info->rw_intr_mask);
|
|
|
|
writel(0, block->regs + info->rw_intr_cfg);
|
|
|
|
if (info->rw_intr_pins) {
|
|
|
|
allportsirq = true;
|
|
|
|
writel(0, block->regs + info->rw_intr_pins);
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = devm_request_irq(dev, irq->start, etraxfs_gpio_interrupt,
|
|
|
|
IRQF_SHARED, dev_name(dev), block);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "Unable to request irq %d\n", ret);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-06-06 20:30:40 +00:00
|
|
|
for (i = 0; i < info->num_ports; i++) {
|
2015-07-31 12:48:57 +00:00
|
|
|
struct etraxfs_gpio_chip *chip = &chips[i];
|
2015-12-04 13:02:58 +00:00
|
|
|
struct gpio_chip *gc = &chip->gc;
|
2015-06-06 20:30:40 +00:00
|
|
|
const struct etraxfs_gpio_port *port = &info->ports[i];
|
2015-07-22 13:05:19 +00:00
|
|
|
unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET;
|
|
|
|
void __iomem *dat = regs + port->din;
|
|
|
|
void __iomem *set = regs + port->dout;
|
|
|
|
void __iomem *dirout = regs + port->oe;
|
|
|
|
|
2015-07-31 12:48:57 +00:00
|
|
|
chip->block = block;
|
|
|
|
|
2015-07-22 13:05:19 +00:00
|
|
|
if (dirout == set) {
|
|
|
|
dirout = set = NULL;
|
|
|
|
flags = BGPIOF_NO_OUTPUT;
|
|
|
|
}
|
2015-06-06 20:30:40 +00:00
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
ret = bgpio_init(gc, dev, 4,
|
2015-07-22 13:05:19 +00:00
|
|
|
dat, set, NULL, dirout, NULL,
|
|
|
|
flags);
|
2015-07-31 12:48:57 +00:00
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "Unable to init port %s\n",
|
|
|
|
port->label);
|
|
|
|
continue;
|
|
|
|
}
|
2015-06-06 20:30:40 +00:00
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
gc->ngpio = port->ngpio;
|
|
|
|
gc->label = port->label;
|
2015-06-06 20:30:40 +00:00
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
gc->of_node = dev->of_node;
|
|
|
|
gc->of_gpio_n_cells = 3;
|
|
|
|
gc->of_xlate = etraxfs_gpio_of_xlate;
|
2015-06-06 20:30:40 +00:00
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
ret = gpiochip_add_data(gc, chip);
|
2015-07-31 12:48:57 +00:00
|
|
|
if (ret) {
|
2015-06-06 20:30:40 +00:00
|
|
|
dev_err(dev, "Unable to register port %s\n",
|
2015-12-04 13:02:58 +00:00
|
|
|
gc->label);
|
2015-07-31 12:48:57 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (i > 0 && !allportsirq)
|
|
|
|
continue;
|
|
|
|
|
2015-12-04 13:02:58 +00:00
|
|
|
ret = gpiochip_irqchip_add(gc, &etraxfs_gpio_irq_chip, 0,
|
2015-07-31 12:48:57 +00:00
|
|
|
handle_level_irq, IRQ_TYPE_NONE);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "Unable to add irqchip to port %s\n",
|
2015-12-04 13:02:58 +00:00
|
|
|
gc->label);
|
2015-07-31 12:48:57 +00:00
|
|
|
}
|
2015-06-06 20:30:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver etraxfs_gpio_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "etraxfs-gpio",
|
|
|
|
.of_match_table = of_match_ptr(etraxfs_gpio_of_table),
|
|
|
|
},
|
|
|
|
.probe = etraxfs_gpio_probe,
|
|
|
|
};
|
|
|
|
|
2016-11-18 14:12:27 +00:00
|
|
|
builtin_platform_driver(etraxfs_gpio_driver);
|