2022-05-23 13:28:46 +00:00
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// SPDX-License-Identifier: GPL-2.0
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//
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// MediaTek ALSA SoC Audio DAI I2S Control
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//
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// Copyright (c) 2022 MediaTek Inc.
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// Author: Jiaxin Yu <jiaxin.yu@mediatek.com>
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#include <linux/regmap.h>
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#include <sound/pcm_params.h>
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#include "mt8186-afe-common.h"
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#include "mt8186-afe-gpio.h"
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#include "mt8186-interconnection.h"
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struct mtk_afe_pcm_priv {
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unsigned int id;
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unsigned int fmt;
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unsigned int bck_invert;
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unsigned int lck_invert;
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};
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enum aud_tx_lch_rpt {
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AUD_TX_LCH_RPT_NO_REPEAT = 0,
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AUD_TX_LCH_RPT_REPEAT = 1
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};
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enum aud_vbt_16k_mode {
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AUD_VBT_16K_MODE_DISABLE = 0,
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AUD_VBT_16K_MODE_ENABLE = 1
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};
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enum aud_ext_modem {
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AUD_EXT_MODEM_SELECT_INTERNAL = 0,
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AUD_EXT_MODEM_SELECT_EXTERNAL = 1
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};
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enum aud_pcm_sync_type {
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/* bck sync length = 1 */
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AUD_PCM_ONE_BCK_CYCLE_SYNC = 0,
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/* bck sync length = PCM_INTF_CON1[9:13] */
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AUD_PCM_EXTENDED_BCK_CYCLE_SYNC = 1
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};
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enum aud_bt_mode {
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AUD_BT_MODE_DUAL_MIC_ON_TX = 0,
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AUD_BT_MODE_SINGLE_MIC_ON_TX = 1
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};
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enum aud_pcm_afifo_src {
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/* slave mode & external modem uses different crystal */
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AUD_PCM_AFIFO_ASRC = 0,
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/* slave mode & external modem uses the same crystal */
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AUD_PCM_AFIFO_AFIFO = 1
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};
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enum aud_pcm_clock_source {
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AUD_PCM_CLOCK_MASTER_MODE = 0,
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AUD_PCM_CLOCK_SLAVE_MODE = 1
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};
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enum aud_pcm_wlen {
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AUD_PCM_WLEN_PCM_32_BCK_CYCLES = 0,
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AUD_PCM_WLEN_PCM_64_BCK_CYCLES = 1
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};
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enum aud_pcm_24bit {
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AUD_PCM_24BIT_PCM_16_BITS = 0,
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AUD_PCM_24BIT_PCM_24_BITS = 1
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};
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enum aud_pcm_mode {
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AUD_PCM_MODE_PCM_MODE_8K = 0,
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AUD_PCM_MODE_PCM_MODE_16K = 1,
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AUD_PCM_MODE_PCM_MODE_32K = 2,
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AUD_PCM_MODE_PCM_MODE_48K = 3,
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};
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enum aud_pcm_fmt {
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AUD_PCM_FMT_I2S = 0,
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AUD_PCM_FMT_EIAJ = 1,
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AUD_PCM_FMT_PCM_MODE_A = 2,
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AUD_PCM_FMT_PCM_MODE_B = 3
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};
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enum aud_bclk_out_inv {
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AUD_BCLK_OUT_INV_NO_INVERSE = 0,
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AUD_BCLK_OUT_INV_INVERSE = 1
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};
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enum aud_lrclk_out_inv {
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AUD_LRCLK_OUT_INV_NO_INVERSE = 0,
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AUD_LRCLK_OUT_INV_INVERSE = 1
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};
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enum aud_pcm_en {
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AUD_PCM_EN_DISABLE = 0,
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AUD_PCM_EN_ENABLE = 1
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};
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/* dai component */
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static const struct snd_kcontrol_new mtk_pcm_1_playback_ch1_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH1 Switch", AFE_CONN7,
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I_ADDA_UL_CH1, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH1 Switch", AFE_CONN7,
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I_DL2_CH1, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH1 Switch", AFE_CONN7_1,
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I_DL4_CH1, 1, 0),
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};
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static const struct snd_kcontrol_new mtk_pcm_1_playback_ch2_mix[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("ADDA_UL_CH2 Switch", AFE_CONN8,
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I_ADDA_UL_CH2, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("DL2_CH2 Switch", AFE_CONN8,
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I_DL2_CH2, 1, 0),
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SOC_DAPM_SINGLE_AUTODISABLE("DL4_CH2 Switch", AFE_CONN8_1,
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I_DL4_CH2, 1, 0),
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};
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static int mtk_pcm_en_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol,
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int event)
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{
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struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
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struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
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dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n",
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__func__, w->name, event);
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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mt8186_afe_gpio_request(afe->dev, true, MT8186_DAI_PCM, 0);
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break;
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case SND_SOC_DAPM_POST_PMD:
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mt8186_afe_gpio_request(afe->dev, false, MT8186_DAI_PCM, 0);
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break;
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}
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return 0;
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}
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/* pcm in/out lpbk */
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static const char * const pcm_lpbk_mux_map[] = {
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"Normal", "Lpbk",
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};
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static int pcm_lpbk_mux_map_value[] = {
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0, 1,
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};
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static SOC_VALUE_ENUM_SINGLE_AUTODISABLE_DECL(pcm_in_lpbk_mux_map_enum,
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PCM_INTF_CON1,
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PCM_I2S_PCM_LOOPBACK_SFT,
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1,
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pcm_lpbk_mux_map,
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pcm_lpbk_mux_map_value);
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static const struct snd_kcontrol_new pcm_in_lpbk_mux_control =
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SOC_DAPM_ENUM("PCM In Lpbk Select", pcm_in_lpbk_mux_map_enum);
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static SOC_VALUE_ENUM_SINGLE_AUTODISABLE_DECL(pcm_out_lpbk_mux_map_enum,
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PCM_INTF_CON1,
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PCM_I2S_PCM_LOOPBACK_SFT,
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1,
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pcm_lpbk_mux_map,
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pcm_lpbk_mux_map_value);
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static const struct snd_kcontrol_new pcm_out_lpbk_mux_control =
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SOC_DAPM_ENUM("PCM Out Lpbk Select", pcm_out_lpbk_mux_map_enum);
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static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = {
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/* inter-connections */
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SND_SOC_DAPM_MIXER("PCM_1_PB_CH1", SND_SOC_NOPM, 0, 0,
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mtk_pcm_1_playback_ch1_mix,
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ARRAY_SIZE(mtk_pcm_1_playback_ch1_mix)),
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SND_SOC_DAPM_MIXER("PCM_1_PB_CH2", SND_SOC_NOPM, 0, 0,
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mtk_pcm_1_playback_ch2_mix,
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ARRAY_SIZE(mtk_pcm_1_playback_ch2_mix)),
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SND_SOC_DAPM_SUPPLY("PCM_1_EN",
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PCM_INTF_CON1, PCM_EN_SFT, 0,
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mtk_pcm_en_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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/* pcm in lpbk */
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SND_SOC_DAPM_MUX("PCM_In_Lpbk_Mux",
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SND_SOC_NOPM, 0, 0, &pcm_in_lpbk_mux_control),
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/* pcm out lpbk */
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SND_SOC_DAPM_MUX("PCM_Out_Lpbk_Mux",
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SND_SOC_NOPM, 0, 0, &pcm_out_lpbk_mux_control),
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};
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static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = {
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{"PCM 1 Playback", NULL, "PCM_1_PB_CH1"},
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{"PCM 1 Playback", NULL, "PCM_1_PB_CH2"},
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{"PCM 1 Playback", NULL, "PCM_1_EN"},
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{"PCM 1 Capture", NULL, "PCM_1_EN"},
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{"PCM_1_PB_CH1", "DL2_CH1 Switch", "DL2"},
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{"PCM_1_PB_CH2", "DL2_CH2 Switch", "DL2"},
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{"PCM_1_PB_CH1", "DL4_CH1 Switch", "DL4"},
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{"PCM_1_PB_CH2", "DL4_CH2 Switch", "DL4"},
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/* pcm out lpbk */
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{"PCM_Out_Lpbk_Mux", "Lpbk", "PCM 1 Playback"},
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{"I2S0", NULL, "PCM_Out_Lpbk_Mux"},
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/* pcm in lpbk */
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{"PCM_In_Lpbk_Mux", "Lpbk", "PCM 1 Capture"},
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{"I2S3", NULL, "PCM_In_Lpbk_Mux"},
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};
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/* dai ops */
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static int mtk_dai_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8186_afe_private *afe_priv = afe->platform_priv;
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2023-01-31 02:00:49 +00:00
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struct snd_soc_dapm_widget *p = snd_soc_dai_get_widget_playback(dai);
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struct snd_soc_dapm_widget *c = snd_soc_dai_get_widget_capture(dai);
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2022-05-23 13:28:46 +00:00
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int pcm_id = dai->id;
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struct mtk_afe_pcm_priv *pcm_priv = afe_priv->dai_priv[pcm_id];
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unsigned int rate = params_rate(params);
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unsigned int rate_reg = mt8186_rate_transform(afe->dev, rate, dai->id);
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snd_pcm_format_t format = params_format(params);
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unsigned int data_width =
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snd_pcm_format_width(format);
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unsigned int wlen_width =
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snd_pcm_format_physical_width(format);
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unsigned int pcm_con = 0;
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dev_dbg(afe->dev, "%s(), id %d, stream %d, widget active p %d, c %d\n",
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2023-01-31 02:00:49 +00:00
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__func__, dai->id, substream->stream, p->active, c->active);
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2022-05-23 13:28:46 +00:00
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dev_dbg(afe->dev, "%s(), rate %d, rate_reg %d, data_width %d, wlen_width %d\n",
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__func__, rate, rate_reg, data_width, wlen_width);
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2023-01-31 02:00:49 +00:00
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if (p->active || c->active)
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2022-05-23 13:28:46 +00:00
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return 0;
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switch (dai->id) {
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case MT8186_DAI_PCM:
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pcm_con |= AUD_TX_LCH_RPT_NO_REPEAT << PCM_TX_LCH_RPT_SFT;
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pcm_con |= AUD_VBT_16K_MODE_DISABLE << PCM_VBT_16K_MODE_SFT;
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pcm_con |= AUD_EXT_MODEM_SELECT_EXTERNAL << PCM_EXT_MODEM_SFT;
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pcm_con |= AUD_PCM_ONE_BCK_CYCLE_SYNC << PCM_SYNC_TYPE_SFT;
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pcm_con |= AUD_BT_MODE_DUAL_MIC_ON_TX << PCM_BT_MODE_SFT;
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pcm_con |= AUD_PCM_AFIFO_AFIFO << PCM_BYP_ASRC_SFT;
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pcm_con |= AUD_PCM_CLOCK_MASTER_MODE << PCM_SLAVE_SFT;
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pcm_con |= 0 << PCM_SYNC_LENGTH_SFT;
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/* sampling rate */
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pcm_con |= rate_reg << PCM_MODE_SFT;
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/* format */
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pcm_con |= pcm_priv->fmt << PCM_FMT_SFT;
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/* 24bit data width */
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if (data_width > 16)
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pcm_con |= AUD_PCM_24BIT_PCM_24_BITS << PCM_24BIT_SFT;
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else
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pcm_con |= AUD_PCM_24BIT_PCM_16_BITS << PCM_24BIT_SFT;
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/* wlen width*/
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if (wlen_width > 16)
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pcm_con |= AUD_PCM_WLEN_PCM_64_BCK_CYCLES << PCM_WLEN_SFT;
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else
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pcm_con |= AUD_PCM_WLEN_PCM_32_BCK_CYCLES << PCM_WLEN_SFT;
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/* clock invert */
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pcm_con |= pcm_priv->lck_invert << PCM_SYNC_OUT_INV_SFT;
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pcm_con |= pcm_priv->bck_invert << PCM_BCLK_OUT_INV_SFT;
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regmap_update_bits(afe->regmap, PCM_INTF_CON1, 0xfffffffe, pcm_con);
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break;
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default:
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dev_err(afe->dev, "%s(), id %d not support\n", __func__, dai->id);
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return -EINVAL;
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}
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return 0;
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}
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static int mtk_dai_pcm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai);
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struct mt8186_afe_private *afe_priv = afe->platform_priv;
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struct mtk_afe_pcm_priv *pcm_priv = afe_priv->dai_priv[dai->id];
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/* DAI mode*/
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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pcm_priv->fmt = AUD_PCM_FMT_I2S;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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pcm_priv->fmt = AUD_PCM_FMT_EIAJ;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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pcm_priv->fmt = AUD_PCM_FMT_PCM_MODE_A;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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pcm_priv->fmt = AUD_PCM_FMT_PCM_MODE_B;
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break;
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default:
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pcm_priv->fmt = AUD_PCM_FMT_I2S;
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}
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/* DAI clock inversion*/
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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pcm_priv->bck_invert = AUD_BCLK_OUT_INV_NO_INVERSE;
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pcm_priv->lck_invert = AUD_LRCLK_OUT_INV_NO_INVERSE;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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pcm_priv->bck_invert = AUD_BCLK_OUT_INV_NO_INVERSE;
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pcm_priv->lck_invert = AUD_BCLK_OUT_INV_INVERSE;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_IB_NF:
|
|
|
|
pcm_priv->bck_invert = AUD_BCLK_OUT_INV_INVERSE;
|
|
|
|
pcm_priv->lck_invert = AUD_LRCLK_OUT_INV_NO_INVERSE;
|
|
|
|
break;
|
|
|
|
case SND_SOC_DAIFMT_IB_IF:
|
|
|
|
pcm_priv->bck_invert = AUD_BCLK_OUT_INV_INVERSE;
|
|
|
|
pcm_priv->lck_invert = AUD_BCLK_OUT_INV_INVERSE;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
pcm_priv->bck_invert = AUD_BCLK_OUT_INV_NO_INVERSE;
|
|
|
|
pcm_priv->lck_invert = AUD_LRCLK_OUT_INV_NO_INVERSE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct snd_soc_dai_ops mtk_dai_pcm_ops = {
|
|
|
|
.hw_params = mtk_dai_pcm_hw_params,
|
|
|
|
.set_fmt = mtk_dai_pcm_set_fmt,
|
|
|
|
};
|
|
|
|
|
|
|
|
/* dai driver */
|
|
|
|
#define MTK_PCM_RATES (SNDRV_PCM_RATE_8000 |\
|
|
|
|
SNDRV_PCM_RATE_16000 |\
|
|
|
|
SNDRV_PCM_RATE_32000 |\
|
|
|
|
SNDRV_PCM_RATE_48000)
|
|
|
|
|
|
|
|
#define MTK_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
|
|
|
|
SNDRV_PCM_FMTBIT_S24_LE |\
|
|
|
|
SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
|
|
|
|
static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = {
|
|
|
|
{
|
|
|
|
.name = "PCM 1",
|
|
|
|
.id = MT8186_DAI_PCM,
|
|
|
|
.playback = {
|
|
|
|
.stream_name = "PCM 1 Playback",
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = MTK_PCM_RATES,
|
|
|
|
.formats = MTK_PCM_FORMATS,
|
|
|
|
},
|
|
|
|
.capture = {
|
|
|
|
.stream_name = "PCM 1 Capture",
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 2,
|
|
|
|
.rates = MTK_PCM_RATES,
|
|
|
|
.formats = MTK_PCM_FORMATS,
|
|
|
|
},
|
|
|
|
.ops = &mtk_dai_pcm_ops,
|
|
|
|
.symmetric_rate = 1,
|
|
|
|
.symmetric_sample_bits = 1,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct mtk_afe_pcm_priv *init_pcm_priv_data(struct mtk_base_afe *afe)
|
|
|
|
{
|
|
|
|
struct mtk_afe_pcm_priv *pcm_priv;
|
|
|
|
|
|
|
|
pcm_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_afe_pcm_priv),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!pcm_priv)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
pcm_priv->id = MT8186_DAI_PCM;
|
|
|
|
pcm_priv->fmt = AUD_PCM_FMT_I2S;
|
|
|
|
pcm_priv->bck_invert = AUD_BCLK_OUT_INV_NO_INVERSE;
|
|
|
|
pcm_priv->lck_invert = AUD_LRCLK_OUT_INV_NO_INVERSE;
|
|
|
|
|
|
|
|
return pcm_priv;
|
|
|
|
}
|
|
|
|
|
|
|
|
int mt8186_dai_pcm_register(struct mtk_base_afe *afe)
|
|
|
|
{
|
|
|
|
struct mt8186_afe_private *afe_priv = afe->platform_priv;
|
|
|
|
struct mtk_afe_pcm_priv *pcm_priv;
|
|
|
|
struct mtk_base_afe_dai *dai;
|
|
|
|
|
|
|
|
dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL);
|
|
|
|
if (!dai)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
list_add(&dai->list, &afe->sub_dais);
|
|
|
|
|
|
|
|
dai->dai_drivers = mtk_dai_pcm_driver;
|
|
|
|
dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver);
|
|
|
|
|
|
|
|
dai->dapm_widgets = mtk_dai_pcm_widgets;
|
|
|
|
dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets);
|
|
|
|
dai->dapm_routes = mtk_dai_pcm_routes;
|
|
|
|
dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes);
|
|
|
|
|
|
|
|
pcm_priv = init_pcm_priv_data(afe);
|
|
|
|
if (!pcm_priv)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
afe_priv->dai_priv[MT8186_DAI_PCM] = pcm_priv;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|