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180 lines
5.3 KiB
C
180 lines
5.3 KiB
C
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/*
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* FB driver for the ILI9341 LCD display controller
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*
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* This display uses 9-bit SPI: Data/Command bit + 8 data bits
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* For platforms that doesn't support 9-bit, the driver is capable
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* of emulating this using 8-bit transfer.
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* This is done by transfering eight 9-bit words in 9 bytes.
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*
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* Copyright (C) 2013 Christian Vogelgsang
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* Based on adafruit22fb.c by Noralf Tronnes
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include "fbtft.h"
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#define DRVNAME "fb_ili9341"
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#define WIDTH 240
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#define HEIGHT 320
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#define TXBUFLEN (4 * PAGE_SIZE)
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#define DEFAULT_GAMMA "1F 1A 18 0A 0F 06 45 87 32 0A 07 02 07 05 00\n" \
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"00 25 27 05 10 09 3A 78 4D 05 18 0D 38 3A 1F"
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static int init_display(struct fbtft_par *par)
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{
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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par->fbtftops.reset(par);
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/* startup sequence for MI0283QT-9A */
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write_reg(par, 0x01); /* software reset */
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mdelay(5);
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write_reg(par, 0x28); /* display off */
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/* --------------------------------------------------------- */
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write_reg(par, 0xCF, 0x00, 0x83, 0x30);
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write_reg(par, 0xED, 0x64, 0x03, 0x12, 0x81);
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write_reg(par, 0xE8, 0x85, 0x01, 0x79);
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write_reg(par, 0xCB, 0x39, 0X2C, 0x00, 0x34, 0x02);
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write_reg(par, 0xF7, 0x20);
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write_reg(par, 0xEA, 0x00, 0x00);
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/* ------------power control-------------------------------- */
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write_reg(par, 0xC0, 0x26);
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write_reg(par, 0xC1, 0x11);
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/* ------------VCOM --------- */
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write_reg(par, 0xC5, 0x35, 0x3E);
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write_reg(par, 0xC7, 0xBE);
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/* ------------memory access control------------------------ */
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write_reg(par, 0x3A, 0x55); /* 16bit pixel */
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/* ------------frame rate----------------------------------- */
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write_reg(par, 0xB1, 0x00, 0x1B);
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/* ------------Gamma---------------------------------------- */
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/* write_reg(par, 0xF2, 0x08); */ /* Gamma Function Disable */
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write_reg(par, 0x26, 0x01);
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/* ------------display-------------------------------------- */
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write_reg(par, 0xB7, 0x07); /* entry mode set */
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write_reg(par, 0xB6, 0x0A, 0x82, 0x27, 0x00);
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write_reg(par, 0x11); /* sleep out */
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mdelay(100);
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write_reg(par, 0x29); /* display on */
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mdelay(20);
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return 0;
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}
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static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
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{
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fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
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"%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
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/* Column address set */
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write_reg(par, 0x2A,
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(xs >> 8) & 0xFF, xs & 0xFF, (xe >> 8) & 0xFF, xe & 0xFF);
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/* Row adress set */
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write_reg(par, 0x2B,
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(ys >> 8) & 0xFF, ys & 0xFF, (ye >> 8) & 0xFF, ye & 0xFF);
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/* Memory write */
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write_reg(par, 0x2C);
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}
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#define MEM_Y (7) /* MY row address order */
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#define MEM_X (6) /* MX column address order */
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#define MEM_V (5) /* MV row / column exchange */
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#define MEM_L (4) /* ML vertical refresh order */
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#define MEM_H (2) /* MH horizontal refresh order */
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#define MEM_BGR (3) /* RGB-BGR Order */
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static int set_var(struct fbtft_par *par)
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{
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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switch (par->info->var.rotate) {
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case 0:
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write_reg(par, 0x36, (1 << MEM_X) | (par->bgr << MEM_BGR));
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break;
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case 270:
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write_reg(par, 0x36,
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(1<<MEM_V) | (1 << MEM_L) | (par->bgr << MEM_BGR));
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break;
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case 180:
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write_reg(par, 0x36, (1 << MEM_Y) | (par->bgr << MEM_BGR));
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break;
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case 90:
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write_reg(par, 0x36, (1 << MEM_Y) | (1 << MEM_X) |
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(1 << MEM_V) | (par->bgr << MEM_BGR));
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break;
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}
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return 0;
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}
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/*
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Gamma string format:
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Positive: Par1 Par2 [...] Par15
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Negative: Par1 Par2 [...] Par15
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*/
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#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
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static int set_gamma(struct fbtft_par *par, unsigned long *curves)
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{
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int i;
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fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
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for (i = 0; i < par->gamma.num_curves; i++)
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write_reg(par, 0xE0 + i,
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CURVE(i, 0), CURVE(i, 1), CURVE(i, 2),
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CURVE(i, 3), CURVE(i, 4), CURVE(i, 5),
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CURVE(i, 6), CURVE(i, 7), CURVE(i, 8),
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CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
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CURVE(i, 12), CURVE(i, 13), CURVE(i, 14));
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return 0;
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}
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#undef CURVE
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static struct fbtft_display display = {
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.regwidth = 8,
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.width = WIDTH,
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.height = HEIGHT,
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.txbuflen = TXBUFLEN,
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.gamma_num = 2,
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.gamma_len = 15,
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.gamma = DEFAULT_GAMMA,
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.fbtftops = {
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.init_display = init_display,
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.set_addr_win = set_addr_win,
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.set_var = set_var,
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.set_gamma = set_gamma,
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},
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};
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FBTFT_REGISTER_DRIVER(DRVNAME, "ilitek,ili9341", &display);
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MODULE_ALIAS("spi:" DRVNAME);
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MODULE_ALIAS("platform:" DRVNAME);
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MODULE_ALIAS("spi:ili9341");
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MODULE_ALIAS("platform:ili9341");
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MODULE_DESCRIPTION("FB driver for the ILI9341 LCD display controller");
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MODULE_AUTHOR("Christian Vogelgsang");
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MODULE_LICENSE("GPL");
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