2005-04-16 22:20:36 +00:00
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/*
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* HIL MLC state machine and serio interface driver
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*
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* Copyright (c) 2001 Brian S. Julin
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions, and the following disclaimer,
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* without modification.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL").
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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*
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* References:
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* HP-HIL Technical Reference Manual. Hewlett Packard Product No. 45918A
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*
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*
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* Driver theory of operation:
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*
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2007-03-01 04:51:29 +00:00
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* Some access methods and an ISR is defined by the sub-driver
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* (e.g. hp_sdc_mlc.c). These methods are expected to provide a
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* few bits of logic in addition to raw access to the HIL MLC,
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* specifically, the ISR, which is entirely registered by the
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* sub-driver and invoked directly, must check for record
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2005-04-16 22:20:36 +00:00
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* termination or packet match, at which point a semaphore must
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* be cleared and then the hil_mlcs_tasklet must be scheduled.
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*
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* The hil_mlcs_tasklet processes the state machine for all MLCs
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* each time it runs, checking each MLC's progress at the current
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* node in the state machine, and moving the MLC to subsequent nodes
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* in the state machine when appropriate. It will reschedule
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* itself if output is pending. (This rescheduling should be replaced
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* at some point with a sub-driver-specific mechanism.)
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*
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2007-03-01 04:51:29 +00:00
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* A timer task prods the tasklet once per second to prevent
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2005-04-16 22:20:36 +00:00
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* hangups when attached devices do not return expected data
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* and to initiate probes of the loop for new devices.
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*/
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#include <linux/hil_mlc.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2005-04-16 22:20:36 +00:00
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#include <linux/timer.h>
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#include <linux/list.h>
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MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>");
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MODULE_DESCRIPTION("HIL MLC serio");
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MODULE_LICENSE("Dual BSD/GPL");
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EXPORT_SYMBOL(hil_mlc_register);
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EXPORT_SYMBOL(hil_mlc_unregister);
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#define PREFIX "HIL MLC: "
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static LIST_HEAD(hil_mlcs);
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static DEFINE_RWLOCK(hil_mlcs_lock);
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static struct timer_list hil_mlcs_kicker;
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2020-10-19 14:57:50 +00:00
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static int hil_mlcs_probe, hil_mlc_stop;
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2005-04-16 22:20:36 +00:00
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static void hil_mlcs_process(unsigned long unused);
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2020-07-13 22:01:26 +00:00
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static DECLARE_TASKLET_DISABLED_OLD(hil_mlcs_tasklet, hil_mlcs_process);
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2005-04-16 22:20:36 +00:00
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/* #define HIL_MLC_DEBUG */
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/********************** Device info/instance management **********************/
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2007-03-01 04:51:29 +00:00
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static void hil_mlc_clear_di_map(hil_mlc *mlc, int val)
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{
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2005-04-16 22:20:36 +00:00
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int j;
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2007-03-01 04:51:29 +00:00
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for (j = val; j < 7 ; j++)
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2005-04-16 22:20:36 +00:00
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mlc->di_map[j] = -1;
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}
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2007-03-01 04:51:29 +00:00
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static void hil_mlc_clear_di_scratch(hil_mlc *mlc)
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{
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memset(&mlc->di_scratch, 0, sizeof(mlc->di_scratch));
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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static void hil_mlc_copy_di_scratch(hil_mlc *mlc, int idx)
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{
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memcpy(&mlc->di[idx], &mlc->di_scratch, sizeof(mlc->di_scratch));
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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static int hil_mlc_match_di_scratch(hil_mlc *mlc)
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{
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2005-04-16 22:20:36 +00:00
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int idx;
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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2007-03-01 04:51:29 +00:00
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int j, found = 0;
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2005-04-16 22:20:36 +00:00
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/* In-use slots are not eligible. */
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2007-03-01 04:51:29 +00:00
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (found)
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continue;
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if (!memcmp(mlc->di + idx, &mlc->di_scratch,
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sizeof(mlc->di_scratch)))
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break;
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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return idx >= HIL_MLC_DEVMEM ? -1 : idx;
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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static int hil_mlc_find_free_di(hil_mlc *mlc)
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{
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2005-04-16 22:20:36 +00:00
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int idx;
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2007-03-01 04:51:29 +00:00
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/* TODO: Pick all-zero slots first, failing that,
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* randomize the slot picked among those eligible.
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2005-04-16 22:20:36 +00:00
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*/
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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2007-03-01 04:51:29 +00:00
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int j, found = 0;
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (!found)
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break;
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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return idx; /* Note: It is guaranteed at least one above will match */
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2005-04-16 22:20:36 +00:00
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}
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2007-03-01 04:51:29 +00:00
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static inline void hil_mlc_clean_serio_map(hil_mlc *mlc)
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{
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2005-04-16 22:20:36 +00:00
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int idx;
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2007-03-01 04:51:29 +00:00
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2005-04-16 22:20:36 +00:00
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for (idx = 0; idx < HIL_MLC_DEVMEM; idx++) {
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2007-03-01 04:51:29 +00:00
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int j, found = 0;
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for (j = 0; j < 7 ; j++)
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if (mlc->di_map[j] == idx)
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found++;
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if (!found)
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mlc->serio_map[idx].di_revmap = -1;
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2005-04-16 22:20:36 +00:00
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}
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}
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2007-03-01 04:51:29 +00:00
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static void hil_mlc_send_polls(hil_mlc *mlc)
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{
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2005-04-16 22:20:36 +00:00
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int did, i, cnt;
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struct serio *serio;
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struct serio_driver *drv;
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i = cnt = 0;
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did = (mlc->ipacket[0] & HIL_PKT_ADDR_MASK) >> 8;
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serio = did ? mlc->serio[mlc->di_map[did - 1]] : NULL;
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drv = (serio != NULL) ? serio->drv : NULL;
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while (mlc->icount < 15 - i) {
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hil_packet p;
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2007-03-01 04:51:29 +00:00
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2005-04-16 22:20:36 +00:00
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p = mlc->ipacket[i];
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if (did != (p & HIL_PKT_ADDR_MASK) >> 8) {
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2007-03-01 04:51:29 +00:00
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if (drv && drv->interrupt) {
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drv->interrupt(serio, 0, 0);
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drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
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drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
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drv->interrupt(serio, HIL_CMD_POL + cnt, 0);
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}
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2005-04-16 22:20:36 +00:00
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did = (p & HIL_PKT_ADDR_MASK) >> 8;
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serio = did ? mlc->serio[mlc->di_map[did-1]] : NULL;
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drv = (serio != NULL) ? serio->drv : NULL;
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cnt = 0;
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}
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2007-03-01 04:51:29 +00:00
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cnt++;
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i++;
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if (drv && drv->interrupt) {
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drv->interrupt(serio, (p >> 24), 0);
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drv->interrupt(serio, (p >> 16) & 0xff, 0);
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drv->interrupt(serio, (p >> 8) & ~HIL_PKT_ADDR_MASK, 0);
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drv->interrupt(serio, p & 0xff, 0);
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}
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2005-04-16 22:20:36 +00:00
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}
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}
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/*************************** State engine *********************************/
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#define HILSEN_SCHED 0x000100 /* Schedule the tasklet */
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#define HILSEN_BREAK 0x000200 /* Wait until next pass */
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#define HILSEN_UP 0x000400 /* relative node#, decrement */
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#define HILSEN_DOWN 0x000800 /* relative node#, increment */
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#define HILSEN_FOLLOW 0x001000 /* use retval as next node# */
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#define HILSEN_MASK 0x0000ff
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#define HILSEN_START 0
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#define HILSEN_RESTART 1
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#define HILSEN_DHR 9
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#define HILSEN_DHR2 10
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#define HILSEN_IFC 14
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#define HILSEN_HEAL0 16
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#define HILSEN_HEAL 18
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#define HILSEN_ACF 21
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#define HILSEN_ACF2 22
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#define HILSEN_DISC0 25
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#define HILSEN_DISC 27
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#define HILSEN_MATCH 40
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#define HILSEN_OPERATE 41
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#define HILSEN_PROBE 44
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#define HILSEN_DSR 52
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#define HILSEN_REPOLL 55
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#define HILSEN_IFCACF 58
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#define HILSEN_END 60
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#define HILSEN_NEXT (HILSEN_DOWN | 1)
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#define HILSEN_SAME (HILSEN_DOWN | 0)
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#define HILSEN_LAST (HILSEN_UP | 1)
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#define HILSEN_DOZE (HILSEN_SAME | HILSEN_SCHED | HILSEN_BREAK)
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#define HILSEN_SLEEP (HILSEN_SAME | HILSEN_BREAK)
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2007-03-01 04:51:29 +00:00
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static int hilse_match(hil_mlc *mlc, int unused)
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{
|
2005-04-16 22:20:36 +00:00
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int rc;
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2007-03-01 04:51:29 +00:00
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2005-04-16 22:20:36 +00:00
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rc = hil_mlc_match_di_scratch(mlc);
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if (rc == -1) {
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rc = hil_mlc_find_free_di(mlc);
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2007-03-01 04:51:29 +00:00
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if (rc == -1)
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goto err;
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2005-04-16 22:20:36 +00:00
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#ifdef HIL_MLC_DEBUG
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printk(KERN_DEBUG PREFIX "new in slot %i\n", rc);
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#endif
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hil_mlc_copy_di_scratch(mlc, rc);
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mlc->di_map[mlc->ddi] = rc;
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mlc->serio_map[rc].di_revmap = mlc->ddi;
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hil_mlc_clean_serio_map(mlc);
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serio_rescan(mlc->serio[rc]);
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return -1;
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}
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2007-03-01 04:51:29 +00:00
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2005-04-16 22:20:36 +00:00
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mlc->di_map[mlc->ddi] = rc;
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#ifdef HIL_MLC_DEBUG
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printk(KERN_DEBUG PREFIX "same in slot %i\n", rc);
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#endif
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mlc->serio_map[rc].di_revmap = mlc->ddi;
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hil_mlc_clean_serio_map(mlc);
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return 0;
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2007-03-01 04:51:29 +00:00
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|
|
2005-04-16 22:20:36 +00:00
|
|
|
err:
|
|
|
|
printk(KERN_ERR PREFIX "Residual device slots exhausted, close some serios!\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* An LCV used to prevent runaway loops, forces 5 second sleep when reset. */
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_init_lcv(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2018-01-02 05:29:18 +00:00
|
|
|
time64_t now = ktime_get_seconds();
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2018-01-02 05:29:18 +00:00
|
|
|
if (mlc->lcv && (now - mlc->lcv_time) < 5)
|
2007-03-01 04:51:29 +00:00
|
|
|
return -1;
|
|
|
|
|
2018-01-02 05:29:18 +00:00
|
|
|
mlc->lcv_time = now;
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->lcv = 0;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_inc_lcv(hil_mlc *mlc, int lim)
|
|
|
|
{
|
|
|
|
return mlc->lcv++ >= lim ? -1 : 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#if 0
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_set_lcv(hil_mlc *mlc, int val)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->lcv = val;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Management of the discovered device index (zero based, -1 means no devs) */
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_set_ddi(hil_mlc *mlc, int val)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ddi = val;
|
|
|
|
hil_mlc_clear_di_map(mlc, val + 1);
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_dec_ddi(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ddi--;
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->ddi <= -1) {
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ddi = -1;
|
|
|
|
hil_mlc_clear_di_map(mlc, 0);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
hil_mlc_clear_di_map(mlc, mlc->ddi + 1);
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_inc_ddi(hil_mlc *mlc, int unused)
|
|
|
|
{
|
|
|
|
BUG_ON(mlc->ddi >= 6);
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ddi++;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_take_idd(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
/* Help the state engine:
|
|
|
|
* Is this a real IDD response or just an echo?
|
2005-04-16 22:20:36 +00:00
|
|
|
*
|
2007-03-01 04:51:29 +00:00
|
|
|
* Real IDD response does not start with a command.
|
2005-04-16 22:20:36 +00:00
|
|
|
*/
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->ipacket[0] & HIL_PKT_CMD)
|
|
|
|
goto bail;
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* Should have the command echoed further down. */
|
|
|
|
for (i = 1; i < 16; i++) {
|
2007-03-01 04:51:29 +00:00
|
|
|
if (((mlc->ipacket[i] & HIL_PKT_ADDR_MASK) ==
|
2005-04-16 22:20:36 +00:00
|
|
|
(mlc->ipacket[0] & HIL_PKT_ADDR_MASK)) &&
|
2007-03-01 04:51:29 +00:00
|
|
|
(mlc->ipacket[i] & HIL_PKT_CMD) &&
|
2005-04-16 22:20:36 +00:00
|
|
|
((mlc->ipacket[i] & HIL_PKT_DATA_MASK) == HIL_CMD_IDD))
|
|
|
|
break;
|
|
|
|
}
|
2007-03-01 04:51:29 +00:00
|
|
|
if (i > 15)
|
|
|
|
goto bail;
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* And the rest of the packets should still be clear. */
|
2007-03-01 04:51:29 +00:00
|
|
|
while (++i < 16)
|
|
|
|
if (mlc->ipacket[i])
|
|
|
|
break;
|
|
|
|
|
|
|
|
if (i < 16)
|
|
|
|
goto bail;
|
|
|
|
|
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
mlc->di_scratch.idd[i] =
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ipacket[i] & HIL_PKT_DATA_MASK;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* Next step is to see if RSC supported */
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_RSC)
|
2005-04-16 22:20:36 +00:00
|
|
|
return HILSEN_NEXT;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
|
|
|
if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
|
2005-04-16 22:20:36 +00:00
|
|
|
return HILSEN_DOWN | 4;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
bail:
|
|
|
|
mlc->ddi--;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return -1; /* This should send us off to ACF */
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_take_rsc(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
mlc->di_scratch.rsc[i] =
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ipacket[i] & HIL_PKT_DATA_MASK;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* Next step is to see if EXD supported (IDD has already been read) */
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->di_scratch.idd[1] & HIL_IDD_HEADER_EXD)
|
2005-04-16 22:20:36 +00:00
|
|
|
return HILSEN_NEXT;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_take_exd(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
mlc->di_scratch.exd[i] =
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ipacket[i] & HIL_PKT_DATA_MASK;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* Next step is to see if RNM supported. */
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->di_scratch.exd[0] & HIL_EXD_HEADER_RNM)
|
2005-04-16 22:20:36 +00:00
|
|
|
return HILSEN_NEXT;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_take_rnm(hil_mlc *mlc, int unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
for (i = 0; i < 16; i++)
|
|
|
|
mlc->di_scratch.rnm[i] =
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ipacket[i] & HIL_PKT_DATA_MASK;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
|
|
|
printk(KERN_INFO PREFIX "Device name gotten: %16s\n",
|
|
|
|
mlc->di_scratch.rnm);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_operate(hil_mlc *mlc, int repoll)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->opercnt == 0)
|
|
|
|
hil_mlcs_probe = 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->opercnt = 1;
|
|
|
|
|
|
|
|
hil_mlc_send_polls(mlc);
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
if (!hil_mlcs_probe)
|
|
|
|
return 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
hil_mlcs_probe = 0;
|
|
|
|
mlc->opercnt = 0;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define FUNC(funct, funct_arg, zero_rc, neg_rc, pos_rc) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_FUNC, { .func = funct }, funct_arg, zero_rc, neg_rc, pos_rc },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define OUT(pack) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_OUT, { .packet = pack }, 0, HILSEN_NEXT, HILSEN_DOZE, 0 },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define CTS \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_CTS, { .packet = 0 }, 0, HILSEN_NEXT | HILSEN_SCHED | HILSEN_BREAK, HILSEN_DOZE, 0 },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define EXPECT(comp, to, got, got_wrong, timed_out) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_EXPECT, { .packet = comp }, to, got, got_wrong, timed_out },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define EXPECT_LAST(comp, to, got, got_wrong, timed_out) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_EXPECT_LAST, { .packet = comp }, to, got, got_wrong, timed_out },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define EXPECT_DISC(comp, to, got, got_wrong, timed_out) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_EXPECT_DISC, { .packet = comp }, to, got, got_wrong, timed_out },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define IN(to, got, got_error, timed_out) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_IN, { .packet = 0 }, to, got, got_error, timed_out },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define OUT_DISC(pack) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_OUT_DISC, { .packet = pack }, 0, 0, 0, 0 },
|
2005-04-16 22:20:36 +00:00
|
|
|
#define OUT_LAST(pack) \
|
2006-10-14 15:52:36 +00:00
|
|
|
{ HILSE_OUT_LAST, { .packet = pack }, 0, 0, 0, 0 },
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-06-26 14:46:38 +00:00
|
|
|
static const struct hilse_node hil_mlc_se[HILSEN_END] = {
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
/* 0 HILSEN_START */
|
|
|
|
FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
|
|
|
|
|
|
|
|
/* 1 HILSEN_RESTART */
|
|
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
|
|
OUT(HIL_CTRL_ONLY) /* Disable APE */
|
|
|
|
CTS
|
|
|
|
|
|
|
|
#define TEST_PACKET(x) \
|
|
|
|
(HIL_PKT_CMD | (x << HIL_PKT_ADDR_SHIFT) | x << 4 | x)
|
|
|
|
|
|
|
|
OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0x5))
|
|
|
|
EXPECT(HIL_ERR_INT | TEST_PACKET(0x5),
|
|
|
|
2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
|
|
|
|
OUT(HIL_DO_ALTER_CTRL | HIL_CTRL_TEST | TEST_PACKET(0xa))
|
|
|
|
EXPECT(HIL_ERR_INT | TEST_PACKET(0xa),
|
|
|
|
2000, HILSEN_NEXT, HILSEN_RESTART, HILSEN_RESTART)
|
|
|
|
OUT(HIL_CTRL_ONLY | 0) /* Disable test mode */
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/* 9 HILSEN_DHR */
|
|
|
|
FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_SLEEP, 0)
|
|
|
|
|
|
|
|
/* 10 HILSEN_DHR2 */
|
|
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
|
|
FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_DHR)
|
|
|
|
IN(300000, HILSEN_DHR2, HILSEN_DHR2, HILSEN_NEXT)
|
|
|
|
|
|
|
|
/* 14 HILSEN_IFC */
|
2007-03-01 04:51:29 +00:00
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_IFC)
|
2005-04-16 22:20:36 +00:00
|
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_DISC, HILSEN_DHR2, HILSEN_NEXT )
|
|
|
|
|
|
|
|
/* If devices are there, they weren't in PUP or other loopback mode.
|
|
|
|
* We're more concerned at this point with restoring operation
|
|
|
|
* to devices than discovering new ones, so we try to salvage
|
|
|
|
* the loop configuration by closing off the loop.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/* 16 HILSEN_HEAL0 */
|
|
|
|
FUNC(hilse_dec_ddi, 0, HILSEN_NEXT, HILSEN_ACF, 0)
|
|
|
|
FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, 0, 0)
|
|
|
|
|
|
|
|
/* 18 HILSEN_HEAL */
|
|
|
|
OUT_LAST(HIL_CMD_ELB)
|
2007-03-01 04:51:29 +00:00
|
|
|
EXPECT_LAST(HIL_CMD_ELB | HIL_ERR_INT,
|
2005-04-16 22:20:36 +00:00
|
|
|
20000, HILSEN_REPOLL, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
FUNC(hilse_dec_ddi, 0, HILSEN_HEAL, HILSEN_NEXT, 0)
|
|
|
|
|
|
|
|
/* 21 HILSEN_ACF */
|
|
|
|
FUNC(hilse_init_lcv, 0, HILSEN_NEXT, HILSEN_DOZE, 0)
|
|
|
|
|
|
|
|
/* 22 HILSEN_ACF2 */
|
|
|
|
FUNC(hilse_inc_lcv, 10, HILSEN_NEXT, HILSEN_START, 0)
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
|
|
|
|
IN(20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
|
|
|
|
/* 25 HILSEN_DISC0 */
|
|
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
|
|
EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_ELB | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
|
|
|
|
/* Only enter here if response just received */
|
|
|
|
/* 27 HILSEN_DISC */
|
|
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_IDD)
|
|
|
|
EXPECT_DISC(HIL_PKT_CMD | HIL_CMD_IDD | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_START)
|
|
|
|
FUNC(hilse_inc_ddi, 0, HILSEN_NEXT, HILSEN_START, 0)
|
|
|
|
FUNC(hilse_take_idd, 0, HILSEN_MATCH, HILSEN_IFCACF, HILSEN_FOLLOW)
|
|
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_RSC)
|
|
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RSC | HIL_ERR_INT,
|
|
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
FUNC(hilse_take_rsc, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
|
|
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_EXD)
|
|
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_EXD | HIL_ERR_INT,
|
|
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
FUNC(hilse_take_exd, 0, HILSEN_MATCH, 0, HILSEN_FOLLOW)
|
|
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_RNM)
|
|
|
|
EXPECT_LAST(HIL_PKT_CMD | HIL_CMD_RNM | HIL_ERR_INT,
|
|
|
|
30000, HILSEN_NEXT, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
FUNC(hilse_take_rnm, 0, HILSEN_MATCH, 0, 0)
|
|
|
|
|
|
|
|
/* 40 HILSEN_MATCH */
|
|
|
|
FUNC(hilse_match, 0, HILSEN_NEXT, HILSEN_NEXT, /* TODO */ 0)
|
|
|
|
|
|
|
|
/* 41 HILSEN_OPERATE */
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_POL)
|
|
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_POL | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
FUNC(hilse_operate, 0, HILSEN_OPERATE, HILSEN_IFC, HILSEN_NEXT)
|
|
|
|
|
|
|
|
/* 44 HILSEN_PROBE */
|
|
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_EPT)
|
2007-03-01 04:51:29 +00:00
|
|
|
IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
|
2005-04-16 22:20:36 +00:00
|
|
|
OUT_DISC(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
|
|
IN(10000, HILSEN_DISC, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_ACF | 1)
|
|
|
|
IN(10000, HILSEN_DISC0, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
OUT_LAST(HIL_PKT_CMD | HIL_CMD_ELB)
|
|
|
|
IN(10000, HILSEN_OPERATE, HILSEN_DSR, HILSEN_DSR)
|
|
|
|
|
|
|
|
/* 52 HILSEN_DSR */
|
|
|
|
FUNC(hilse_set_ddi, -1, HILSEN_NEXT, 0, 0)
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_DSR)
|
2007-03-01 04:51:29 +00:00
|
|
|
IN(20000, HILSEN_DHR, HILSEN_DHR, HILSEN_IFC)
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
/* 55 HILSEN_REPOLL */
|
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_RPL)
|
|
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_RPL | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_NEXT, HILSEN_DSR, HILSEN_NEXT)
|
|
|
|
FUNC(hilse_operate, 1, HILSEN_OPERATE, HILSEN_IFC, HILSEN_PROBE)
|
|
|
|
|
|
|
|
/* 58 HILSEN_IFCACF */
|
2007-03-01 04:51:29 +00:00
|
|
|
OUT(HIL_PKT_CMD | HIL_CMD_IFC)
|
2005-04-16 22:20:36 +00:00
|
|
|
EXPECT(HIL_PKT_CMD | HIL_CMD_IFC | HIL_ERR_INT,
|
|
|
|
20000, HILSEN_ACF2, HILSEN_DHR2, HILSEN_HEAL)
|
|
|
|
|
|
|
|
/* 60 HILSEN_END */
|
|
|
|
};
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static inline void hilse_setup_input(hil_mlc *mlc, const struct hilse_node *node)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
switch (node->act) {
|
|
|
|
case HILSE_EXPECT_DISC:
|
|
|
|
mlc->imatch = node->object.packet;
|
|
|
|
mlc->imatch |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
|
|
|
|
break;
|
|
|
|
case HILSE_EXPECT_LAST:
|
|
|
|
mlc->imatch = node->object.packet;
|
|
|
|
mlc->imatch |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
|
|
|
|
break;
|
|
|
|
case HILSE_EXPECT:
|
|
|
|
mlc->imatch = node->object.packet;
|
|
|
|
break;
|
|
|
|
case HILSE_IN:
|
|
|
|
mlc->imatch = 0;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
mlc->istarted = 1;
|
2018-01-02 05:31:18 +00:00
|
|
|
mlc->intimeout = usecs_to_jiffies(node->arg);
|
|
|
|
mlc->instart = jiffies;
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->icount = 15;
|
|
|
|
memset(mlc->ipacket, 0, 16 * sizeof(hil_packet));
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(down_trylock(&mlc->isem));
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
2007-03-01 04:51:29 +00:00
|
|
|
static int doze;
|
2005-04-16 22:20:36 +00:00
|
|
|
static int seidx; /* For debug */
|
|
|
|
#endif
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hilse_donode(hil_mlc *mlc)
|
|
|
|
{
|
2007-03-01 04:51:19 +00:00
|
|
|
const struct hilse_node *node;
|
2005-04-16 22:20:36 +00:00
|
|
|
int nextidx = 0;
|
|
|
|
int sched_long = 0;
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->seidx && mlc->seidx != seidx &&
|
|
|
|
mlc->seidx != 41 && mlc->seidx != 42 && mlc->seidx != 43) {
|
|
|
|
printk(KERN_DEBUG PREFIX "z%i \n {%i}", doze, mlc->seidx);
|
2005-04-16 22:20:36 +00:00
|
|
|
doze = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
seidx = mlc->seidx;
|
|
|
|
#endif
|
|
|
|
node = hil_mlc_se + mlc->seidx;
|
|
|
|
|
|
|
|
switch (node->act) {
|
|
|
|
int rc;
|
|
|
|
hil_packet pack;
|
|
|
|
|
|
|
|
case HILSE_FUNC:
|
2007-03-01 04:51:19 +00:00
|
|
|
BUG_ON(node->object.func == NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
rc = node->object.func(mlc, node->arg);
|
2007-03-01 04:51:29 +00:00
|
|
|
nextidx = (rc > 0) ? node->ugly :
|
2005-04-16 22:20:36 +00:00
|
|
|
((rc < 0) ? node->bad : node->good);
|
2007-03-01 04:51:29 +00:00
|
|
|
if (nextidx == HILSEN_FOLLOW)
|
|
|
|
nextidx = rc;
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
case HILSE_EXPECT_LAST:
|
|
|
|
case HILSE_EXPECT_DISC:
|
|
|
|
case HILSE_EXPECT:
|
|
|
|
case HILSE_IN:
|
|
|
|
/* Already set up from previous HILSE_OUT_* */
|
2007-03-01 04:51:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
rc = mlc->in(mlc, node->arg);
|
|
|
|
if (rc == 2) {
|
|
|
|
nextidx = HILSEN_DOZE;
|
|
|
|
sched_long = 1;
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
|
|
|
}
|
2007-03-01 04:51:29 +00:00
|
|
|
if (rc == 1)
|
|
|
|
nextidx = node->ugly;
|
|
|
|
else if (rc == 0)
|
|
|
|
nextidx = node->good;
|
|
|
|
else
|
|
|
|
nextidx = node->bad;
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->istarted = 0;
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
case HILSE_OUT_LAST:
|
2007-03-01 04:51:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
pack = node->object.packet;
|
|
|
|
pack |= ((mlc->ddi + 1) << HIL_PKT_ADDR_SHIFT);
|
|
|
|
goto out;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
case HILSE_OUT_DISC:
|
2007-03-01 04:51:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
pack = node->object.packet;
|
|
|
|
pack |= ((mlc->ddi + 2) << HIL_PKT_ADDR_SHIFT);
|
|
|
|
goto out;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
case HILSE_OUT:
|
2007-03-01 04:51:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
pack = node->object.packet;
|
|
|
|
out:
|
2012-11-10 08:47:13 +00:00
|
|
|
if (!mlc->istarted) {
|
|
|
|
/* Prepare to receive input */
|
|
|
|
if ((node + 1)->act & HILSE_IN)
|
|
|
|
hilse_setup_input(mlc, node + 1);
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
if (down_trylock(&mlc->osem)) {
|
|
|
|
nextidx = HILSEN_DOZE;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
up(&mlc->osem);
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
|
|
|
if (!mlc->ostarted) {
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->ostarted = 1;
|
|
|
|
mlc->opacket = pack;
|
2020-10-19 14:57:50 +00:00
|
|
|
rc = mlc->out(mlc);
|
2005-04-16 22:20:36 +00:00
|
|
|
nextidx = HILSEN_DOZE;
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2020-10-19 14:57:50 +00:00
|
|
|
if (rc) {
|
|
|
|
hil_mlc_stop = 1;
|
|
|
|
return 1;
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
mlc->ostarted = 0;
|
2018-01-02 05:31:18 +00:00
|
|
|
mlc->instart = jiffies;
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
nextidx = HILSEN_NEXT;
|
|
|
|
break;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
case HILSE_CTS:
|
2007-03-16 04:59:29 +00:00
|
|
|
write_lock_irqsave(&mlc->lock, flags);
|
2020-10-19 14:57:50 +00:00
|
|
|
rc = mlc->cts(mlc);
|
|
|
|
nextidx = rc ? node->bad : node->good;
|
2007-03-16 04:59:29 +00:00
|
|
|
write_unlock_irqrestore(&mlc->lock, flags);
|
2020-10-19 14:57:50 +00:00
|
|
|
if (rc) {
|
|
|
|
hil_mlc_stop = 1;
|
|
|
|
return 1;
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
2007-03-01 04:51:29 +00:00
|
|
|
if (nextidx == HILSEN_DOZE)
|
|
|
|
doze++;
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
while (nextidx & HILSEN_SCHED) {
|
2018-01-02 05:31:18 +00:00
|
|
|
unsigned long now = jiffies;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
if (!sched_long)
|
|
|
|
goto sched;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2018-01-02 05:31:18 +00:00
|
|
|
if (time_after(now, mlc->instart + mlc->intimeout))
|
|
|
|
goto sched;
|
|
|
|
mod_timer(&hil_mlcs_kicker, mlc->instart + mlc->intimeout);
|
2005-04-16 22:20:36 +00:00
|
|
|
break;
|
|
|
|
sched:
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
|
|
break;
|
2007-03-01 04:51:29 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (nextidx & HILSEN_DOWN)
|
|
|
|
mlc->seidx += nextidx & HILSEN_MASK;
|
|
|
|
else if (nextidx & HILSEN_UP)
|
|
|
|
mlc->seidx -= nextidx & HILSEN_MASK;
|
|
|
|
else
|
|
|
|
mlc->seidx = nextidx & HILSEN_MASK;
|
|
|
|
|
|
|
|
if (nextidx & HILSEN_BREAK)
|
|
|
|
return 1;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/******************** tasklet context functions **************************/
|
2007-03-01 04:51:29 +00:00
|
|
|
static void hil_mlcs_process(unsigned long unused)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
struct list_head *tmp;
|
|
|
|
|
|
|
|
read_lock(&hil_mlcs_lock);
|
|
|
|
list_for_each(tmp, &hil_mlcs) {
|
|
|
|
struct hil_mlc *mlc = list_entry(tmp, hil_mlc, list);
|
|
|
|
while (hilse_donode(mlc) == 0) {
|
|
|
|
#ifdef HIL_MLC_DEBUG
|
2007-03-01 04:51:29 +00:00
|
|
|
if (mlc->seidx != 41 &&
|
|
|
|
mlc->seidx != 42 &&
|
|
|
|
mlc->seidx != 43)
|
|
|
|
printk(KERN_DEBUG PREFIX " + ");
|
2005-04-16 22:20:36 +00:00
|
|
|
#endif
|
2007-03-01 04:51:29 +00:00
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
read_unlock(&hil_mlcs_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************* Keepalive timer task *********************/
|
|
|
|
|
2017-10-24 16:44:15 +00:00
|
|
|
static void hil_mlcs_timer(struct timer_list *unused)
|
2007-03-01 04:51:29 +00:00
|
|
|
{
|
2020-10-19 14:57:50 +00:00
|
|
|
if (hil_mlc_stop) {
|
|
|
|
/* could not send packet - stop immediately. */
|
|
|
|
pr_warn(PREFIX "HIL seems stuck - Disabling HIL MLC.\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
hil_mlcs_probe = 1;
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
|
|
/* Re-insert the periodic task. */
|
|
|
|
if (!timer_pending(&hil_mlcs_kicker))
|
|
|
|
mod_timer(&hil_mlcs_kicker, jiffies + HZ);
|
|
|
|
}
|
|
|
|
|
|
|
|
/******************** user/kernel context functions **********************/
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hil_mlc_serio_write(struct serio *serio, unsigned char c)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
struct hil_mlc_serio_map *map;
|
|
|
|
struct hil_mlc *mlc;
|
|
|
|
struct serio_driver *drv;
|
|
|
|
uint8_t *idx, *last;
|
|
|
|
|
|
|
|
map = serio->port_data;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(map == NULL);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc = map->mlc;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(mlc == NULL);
|
|
|
|
|
|
|
|
mlc->serio_opacket[map->didx] |=
|
2005-04-16 22:20:36 +00:00
|
|
|
((hil_packet)c) << (8 * (3 - mlc->serio_oidx[map->didx]));
|
|
|
|
|
|
|
|
if (mlc->serio_oidx[map->didx] >= 3) {
|
|
|
|
/* for now only commands */
|
2007-03-01 04:51:29 +00:00
|
|
|
if (!(mlc->serio_opacket[map->didx] & HIL_PKT_CMD))
|
2005-04-16 22:20:36 +00:00
|
|
|
return -EIO;
|
|
|
|
switch (mlc->serio_opacket[map->didx] & HIL_PKT_DATA_MASK) {
|
|
|
|
case HIL_CMD_IDD:
|
|
|
|
idx = mlc->di[map->didx].idd;
|
|
|
|
goto emu;
|
|
|
|
case HIL_CMD_RSC:
|
|
|
|
idx = mlc->di[map->didx].rsc;
|
|
|
|
goto emu;
|
|
|
|
case HIL_CMD_EXD:
|
|
|
|
idx = mlc->di[map->didx].exd;
|
|
|
|
goto emu;
|
|
|
|
case HIL_CMD_RNM:
|
|
|
|
idx = mlc->di[map->didx].rnm;
|
|
|
|
goto emu;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
mlc->serio_oidx[map->didx] = 0;
|
|
|
|
mlc->serio_opacket[map->didx] = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
mlc->serio_oidx[map->didx]++;
|
|
|
|
return -EIO;
|
|
|
|
emu:
|
|
|
|
drv = serio->drv;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(drv == NULL);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
last = idx + 15;
|
2007-03-01 04:51:29 +00:00
|
|
|
while ((last != idx) && (*last == 0))
|
|
|
|
last--;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
while (idx != last) {
|
2006-10-07 02:47:23 +00:00
|
|
|
drv->interrupt(serio, 0, 0);
|
|
|
|
drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
|
|
|
|
drv->interrupt(serio, 0, 0);
|
|
|
|
drv->interrupt(serio, *idx, 0);
|
2005-04-16 22:20:36 +00:00
|
|
|
idx++;
|
|
|
|
}
|
2006-10-07 02:47:23 +00:00
|
|
|
drv->interrupt(serio, 0, 0);
|
|
|
|
drv->interrupt(serio, HIL_ERR_INT >> 16, 0);
|
|
|
|
drv->interrupt(serio, HIL_PKT_CMD >> 8, 0);
|
|
|
|
drv->interrupt(serio, *idx, 0);
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->serio_oidx[map->didx] = 0;
|
|
|
|
mlc->serio_opacket[map->didx] = 0;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static int hil_mlc_serio_open(struct serio *serio)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
struct hil_mlc_serio_map *map;
|
|
|
|
struct hil_mlc *mlc;
|
|
|
|
|
2005-10-22 02:58:51 +00:00
|
|
|
if (serio_get_drvdata(serio) != NULL)
|
|
|
|
return -EBUSY;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
map = serio->port_data;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(map == NULL);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc = map->mlc;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(mlc == NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
static void hil_mlc_serio_close(struct serio *serio)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
struct hil_mlc_serio_map *map;
|
|
|
|
struct hil_mlc *mlc;
|
|
|
|
|
|
|
|
map = serio->port_data;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(map == NULL);
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc = map->mlc;
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(mlc == NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2005-10-22 02:58:51 +00:00
|
|
|
serio_set_drvdata(serio, NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
serio->drv = NULL;
|
|
|
|
/* TODO wake up interruptable */
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:19 +00:00
|
|
|
static const struct serio_device_id hil_mlc_serio_id = {
|
2005-10-22 02:58:51 +00:00
|
|
|
.type = SERIO_HIL_MLC,
|
|
|
|
.proto = SERIO_HIL,
|
|
|
|
.extra = SERIO_ANY,
|
|
|
|
.id = SERIO_ANY,
|
|
|
|
};
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
int hil_mlc_register(hil_mlc *mlc)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
2007-03-01 04:51:29 +00:00
|
|
|
unsigned long flags;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(mlc == NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
mlc->istarted = 0;
|
2007-03-01 04:51:29 +00:00
|
|
|
mlc->ostarted = 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
rwlock_init(&mlc->lock);
|
2010-09-07 14:32:01 +00:00
|
|
|
sema_init(&mlc->osem, 1);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2010-09-07 14:32:01 +00:00
|
|
|
sema_init(&mlc->isem, 1);
|
2007-03-01 04:51:29 +00:00
|
|
|
mlc->icount = -1;
|
|
|
|
mlc->imatch = 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
mlc->opercnt = 0;
|
|
|
|
|
2010-09-07 14:32:01 +00:00
|
|
|
sema_init(&(mlc->csem), 0);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
hil_mlc_clear_di_scratch(mlc);
|
|
|
|
hil_mlc_clear_di_map(mlc, 0);
|
|
|
|
for (i = 0; i < HIL_MLC_DEVMEM; i++) {
|
|
|
|
struct serio *mlc_serio;
|
|
|
|
hil_mlc_copy_di_scratch(mlc, i);
|
2006-03-14 05:09:16 +00:00
|
|
|
mlc_serio = kzalloc(sizeof(*mlc_serio), GFP_KERNEL);
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc->serio[i] = mlc_serio;
|
2010-11-20 21:36:49 +00:00
|
|
|
if (!mlc->serio[i]) {
|
|
|
|
for (; i >= 0; i--)
|
|
|
|
kfree(mlc->serio[i]);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
2007-03-01 04:51:19 +00:00
|
|
|
snprintf(mlc_serio->name, sizeof(mlc_serio->name)-1, "HIL_SERIO%d", i);
|
|
|
|
snprintf(mlc_serio->phys, sizeof(mlc_serio->phys)-1, "HIL%d", i);
|
2005-10-22 02:58:51 +00:00
|
|
|
mlc_serio->id = hil_mlc_serio_id;
|
2008-12-29 12:44:44 +00:00
|
|
|
mlc_serio->id.id = i; /* HIL port no. */
|
2005-04-16 22:20:36 +00:00
|
|
|
mlc_serio->write = hil_mlc_serio_write;
|
|
|
|
mlc_serio->open = hil_mlc_serio_open;
|
|
|
|
mlc_serio->close = hil_mlc_serio_close;
|
|
|
|
mlc_serio->port_data = &(mlc->serio_map[i]);
|
|
|
|
mlc->serio_map[i].mlc = mlc;
|
|
|
|
mlc->serio_map[i].didx = i;
|
|
|
|
mlc->serio_map[i].di_revmap = -1;
|
|
|
|
mlc->serio_opacket[i] = 0;
|
|
|
|
mlc->serio_oidx[i] = 0;
|
|
|
|
serio_register_port(mlc_serio);
|
|
|
|
}
|
|
|
|
|
|
|
|
mlc->tasklet = &hil_mlcs_tasklet;
|
|
|
|
|
|
|
|
write_lock_irqsave(&hil_mlcs_lock, flags);
|
|
|
|
list_add_tail(&mlc->list, &hil_mlcs);
|
|
|
|
mlc->seidx = HILSEN_START;
|
|
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
|
|
|
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
int hil_mlc_unregister(hil_mlc *mlc)
|
|
|
|
{
|
2005-04-16 22:20:36 +00:00
|
|
|
struct list_head *tmp;
|
2007-03-01 04:51:29 +00:00
|
|
|
unsigned long flags;
|
2005-04-16 22:20:36 +00:00
|
|
|
int i;
|
|
|
|
|
2007-03-01 04:51:29 +00:00
|
|
|
BUG_ON(mlc == NULL);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
write_lock_irqsave(&hil_mlcs_lock, flags);
|
2007-03-01 04:51:29 +00:00
|
|
|
list_for_each(tmp, &hil_mlcs)
|
2005-04-16 22:20:36 +00:00
|
|
|
if (list_entry(tmp, hil_mlc, list) == mlc)
|
|
|
|
goto found;
|
|
|
|
|
|
|
|
/* not found in list */
|
|
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
found:
|
|
|
|
list_del(tmp);
|
2007-03-01 04:51:29 +00:00
|
|
|
write_unlock_irqrestore(&hil_mlcs_lock, flags);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
for (i = 0; i < HIL_MLC_DEVMEM; i++) {
|
|
|
|
serio_unregister_port(mlc->serio[i]);
|
|
|
|
mlc->serio[i] = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
tasklet_schedule(&hil_mlcs_tasklet);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**************************** Module interface *************************/
|
|
|
|
|
|
|
|
static int __init hil_mlc_init(void)
|
|
|
|
{
|
2017-10-24 16:44:15 +00:00
|
|
|
timer_setup(&hil_mlcs_kicker, &hil_mlcs_timer, 0);
|
2009-12-12 05:39:51 +00:00
|
|
|
mod_timer(&hil_mlcs_kicker, jiffies + HZ);
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
tasklet_enable(&hil_mlcs_tasklet);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
static void __exit hil_mlc_exit(void)
|
|
|
|
{
|
2009-12-12 05:39:51 +00:00
|
|
|
del_timer_sync(&hil_mlcs_kicker);
|
2005-04-16 22:20:36 +00:00
|
|
|
tasklet_kill(&hil_mlcs_tasklet);
|
|
|
|
}
|
2007-03-01 04:51:29 +00:00
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
module_init(hil_mlc_init);
|
|
|
|
module_exit(hil_mlc_exit);
|