2020-09-22 13:31:03 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header is for implementations of dma_map_ops and related code.
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* It should not be included in drivers just using the DMA API.
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*/
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#ifndef _LINUX_DMA_MAP_OPS_H
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#define _LINUX_DMA_MAP_OPS_H
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#include <linux/dma-mapping.h>
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2020-09-22 13:36:11 +00:00
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#include <linux/pgtable.h>
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2020-09-22 13:31:03 +00:00
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2020-09-11 08:56:52 +00:00
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struct cma;
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2020-09-22 13:31:03 +00:00
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struct dma_map_ops {
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void *(*alloc)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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unsigned long attrs);
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void (*free)(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs);
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struct page *(*alloc_pages)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, enum dma_data_direction dir,
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gfp_t gfp);
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void (*free_pages)(struct device *dev, size_t size, struct page *vaddr,
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dma_addr_t dma_handle, enum dma_data_direction dir);
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void *(*alloc_noncoherent)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, enum dma_data_direction dir,
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gfp_t gfp);
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void (*free_noncoherent)(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, enum dma_data_direction dir);
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int (*mmap)(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t, unsigned long attrs);
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int (*get_sgtable)(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir, unsigned long attrs);
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void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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/*
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* map_sg returns 0 on error and a value > 0 on success.
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* It should never return a value < 0.
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*/
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int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents,
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enum dma_data_direction dir, unsigned long attrs);
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dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs);
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void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir);
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void (*sync_single_for_device)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir);
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void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir);
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void (*cache_sync)(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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int (*dma_supported)(struct device *dev, u64 mask);
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u64 (*get_required_mask)(struct device *dev);
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size_t (*max_mapping_size)(struct device *dev);
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unsigned long (*get_merge_boundary)(struct device *dev);
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};
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#ifdef CONFIG_DMA_OPS
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#include <asm/dma-mapping.h>
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static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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if (dev->dma_ops)
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return dev->dma_ops;
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return get_arch_dma_ops(dev->bus);
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}
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static inline void set_dma_ops(struct device *dev,
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const struct dma_map_ops *dma_ops)
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{
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dev->dma_ops = dma_ops;
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}
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#else /* CONFIG_DMA_OPS */
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static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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return NULL;
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}
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static inline void set_dma_ops(struct device *dev,
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const struct dma_map_ops *dma_ops)
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{
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}
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#endif /* CONFIG_DMA_OPS */
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2020-09-11 08:56:52 +00:00
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#ifdef CONFIG_DMA_CMA
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extern struct cma *dma_contiguous_default_area;
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static inline struct cma *dev_get_cma_area(struct device *dev)
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{
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if (dev && dev->cma_area)
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return dev->cma_area;
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return dma_contiguous_default_area;
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}
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void dma_contiguous_reserve(phys_addr_t addr_limit);
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int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base,
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phys_addr_t limit, struct cma **res_cma, bool fixed);
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struct page *dma_alloc_from_contiguous(struct device *dev, size_t count,
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unsigned int order, bool no_warn);
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bool dma_release_from_contiguous(struct device *dev, struct page *pages,
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int count);
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struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp);
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void dma_free_contiguous(struct device *dev, struct page *page, size_t size);
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2020-09-11 09:04:43 +00:00
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void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size);
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2020-09-11 08:56:52 +00:00
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#else /* CONFIG_DMA_CMA */
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static inline struct cma *dev_get_cma_area(struct device *dev)
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{
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return NULL;
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}
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static inline void dma_contiguous_reserve(phys_addr_t limit)
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{
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}
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static inline int dma_contiguous_reserve_area(phys_addr_t size,
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phys_addr_t base, phys_addr_t limit, struct cma **res_cma,
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bool fixed)
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{
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return -ENOSYS;
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}
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static inline struct page *dma_alloc_from_contiguous(struct device *dev,
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size_t count, unsigned int order, bool no_warn)
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{
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return NULL;
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}
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static inline bool dma_release_from_contiguous(struct device *dev,
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struct page *pages, int count)
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{
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return false;
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}
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/* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */
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static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size,
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gfp_t gfp)
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{
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return NULL;
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}
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static inline void dma_free_contiguous(struct device *dev, struct page *page,
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size_t size)
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{
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__free_pages(page, get_order(size));
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}
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#endif /* CONFIG_DMA_CMA*/
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#ifdef CONFIG_DMA_PERNUMA_CMA
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void dma_pernuma_cma_reserve(void);
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#else
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static inline void dma_pernuma_cma_reserve(void) { }
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#endif /* CONFIG_DMA_PERNUMA_CMA */
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2020-09-22 13:31:03 +00:00
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#ifdef CONFIG_DMA_DECLARE_COHERENT
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int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
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dma_addr_t device_addr, size_t size);
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int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle, void **ret);
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int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr);
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int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret);
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void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle);
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int dma_release_from_global_coherent(int order, void *vaddr);
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int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr,
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size_t size, int *ret);
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#else
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static inline int dma_declare_coherent_memory(struct device *dev,
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phys_addr_t phys_addr, dma_addr_t device_addr, size_t size)
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{
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return -ENOSYS;
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}
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#define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0)
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#define dma_release_from_dev_coherent(dev, order, vaddr) (0)
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#define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0)
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static inline void *dma_alloc_from_global_coherent(struct device *dev,
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ssize_t size, dma_addr_t *dma_handle)
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{
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return NULL;
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}
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static inline int dma_release_from_global_coherent(int order, void *vaddr)
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{
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return 0;
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}
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static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret)
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{
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return 0;
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}
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#endif /* CONFIG_DMA_DECLARE_COHERENT */
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2020-10-20 08:41:07 +00:00
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int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs);
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struct page *dma_common_alloc_pages(struct device *dev, size_t size,
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dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp);
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void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr,
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dma_addr_t dma_handle, enum dma_data_direction dir);
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struct page **dma_common_find_pages(void *cpu_addr);
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void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot,
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const void *caller);
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void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot,
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const void *caller);
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void dma_common_free_remap(void *cpu_addr, size_t size);
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struct page *dma_alloc_from_pool(struct device *dev, size_t size,
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void **cpu_addr, gfp_t flags,
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bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t));
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bool dma_free_from_pool(struct device *dev, void *start, size_t size);
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2020-09-22 13:36:11 +00:00
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#ifdef CONFIG_ARCH_HAS_DMA_COHERENCE_H
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#include <asm/dma-coherence.h>
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#elif defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
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defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
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static inline bool dev_is_dma_coherent(struct device *dev)
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{
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return dev->dma_coherent;
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}
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#else
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static inline bool dev_is_dma_coherent(struct device *dev)
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{
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return true;
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}
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#endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp, unsigned long attrs);
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void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs);
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#ifdef CONFIG_MMU
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/*
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* Page protection so that devices that can't snoop CPU caches can use the
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* memory coherently. We default to pgprot_noncached which is usually used
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* for ioremap as a safe bet, but architectures can override this with less
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* strict semantics if possible.
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*/
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#ifndef pgprot_dmacoherent
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#define pgprot_dmacoherent(prot) pgprot_noncached(prot)
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#endif
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pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs);
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#else
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static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot,
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unsigned long attrs)
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{
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return prot; /* no protection bits supported without page tables */
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}
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#endif /* CONFIG_MMU */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE
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void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir);
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#else
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static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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}
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#endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU
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void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir);
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#else
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static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
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enum dma_data_direction dir)
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{
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}
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#endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */
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#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
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void arch_sync_dma_for_cpu_all(void);
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#else
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static inline void arch_sync_dma_for_cpu_all(void)
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{
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}
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#endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */
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#ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT
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void arch_dma_prep_coherent(struct page *page, size_t size);
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#else
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static inline void arch_dma_prep_coherent(struct page *page, size_t size)
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{
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}
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#endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */
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#ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN
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void arch_dma_mark_clean(phys_addr_t paddr, size_t size);
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#else
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static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
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{
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}
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#endif /* ARCH_HAS_DMA_MARK_CLEAN */
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void *arch_dma_set_uncached(void *addr, size_t size);
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void arch_dma_clear_uncached(void *addr, size_t size);
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2020-09-22 13:31:03 +00:00
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#ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS
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void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
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const struct iommu_ops *iommu, bool coherent);
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#else
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 size, const struct iommu_ops *iommu, bool coherent)
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{
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}
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#endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */
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#ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS
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void arch_teardown_dma_ops(struct device *dev);
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#else
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static inline void arch_teardown_dma_ops(struct device *dev)
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{
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}
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#endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */
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2020-09-11 08:12:44 +00:00
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#ifdef CONFIG_DMA_API_DEBUG
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void dma_debug_add_bus(struct bus_type *bus);
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void debug_dma_dump_mappings(struct device *dev);
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#else
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static inline void dma_debug_add_bus(struct bus_type *bus)
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{
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}
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static inline void debug_dma_dump_mappings(struct device *dev)
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{
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}
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#endif /* CONFIG_DMA_API_DEBUG */
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2020-09-22 13:31:03 +00:00
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extern const struct dma_map_ops dma_dummy_ops;
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#endif /* _LINUX_DMA_MAP_OPS_H */
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