2017-05-04 19:28:30 +00:00
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/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Author: Huang Rui
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*
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*/
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#ifndef __PSP_V10_0_H__
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#define __PSP_V10_0_H__
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#include "amdgpu_psp.h"
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2017-07-14 10:31:18 +00:00
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extern int psp_v10_0_init_microcode(struct psp_context *psp);
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2017-05-04 19:28:30 +00:00
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extern int psp_v10_0_prep_cmd_buf(struct amdgpu_firmware_info *ucode,
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struct psp_gfx_cmd_resp *cmd);
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extern int psp_v10_0_ring_init(struct psp_context *psp,
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enum psp_ring_type ring_type);
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2017-07-14 10:34:48 +00:00
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extern int psp_v10_0_ring_create(struct psp_context *psp,
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enum psp_ring_type ring_type);
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2017-09-08 05:04:52 +00:00
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extern int psp_v10_0_ring_stop(struct psp_context *psp,
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enum psp_ring_type ring_type);
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2017-07-14 10:37:44 +00:00
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extern int psp_v10_0_ring_destroy(struct psp_context *psp,
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enum psp_ring_type ring_type);
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2017-05-04 19:28:30 +00:00
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extern int psp_v10_0_cmd_submit(struct psp_context *psp,
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struct amdgpu_firmware_info *ucode,
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uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr,
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int index);
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extern bool psp_v10_0_compare_sram_data(struct psp_context *psp,
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struct amdgpu_firmware_info *ucode,
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enum AMDGPU_UCODE_ID ucode_type);
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2017-09-14 08:25:19 +00:00
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extern int psp_v10_0_mode1_reset(struct psp_context *psp);
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2017-05-04 19:28:30 +00:00
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#endif
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