2018-08-02 01:10:26 +00:00
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// SPDX-License-Identifier: GPL-2.0
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#include "vkms_drv.h"
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#include <linux/crc32.h>
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2018-09-06 05:18:26 +00:00
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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2018-08-02 01:10:26 +00:00
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#include <drm/drm_gem_framebuffer_helper.h>
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2018-09-06 05:18:26 +00:00
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/**
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* compute_crc - Compute CRC value on output frame
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*
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* @vaddr_out: address to final framebuffer
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* @crc_out: framebuffer's metadata
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*
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* returns CRC value computed using crc32 on the visible portion of
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* the final framebuffer at vaddr_out
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*/
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static uint32_t compute_crc(void *vaddr_out, struct vkms_crc_data *crc_out)
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{
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int i, j, src_offset;
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int x_src = crc_out->src.x1 >> 16;
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int y_src = crc_out->src.y1 >> 16;
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int h_src = drm_rect_height(&crc_out->src) >> 16;
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int w_src = drm_rect_width(&crc_out->src) >> 16;
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u32 crc = 0;
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for (i = y_src; i < y_src + h_src; ++i) {
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for (j = x_src; j < x_src + w_src; ++j) {
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src_offset = crc_out->offset
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+ (i * crc_out->pitch)
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+ (j * crc_out->cpp);
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/* XRGB format ignores Alpha channel */
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memset(vaddr_out + src_offset + 24, 0, 8);
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crc = crc32_le(crc, vaddr_out + src_offset,
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sizeof(u32));
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}
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}
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return crc;
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}
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/**
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* blend - belnd value at vaddr_src with value at vaddr_dst
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* @vaddr_dst: destination address
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* @vaddr_src: source address
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* @crc_dst: destination framebuffer's metadata
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* @crc_src: source framebuffer's metadata
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*
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* Blend value at vaddr_src with value at vaddr_dst.
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* Currently, this function write value at vaddr_src on value
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* at vaddr_dst using buffer's metadata to locate the new values
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* from vaddr_src and their distenation at vaddr_dst.
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*
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* Todo: Use the alpha value to blend vaddr_src with vaddr_dst
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* instead of overwriting it.
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*/
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static void blend(void *vaddr_dst, void *vaddr_src,
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struct vkms_crc_data *crc_dst,
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struct vkms_crc_data *crc_src)
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2018-08-02 01:10:26 +00:00
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{
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2018-09-06 05:18:26 +00:00
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int i, j, j_dst, i_dst;
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int offset_src, offset_dst;
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int x_src = crc_src->src.x1 >> 16;
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int y_src = crc_src->src.y1 >> 16;
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int x_dst = crc_src->dst.x1;
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int y_dst = crc_src->dst.y1;
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int h_dst = drm_rect_height(&crc_src->dst);
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int w_dst = drm_rect_width(&crc_src->dst);
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int y_limit = y_src + h_dst;
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int x_limit = x_src + w_dst;
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for (i = y_src, i_dst = y_dst; i < y_limit; ++i) {
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for (j = x_src, j_dst = x_dst; j < x_limit; ++j) {
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offset_dst = crc_dst->offset
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+ (i_dst * crc_dst->pitch)
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+ (j_dst++ * crc_dst->cpp);
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offset_src = crc_src->offset
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+ (i * crc_src->pitch)
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+ (j * crc_src->cpp);
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memcpy(vaddr_dst + offset_dst,
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vaddr_src + offset_src, sizeof(u32));
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}
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i_dst++;
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}
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}
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static void compose_cursor(struct vkms_crc_data *cursor_crc,
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struct vkms_crc_data *primary_crc, void *vaddr_out)
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{
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struct drm_gem_object *cursor_obj;
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struct vkms_gem_object *cursor_vkms_obj;
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cursor_obj = drm_gem_fb_get_obj(&cursor_crc->fb, 0);
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cursor_vkms_obj = drm_gem_to_vkms_gem(cursor_obj);
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mutex_lock(&cursor_vkms_obj->pages_lock);
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if (!cursor_vkms_obj->vaddr) {
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DRM_WARN("cursor plane vaddr is NULL");
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goto out;
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}
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blend(vaddr_out, cursor_vkms_obj->vaddr, primary_crc, cursor_crc);
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out:
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mutex_unlock(&cursor_vkms_obj->pages_lock);
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}
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static uint32_t _vkms_get_crc(struct vkms_crc_data *primary_crc,
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struct vkms_crc_data *cursor_crc)
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{
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struct drm_framebuffer *fb = &primary_crc->fb;
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2018-08-02 01:10:26 +00:00
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struct drm_gem_object *gem_obj = drm_gem_fb_get_obj(fb, 0);
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struct vkms_gem_object *vkms_obj = drm_gem_to_vkms_gem(gem_obj);
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2018-09-06 05:18:26 +00:00
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void *vaddr_out = kzalloc(vkms_obj->gem.size, GFP_KERNEL);
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2018-08-02 01:10:26 +00:00
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u32 crc = 0;
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2018-09-06 05:18:26 +00:00
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if (!vaddr_out) {
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DRM_ERROR("Failed to allocate memory for output frame.");
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return 0;
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}
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2018-08-02 01:10:26 +00:00
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2018-09-06 05:18:26 +00:00
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mutex_lock(&vkms_obj->pages_lock);
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if (WARN_ON(!vkms_obj->vaddr)) {
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mutex_unlock(&vkms_obj->pages_lock);
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return crc;
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2018-08-02 01:10:26 +00:00
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}
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2018-09-06 05:18:26 +00:00
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memcpy(vaddr_out, vkms_obj->vaddr, vkms_obj->gem.size);
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2018-08-03 20:11:42 +00:00
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mutex_unlock(&vkms_obj->pages_lock);
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2018-09-06 05:18:26 +00:00
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if (cursor_crc)
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compose_cursor(cursor_crc, primary_crc, vaddr_out);
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crc = compute_crc(vaddr_out, primary_crc);
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kfree(vaddr_out);
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2018-08-02 01:10:26 +00:00
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return crc;
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}
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2018-09-03 21:18:17 +00:00
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/**
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* vkms_crc_work_handle - ordered work_struct to compute CRC
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*
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* @work: work_struct
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*
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* Work handler for computing CRCs. work_struct scheduled in
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* an ordered workqueue that's periodically scheduled to run by
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* _vblank_handle() and flushed at vkms_atomic_crtc_destroy_state().
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*/
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2018-08-02 01:10:26 +00:00
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void vkms_crc_work_handle(struct work_struct *work)
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{
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struct vkms_crtc_state *crtc_state = container_of(work,
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struct vkms_crtc_state,
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crc_work);
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struct drm_crtc *crtc = crtc_state->base.crtc;
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struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
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struct vkms_device *vdev = container_of(out, struct vkms_device,
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output);
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struct vkms_crc_data *primary_crc = NULL;
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2018-09-06 05:18:26 +00:00
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struct vkms_crc_data *cursor_crc = NULL;
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2018-08-02 01:10:26 +00:00
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struct drm_plane *plane;
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u32 crc32 = 0;
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2018-09-03 21:18:17 +00:00
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u64 frame_start, frame_end;
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unsigned long flags;
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spin_lock_irqsave(&out->state_lock, flags);
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frame_start = crtc_state->frame_start;
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frame_end = crtc_state->frame_end;
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spin_unlock_irqrestore(&out->state_lock, flags);
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/* _vblank_handle() hasn't updated frame_start yet */
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if (!frame_start || frame_start == frame_end)
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goto out;
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2018-08-02 01:10:26 +00:00
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drm_for_each_plane(plane, &vdev->drm) {
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struct vkms_plane_state *vplane_state;
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struct vkms_crc_data *crc_data;
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vplane_state = to_vkms_plane_state(plane->state);
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crc_data = vplane_state->crc_data;
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if (drm_framebuffer_read_refcount(&crc_data->fb) == 0)
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continue;
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2018-09-06 05:18:26 +00:00
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if (plane->type == DRM_PLANE_TYPE_PRIMARY)
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2018-08-02 01:10:26 +00:00
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primary_crc = crc_data;
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2018-09-06 05:18:26 +00:00
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else
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cursor_crc = crc_data;
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2018-08-02 01:10:26 +00:00
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}
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if (primary_crc)
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2018-09-06 05:18:26 +00:00
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crc32 = _vkms_get_crc(primary_crc, cursor_crc);
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2018-08-02 01:10:26 +00:00
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2018-09-03 21:18:17 +00:00
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frame_end = drm_crtc_accurate_vblank_count(crtc);
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/* queue_work can fail to schedule crc_work; add crc for
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* missing frames
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*/
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while (frame_start <= frame_end)
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drm_crtc_add_crc_entry(crtc, true, frame_start++, &crc32);
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out:
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/* to avoid using the same value for frame number again */
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spin_lock_irqsave(&out->state_lock, flags);
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crtc_state->frame_end = frame_end;
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crtc_state->frame_start = 0;
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spin_unlock_irqrestore(&out->state_lock, flags);
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2018-08-02 01:10:26 +00:00
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}
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2018-08-21 08:38:55 +00:00
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static int vkms_crc_parse_source(const char *src_name, bool *enabled)
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{
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int ret = 0;
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if (!src_name) {
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*enabled = false;
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} else if (strcmp(src_name, "auto") == 0) {
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*enabled = true;
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} else {
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*enabled = false;
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ret = -EINVAL;
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}
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return ret;
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}
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int vkms_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
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size_t *values_cnt)
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{
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bool enabled;
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if (vkms_crc_parse_source(src_name, &enabled) < 0) {
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DRM_DEBUG_DRIVER("unknown source %s\n", src_name);
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return -EINVAL;
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}
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*values_cnt = 1;
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return 0;
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}
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2018-08-21 08:38:56 +00:00
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int vkms_set_crc_source(struct drm_crtc *crtc, const char *src_name)
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2018-08-02 01:10:26 +00:00
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{
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struct vkms_output *out = drm_crtc_to_vkms_output(crtc);
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bool enabled = false;
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unsigned long flags;
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int ret = 0;
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2018-08-21 08:38:55 +00:00
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ret = vkms_crc_parse_source(src_name, &enabled);
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2018-08-02 01:10:26 +00:00
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/* make sure nothing is scheduled on crtc workq */
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flush_workqueue(out->crc_workq);
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spin_lock_irqsave(&out->lock, flags);
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out->crc_enabled = enabled;
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spin_unlock_irqrestore(&out->lock, flags);
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return ret;
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}
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