2022-06-07 14:11:14 +00:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2009-04-22 19:08:17 +00:00
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#ifndef __ASM_ARCH_BRIDGE_REGS_H
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#define __ASM_ARCH_BRIDGE_REGS_H
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2015-12-02 21:27:06 +00:00
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#include "mv78xx0.h"
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2009-04-22 19:08:17 +00:00
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2012-09-11 12:27:16 +00:00
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#define CPU_CONTROL (BRIDGE_VIRT_BASE + 0x0104)
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2009-04-22 19:08:17 +00:00
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#define L2_WRITETHROUGH 0x00020000
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2012-09-11 12:27:16 +00:00
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#define RSTOUTn_MASK (BRIDGE_VIRT_BASE + 0x0108)
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2014-02-10 23:00:25 +00:00
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#define RSTOUTn_MASK_PHYS (BRIDGE_PHYS_BASE + 0x0108)
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2009-04-22 19:08:17 +00:00
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#define SOFT_RESET_OUT_EN 0x00000004
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2012-09-11 12:27:16 +00:00
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#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE + 0x010c)
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2009-04-22 19:08:17 +00:00
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#define SOFT_RESET 0x00000001
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#define BRIDGE_INT_TIMER1_CLR (~0x0004)
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2012-09-11 12:27:16 +00:00
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#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200)
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2009-04-22 19:08:17 +00:00
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#define IRQ_CAUSE_ERR_OFF 0x0000
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#define IRQ_CAUSE_LOW_OFF 0x0004
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#define IRQ_CAUSE_HIGH_OFF 0x0008
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#define IRQ_MASK_ERR_OFF 0x000c
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#define IRQ_MASK_LOW_OFF 0x0010
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#define IRQ_MASK_HIGH_OFF 0x0014
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2012-09-11 12:27:16 +00:00
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#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0300)
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#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE + 0x0300)
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2009-04-22 19:08:17 +00:00
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#endif
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