2020-06-30 20:06:35 +00:00
|
|
|
# SPDX-License-Identifier: GPL-2.0-only
|
|
|
|
|
# Intel IOMMU support
|
|
|
|
|
config DMAR_TABLE
|
|
|
|
|
bool
|
|
|
|
|
|
2021-06-10 02:01:05 +00:00
|
|
|
config DMAR_PERF
|
|
|
|
|
bool
|
|
|
|
|
|
2020-06-30 20:06:35 +00:00
|
|
|
config INTEL_IOMMU
|
|
|
|
|
bool "Support for Intel IOMMU using DMA Remapping Devices"
|
|
|
|
|
depends on PCI_MSI && ACPI && (X86 || IA64)
|
2020-08-11 21:13:24 +00:00
|
|
|
select DMA_OPS
|
2020-06-30 20:06:35 +00:00
|
|
|
select IOMMU_API
|
|
|
|
|
select IOMMU_IOVA
|
|
|
|
|
select NEED_DMA_MAP_STATE
|
|
|
|
|
select DMAR_TABLE
|
|
|
|
|
select SWIOTLB
|
|
|
|
|
select IOASID
|
2020-11-24 08:20:56 +00:00
|
|
|
select IOMMU_DMA
|
2021-06-10 02:00:56 +00:00
|
|
|
select PCI_ATS
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
DMA remapping (DMAR) devices support enables independent address
|
|
|
|
|
translations for Direct Memory Access (DMA) from devices.
|
|
|
|
|
These DMA remapping devices are reported via ACPI tables
|
|
|
|
|
and include PCI device scope covered by these DMA
|
|
|
|
|
remapping devices.
|
|
|
|
|
|
2021-08-18 13:48:46 +00:00
|
|
|
if INTEL_IOMMU
|
|
|
|
|
|
2020-06-30 20:06:35 +00:00
|
|
|
config INTEL_IOMMU_DEBUGFS
|
|
|
|
|
bool "Export Intel IOMMU internals in Debugfs"
|
2021-08-18 13:48:46 +00:00
|
|
|
depends on IOMMU_DEBUGFS
|
2021-06-10 02:01:06 +00:00
|
|
|
select DMAR_PERF
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
!!!WARNING!!!
|
|
|
|
|
|
|
|
|
|
DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!!
|
|
|
|
|
|
|
|
|
|
Expose Intel IOMMU internals in Debugfs.
|
|
|
|
|
|
|
|
|
|
This option is -NOT- intended for production environments, and should
|
|
|
|
|
only be enabled for debugging Intel IOMMU.
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU_SVM
|
|
|
|
|
bool "Support for Shared Virtual Memory with Intel IOMMU"
|
2021-08-18 13:48:46 +00:00
|
|
|
depends on X86_64
|
2020-06-30 20:06:35 +00:00
|
|
|
select PCI_PASID
|
|
|
|
|
select PCI_PRI
|
|
|
|
|
select MMU_NOTIFIER
|
|
|
|
|
select IOASID
|
2021-06-10 02:00:59 +00:00
|
|
|
select IOMMU_SVA_LIB
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
Shared Virtual Memory (SVM) provides a facility for devices
|
|
|
|
|
to access DMA resources through process address space by
|
|
|
|
|
means of a Process Address Space ID (PASID).
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU_DEFAULT_ON
|
2021-08-18 13:48:46 +00:00
|
|
|
bool "Enable Intel DMA Remapping Devices by default"
|
|
|
|
|
default y
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
Selecting this option will enable a DMAR device at boot time if
|
|
|
|
|
one is found. If this option is not selected, DMAR support can
|
|
|
|
|
be enabled by passing intel_iommu=on to the kernel.
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU_BROKEN_GFX_WA
|
|
|
|
|
bool "Workaround broken graphics drivers (going away soon)"
|
2021-08-18 13:48:46 +00:00
|
|
|
depends on BROKEN && X86
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
Current Graphics drivers tend to use physical address
|
|
|
|
|
for DMA and avoid using DMA APIs. Setting this config
|
|
|
|
|
option permits the IOMMU driver to set a unity map for
|
|
|
|
|
all the OS-visible memory. Hence the driver can continue
|
|
|
|
|
to use physical addresses for DMA, at least until this
|
|
|
|
|
option is removed in the 2.6.32 kernel.
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU_FLOPPY_WA
|
|
|
|
|
def_bool y
|
2021-08-18 13:48:46 +00:00
|
|
|
depends on X86
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
Floppy disk drivers are known to bypass DMA API calls
|
|
|
|
|
thereby failing to work when IOMMU is enabled. This
|
|
|
|
|
workaround will setup a 1:1 mapping for the first
|
|
|
|
|
16MiB to make floppy (an ISA device) work.
|
|
|
|
|
|
|
|
|
|
config INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
|
|
|
|
|
bool "Enable Intel IOMMU scalable mode by default"
|
2021-08-18 13:48:47 +00:00
|
|
|
default y
|
2020-06-30 20:06:35 +00:00
|
|
|
help
|
|
|
|
|
Selecting this option will enable by default the scalable mode if
|
|
|
|
|
hardware presents the capability. The scalable mode is defined in
|
|
|
|
|
VT-d 3.0. The scalable mode capability could be checked by reading
|
|
|
|
|
/sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option
|
|
|
|
|
is not selected, scalable mode support could also be enabled by
|
|
|
|
|
passing intel_iommu=sm_on to the kernel. If not sure, please use
|
|
|
|
|
the default value.
|
2021-08-18 13:48:46 +00:00
|
|
|
|
|
|
|
|
endif # INTEL_IOMMU
|
