2019-06-01 08:08:55 +00:00
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// SPDX-License-Identifier: GPL-2.0-only
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2008-04-17 15:40:45 +00:00
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/*
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* Debug helper to dump the current kernel pagetables of the system
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* so that we can see what the various memory ranges are set to.
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*
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* (C) Copyright 2008 Intel Corporation
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*
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* Author: Arjan van de Ven <arjan@linux.intel.com>
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*/
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2008-04-17 15:40:45 +00:00
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#include <linux/debugfs.h>
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2017-07-24 15:25:58 +00:00
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#include <linux/kasan.h>
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2008-04-17 15:40:45 +00:00
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#include <linux/mm.h>
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2016-07-14 00:18:54 +00:00
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#include <linux/init.h>
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2017-02-10 09:54:05 +00:00
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#include <linux/sched.h>
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2008-04-17 15:40:45 +00:00
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#include <linux/seq_file.h>
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2018-04-17 13:27:16 +00:00
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#include <linux/highmem.h>
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2018-10-08 19:53:48 +00:00
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#include <linux/pci.h>
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2020-02-04 01:36:24 +00:00
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#include <linux/ptdump.h>
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2008-04-17 15:40:45 +00:00
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2018-10-08 19:53:48 +00:00
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#include <asm/e820/types.h>
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2008-04-17 15:40:45 +00:00
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/*
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* The dumper groups pagetable entries of the same type into one, and for
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* that it needs to keep some state when walking, and flush this state
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* when a "break" in the continuity is found.
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*/
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struct pg_state {
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2020-02-04 01:36:24 +00:00
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struct ptdump_state ptdump;
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2008-04-17 15:40:45 +00:00
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int level;
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2020-02-04 01:36:24 +00:00
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pgprotval_t current_prot;
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2018-02-23 08:27:37 +00:00
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pgprotval_t effective_prot;
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2020-02-04 01:36:24 +00:00
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pgprotval_t prot_levels[5];
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2008-04-17 15:40:45 +00:00
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unsigned long start_address;
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2008-04-17 15:40:45 +00:00
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const struct addr_marker *marker;
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x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
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unsigned long lines;
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2014-01-18 11:48:14 +00:00
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bool to_dmesg;
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2015-10-05 16:55:20 +00:00
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bool check_wx;
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unsigned long wx_pages;
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2020-02-04 01:36:07 +00:00
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struct seq_file *seq;
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2008-04-17 15:40:45 +00:00
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};
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2008-04-17 15:40:45 +00:00
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struct addr_marker {
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unsigned long start_address;
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const char *name;
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x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
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unsigned long max_lines;
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2008-04-17 15:40:45 +00:00
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};
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2017-12-20 17:07:42 +00:00
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/* Address space markers hints */
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#ifdef CONFIG_X86_64
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2010-07-20 22:19:46 +00:00
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enum address_markers_idx {
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USER_SPACE_NR = 0,
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KERNEL_SPACE_NR,
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2018-11-30 20:23:28 +00:00
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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x86/pti: Put the LDT in its own PGD if PTI is on
With PTI enabled, the LDT must be mapped in the usermode tables somewhere.
The LDT is per process, i.e. per mm.
An earlier approach mapped the LDT on context switch into a fixmap area,
but that's a big overhead and exhausted the fixmap space when NR_CPUS got
big.
Take advantage of the fact that there is an address space hole which
provides a completely unused pgd. Use this pgd to manage per-mm LDT
mappings.
This has a down side: the LDT isn't (currently) randomized, and an attack
that can write the LDT is instant root due to call gates (thanks, AMD, for
leaving call gates in AMD64 but designing them wrong so they're only useful
for exploits). This can be mitigated by making the LDT read-only or
randomizing the mapping, either of which is strightforward on top of this
patch.
This will significantly slow down LDT users, but that shouldn't matter for
important workloads -- the LDT is only used by DOSEMU(2), Wine, and very
old libc implementations.
[ tglx: Cleaned it up. ]
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Kirill A. Shutemov <kirill@shutemov.name>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-12-12 15:56:45 +00:00
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LDT_NR,
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#endif
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2018-11-30 20:23:28 +00:00
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LOW_KERNEL_NR,
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2010-07-20 22:19:46 +00:00
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VMALLOC_START_NR,
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VMEMMAP_START_NR,
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2017-02-14 10:08:39 +00:00
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#ifdef CONFIG_KASAN
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KASAN_SHADOW_START_NR,
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KASAN_SHADOW_END_NR,
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x86/pti: Put the LDT in its own PGD if PTI is on
With PTI enabled, the LDT must be mapped in the usermode tables somewhere.
The LDT is per process, i.e. per mm.
An earlier approach mapped the LDT on context switch into a fixmap area,
but that's a big overhead and exhausted the fixmap space when NR_CPUS got
big.
Take advantage of the fact that there is an address space hole which
provides a completely unused pgd. Use this pgd to manage per-mm LDT
mappings.
This has a down side: the LDT isn't (currently) randomized, and an attack
that can write the LDT is instant root due to call gates (thanks, AMD, for
leaving call gates in AMD64 but designing them wrong so they're only useful
for exploits). This can be mitigated by making the LDT read-only or
randomizing the mapping, either of which is strightforward on top of this
patch.
This will significantly slow down LDT users, but that shouldn't matter for
important workloads -- the LDT is only used by DOSEMU(2), Wine, and very
old libc implementations.
[ tglx: Cleaned it up. ]
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Kirill A. Shutemov <kirill@shutemov.name>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-12-12 15:56:45 +00:00
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#endif
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2018-01-04 12:01:40 +00:00
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CPU_ENTRY_AREA_NR,
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2017-12-20 17:07:42 +00:00
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#ifdef CONFIG_X86_ESPFIX64
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x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
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ESPFIX_START_NR,
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2017-12-20 17:07:42 +00:00
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#endif
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#ifdef CONFIG_EFI
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EFI_END_NR,
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#endif
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2010-07-20 22:19:46 +00:00
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HIGH_KERNEL_NR,
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MODULES_VADDR_NR,
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MODULES_END_NR,
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2017-12-20 17:07:42 +00:00
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FIXADDR_START_NR,
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END_OF_SPACE_NR,
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};
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static struct addr_marker address_markers[] = {
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[USER_SPACE_NR] = { 0, "User Space" },
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[KERNEL_SPACE_NR] = { (1UL << 63), "Kernel Space" },
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[LOW_KERNEL_NR] = { 0UL, "Low Kernel Mapping" },
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[VMALLOC_START_NR] = { 0UL, "vmalloc() Area" },
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[VMEMMAP_START_NR] = { 0UL, "Vmemmap" },
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#ifdef CONFIG_KASAN
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2018-02-14 11:16:55 +00:00
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/*
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* These fields get initialized with the (dynamic)
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* KASAN_SHADOW_{START,END} values in pt_dump_init().
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*/
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[KASAN_SHADOW_START_NR] = { 0UL, "KASAN shadow" },
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[KASAN_SHADOW_END_NR] = { 0UL, "KASAN shadow end" },
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x86/pti: Put the LDT in its own PGD if PTI is on
With PTI enabled, the LDT must be mapped in the usermode tables somewhere.
The LDT is per process, i.e. per mm.
An earlier approach mapped the LDT on context switch into a fixmap area,
but that's a big overhead and exhausted the fixmap space when NR_CPUS got
big.
Take advantage of the fact that there is an address space hole which
provides a completely unused pgd. Use this pgd to manage per-mm LDT
mappings.
This has a down side: the LDT isn't (currently) randomized, and an attack
that can write the LDT is instant root due to call gates (thanks, AMD, for
leaving call gates in AMD64 but designing them wrong so they're only useful
for exploits). This can be mitigated by making the LDT read-only or
randomizing the mapping, either of which is strightforward on top of this
patch.
This will significantly slow down LDT users, but that shouldn't matter for
important workloads -- the LDT is only used by DOSEMU(2), Wine, and very
old libc implementations.
[ tglx: Cleaned it up. ]
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Kirill A. Shutemov <kirill@shutemov.name>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-12-12 15:56:45 +00:00
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#endif
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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2018-02-14 11:16:52 +00:00
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[LDT_NR] = { 0UL, "LDT remap" },
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2017-12-20 17:07:42 +00:00
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#endif
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2017-12-20 17:51:31 +00:00
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[CPU_ENTRY_AREA_NR] = { CPU_ENTRY_AREA_BASE,"CPU entry Area" },
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2017-12-20 17:07:42 +00:00
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#ifdef CONFIG_X86_ESPFIX64
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[ESPFIX_START_NR] = { ESPFIX_BASE_ADDR, "ESPfix Area", 16 },
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#endif
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#ifdef CONFIG_EFI
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[EFI_END_NR] = { EFI_VA_END, "EFI Runtime Services" },
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#endif
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[HIGH_KERNEL_NR] = { __START_KERNEL_map, "High Kernel Mapping" },
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[MODULES_VADDR_NR] = { MODULES_VADDR, "Modules" },
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[MODULES_END_NR] = { MODULES_END, "End Modules" },
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[FIXADDR_START_NR] = { FIXADDR_START, "Fixmap Area" },
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[END_OF_SPACE_NR] = { -1, NULL }
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};
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2018-07-18 09:41:08 +00:00
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#define INIT_PGD ((pgd_t *) &init_top_pgt)
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2017-12-20 17:07:42 +00:00
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#else /* CONFIG_X86_64 */
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enum address_markers_idx {
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USER_SPACE_NR = 0,
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2010-07-20 22:19:46 +00:00
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KERNEL_SPACE_NR,
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VMALLOC_START_NR,
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VMALLOC_END_NR,
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2017-12-20 17:07:42 +00:00
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#ifdef CONFIG_HIGHMEM
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2010-07-20 22:19:46 +00:00
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PKMAP_BASE_NR,
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2018-07-18 09:41:10 +00:00
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#endif
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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LDT_NR,
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2010-07-20 22:19:46 +00:00
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#endif
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2017-12-20 17:51:31 +00:00
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CPU_ENTRY_AREA_NR,
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2017-12-20 17:07:42 +00:00
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FIXADDR_START_NR,
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END_OF_SPACE_NR,
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2010-07-20 22:19:46 +00:00
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};
|
|
|
|
|
|
2008-04-17 15:40:45 +00:00
|
|
|
static struct addr_marker address_markers[] = {
|
2017-12-20 17:07:42 +00:00
|
|
|
[USER_SPACE_NR] = { 0, "User Space" },
|
|
|
|
|
[KERNEL_SPACE_NR] = { PAGE_OFFSET, "Kernel Mapping" },
|
|
|
|
|
[VMALLOC_START_NR] = { 0UL, "vmalloc() Area" },
|
|
|
|
|
[VMALLOC_END_NR] = { 0UL, "vmalloc() End" },
|
|
|
|
|
#ifdef CONFIG_HIGHMEM
|
|
|
|
|
[PKMAP_BASE_NR] = { 0UL, "Persistent kmap() Area" },
|
2018-07-18 09:41:10 +00:00
|
|
|
#endif
|
|
|
|
|
#ifdef CONFIG_MODIFY_LDT_SYSCALL
|
|
|
|
|
[LDT_NR] = { 0UL, "LDT remap" },
|
2008-04-17 15:40:45 +00:00
|
|
|
#endif
|
2017-12-20 17:51:31 +00:00
|
|
|
[CPU_ENTRY_AREA_NR] = { 0UL, "CPU entry area" },
|
2017-12-20 17:07:42 +00:00
|
|
|
[FIXADDR_START_NR] = { 0UL, "Fixmap area" },
|
|
|
|
|
[END_OF_SPACE_NR] = { -1, NULL }
|
2008-04-17 15:40:45 +00:00
|
|
|
};
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2018-07-18 09:41:08 +00:00
|
|
|
#define INIT_PGD (swapper_pg_dir)
|
|
|
|
|
|
2017-12-20 17:07:42 +00:00
|
|
|
#endif /* !CONFIG_X86_64 */
|
|
|
|
|
|
2008-04-17 15:40:45 +00:00
|
|
|
/* Multipliers for offsets within the PTEs */
|
|
|
|
|
#define PTE_LEVEL_MULT (PAGE_SIZE)
|
|
|
|
|
#define PMD_LEVEL_MULT (PTRS_PER_PTE * PTE_LEVEL_MULT)
|
|
|
|
|
#define PUD_LEVEL_MULT (PTRS_PER_PMD * PMD_LEVEL_MULT)
|
2017-03-28 10:48:06 +00:00
|
|
|
#define P4D_LEVEL_MULT (PTRS_PER_PUD * PUD_LEVEL_MULT)
|
2017-04-12 14:36:34 +00:00
|
|
|
#define PGD_LEVEL_MULT (PTRS_PER_P4D * P4D_LEVEL_MULT)
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2014-01-18 11:48:14 +00:00
|
|
|
#define pt_dump_seq_printf(m, to_dmesg, fmt, args...) \
|
|
|
|
|
({ \
|
|
|
|
|
if (to_dmesg) \
|
|
|
|
|
printk(KERN_INFO fmt, ##args); \
|
|
|
|
|
else \
|
|
|
|
|
if (m) \
|
|
|
|
|
seq_printf(m, fmt, ##args); \
|
|
|
|
|
})
|
|
|
|
|
|
|
|
|
|
#define pt_dump_cont_printf(m, to_dmesg, fmt, args...) \
|
|
|
|
|
({ \
|
|
|
|
|
if (to_dmesg) \
|
|
|
|
|
printk(KERN_CONT fmt, ##args); \
|
|
|
|
|
else \
|
|
|
|
|
if (m) \
|
|
|
|
|
seq_printf(m, fmt, ##args); \
|
|
|
|
|
})
|
|
|
|
|
|
2008-04-17 15:40:45 +00:00
|
|
|
/*
|
|
|
|
|
* Print a readable form of a pgprot_t to the seq_file
|
|
|
|
|
*/
|
2020-02-04 01:36:24 +00:00
|
|
|
static void printk_prot(struct seq_file *m, pgprotval_t pr, int level, bool dmsg)
|
2008-04-17 15:40:45 +00:00
|
|
|
{
|
2008-04-17 15:40:45 +00:00
|
|
|
static const char * const level_name[] =
|
2020-02-04 01:36:38 +00:00
|
|
|
{ "pgd", "p4d", "pud", "pmd", "pte" };
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2017-12-16 00:14:39 +00:00
|
|
|
if (!(pr & _PAGE_PRESENT)) {
|
2008-04-17 15:40:45 +00:00
|
|
|
/* Not present */
|
2014-11-03 13:02:01 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
} else {
|
|
|
|
|
if (pr & _PAGE_USER)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "USR ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
if (pr & _PAGE_RW)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "RW ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "ro ");
|
2008-04-17 15:40:45 +00:00
|
|
|
if (pr & _PAGE_PWT)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "PWT ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
if (pr & _PAGE_PCD)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "PCD ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2014-11-03 13:02:01 +00:00
|
|
|
/* Bit 7 has a different meaning on level 3 vs 4 */
|
2020-02-04 01:36:38 +00:00
|
|
|
if (level <= 3 && pr & _PAGE_PSE)
|
2014-11-03 13:02:01 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "PSE ");
|
|
|
|
|
else
|
|
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2020-02-04 01:36:38 +00:00
|
|
|
if ((level == 4 && pr & _PAGE_PAT) ||
|
|
|
|
|
((level == 3 || level == 2) && pr & _PAGE_PAT_LARGE))
|
2015-09-17 18:24:19 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "PAT ");
|
2014-11-03 13:02:01 +00:00
|
|
|
else
|
|
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
if (pr & _PAGE_GLOBAL)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "GLB ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, " ");
|
2008-04-17 15:40:45 +00:00
|
|
|
if (pr & _PAGE_NX)
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "NX ");
|
2008-04-17 15:40:45 +00:00
|
|
|
else
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "x ");
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_cont_printf(m, dmsg, "%s\n", level_name[level]);
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
|
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
static void note_wx(struct pg_state *st, unsigned long addr)
|
2018-10-08 19:53:48 +00:00
|
|
|
{
|
|
|
|
|
unsigned long npages;
|
|
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
npages = (addr - st->start_address) / PAGE_SIZE;
|
2018-10-08 19:53:48 +00:00
|
|
|
|
|
|
|
|
#ifdef CONFIG_PCI_BIOS
|
|
|
|
|
/*
|
|
|
|
|
* If PCI BIOS is enabled, the PCI BIOS area is forced to WX.
|
|
|
|
|
* Inform about it, but avoid the warning.
|
|
|
|
|
*/
|
|
|
|
|
if (pcibios_enabled && st->start_address >= PAGE_OFFSET + BIOS_BEGIN &&
|
2020-02-04 01:36:24 +00:00
|
|
|
addr <= PAGE_OFFSET + BIOS_END) {
|
2018-10-08 19:53:48 +00:00
|
|
|
pr_warn_once("x86/mm: PCI BIOS W+X mapping %lu pages\n", npages);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
#endif
|
|
|
|
|
/* Account the WX pages */
|
|
|
|
|
st->wx_pages += npages;
|
2019-04-15 08:46:07 +00:00
|
|
|
WARN_ONCE(__supported_pte_mask & _PAGE_NX,
|
|
|
|
|
"x86/mm: Found insecure W+X mapping at address %pS\n",
|
2018-10-08 19:53:48 +00:00
|
|
|
(void *)st->start_address);
|
|
|
|
|
}
|
|
|
|
|
|
2020-06-02 04:49:58 +00:00
|
|
|
static void effective_prot(struct ptdump_state *pt_st, int level, u64 val)
|
2020-02-04 01:36:24 +00:00
|
|
|
{
|
2020-06-02 04:49:58 +00:00
|
|
|
struct pg_state *st = container_of(pt_st, struct pg_state, ptdump);
|
|
|
|
|
pgprotval_t prot = val & PTE_FLAGS_MASK;
|
|
|
|
|
pgprotval_t effective;
|
|
|
|
|
|
|
|
|
|
if (level > 0) {
|
|
|
|
|
pgprotval_t higher_prot = st->prot_levels[level - 1];
|
|
|
|
|
|
|
|
|
|
effective = (higher_prot & prot & (_PAGE_USER | _PAGE_RW)) |
|
|
|
|
|
((higher_prot | prot) & _PAGE_NX);
|
|
|
|
|
} else {
|
|
|
|
|
effective = prot;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
st->prot_levels[level] = effective;
|
2020-02-04 01:36:24 +00:00
|
|
|
}
|
|
|
|
|
|
2008-04-17 15:40:45 +00:00
|
|
|
/*
|
|
|
|
|
* This function gets called on a break in a continuous series
|
|
|
|
|
* of PTE entries; the next one is different so we need to
|
|
|
|
|
* print what we collected so far.
|
|
|
|
|
*/
|
2020-02-04 01:36:24 +00:00
|
|
|
static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level,
|
2020-06-02 04:50:01 +00:00
|
|
|
u64 val)
|
2008-04-17 15:40:45 +00:00
|
|
|
{
|
2020-02-04 01:36:24 +00:00
|
|
|
struct pg_state *st = container_of(pt_st, struct pg_state, ptdump);
|
|
|
|
|
pgprotval_t new_prot, new_eff;
|
|
|
|
|
pgprotval_t cur, eff;
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
static const char units[] = "BKMGTPE";
|
2020-02-04 01:36:07 +00:00
|
|
|
struct seq_file *m = st->seq;
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
new_prot = val & PTE_FLAGS_MASK;
|
2020-06-02 04:49:58 +00:00
|
|
|
if (!val)
|
|
|
|
|
new_eff = 0;
|
|
|
|
|
else
|
|
|
|
|
new_eff = st->prot_levels[level];
|
2020-02-04 01:36:24 +00:00
|
|
|
|
2008-04-17 15:40:45 +00:00
|
|
|
/*
|
|
|
|
|
* If we have a "break" in the series, we need to flush the state that
|
2008-04-17 15:40:45 +00:00
|
|
|
* we have now. "break" is either changing perms, levels or
|
|
|
|
|
* address space marker.
|
2008-04-17 15:40:45 +00:00
|
|
|
*/
|
2020-02-04 01:36:24 +00:00
|
|
|
cur = st->current_prot;
|
2018-02-23 08:27:37 +00:00
|
|
|
eff = st->effective_prot;
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2020-02-04 01:36:38 +00:00
|
|
|
if (st->level == -1) {
|
2008-04-17 15:40:45 +00:00
|
|
|
/* First entry */
|
|
|
|
|
st->current_prot = new_prot;
|
2018-02-23 08:27:37 +00:00
|
|
|
st->effective_prot = new_eff;
|
2008-04-17 15:40:45 +00:00
|
|
|
st->level = level;
|
|
|
|
|
st->marker = address_markers;
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
st->lines = 0;
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_seq_printf(m, st->to_dmesg, "---[ %s ]---\n",
|
|
|
|
|
st->marker->name);
|
2020-02-04 01:36:24 +00:00
|
|
|
} else if (new_prot != cur || new_eff != eff || level != st->level ||
|
|
|
|
|
addr >= st->marker[1].start_address) {
|
2008-04-17 15:40:45 +00:00
|
|
|
const char *unit = units;
|
2008-04-17 15:40:45 +00:00
|
|
|
unsigned long delta;
|
2009-04-14 06:51:46 +00:00
|
|
|
int width = sizeof(unsigned long) * 2;
|
2015-10-05 16:55:20 +00:00
|
|
|
|
2018-10-08 19:53:48 +00:00
|
|
|
if (st->check_wx && (eff & _PAGE_RW) && !(eff & _PAGE_NX))
|
2020-02-04 01:36:24 +00:00
|
|
|
note_wx(st, addr);
|
2008-04-17 15:40:45 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Now print the actual finished series
|
|
|
|
|
*/
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
if (!st->marker->max_lines ||
|
|
|
|
|
st->lines < st->marker->max_lines) {
|
|
|
|
|
pt_dump_seq_printf(m, st->to_dmesg,
|
|
|
|
|
"0x%0*lx-0x%0*lx ",
|
|
|
|
|
width, st->start_address,
|
2020-02-04 01:36:24 +00:00
|
|
|
width, addr);
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
delta = addr - st->start_address;
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
while (!(delta & 1023) && unit[1]) {
|
|
|
|
|
delta >>= 10;
|
|
|
|
|
unit++;
|
|
|
|
|
}
|
|
|
|
|
pt_dump_cont_printf(m, st->to_dmesg, "%9lu%c ",
|
|
|
|
|
delta, *unit);
|
|
|
|
|
printk_prot(m, st->current_prot, st->level,
|
|
|
|
|
st->to_dmesg);
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
st->lines++;
|
2008-04-17 15:40:45 +00:00
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We print markers for special areas of address space,
|
|
|
|
|
* such as the start of vmalloc space etc.
|
|
|
|
|
* This helps in the interpretation.
|
|
|
|
|
*/
|
2020-02-04 01:36:24 +00:00
|
|
|
if (addr >= st->marker[1].start_address) {
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
if (st->marker->max_lines &&
|
|
|
|
|
st->lines > st->marker->max_lines) {
|
|
|
|
|
unsigned long nskip =
|
|
|
|
|
st->lines - st->marker->max_lines;
|
|
|
|
|
pt_dump_seq_printf(m, st->to_dmesg,
|
|
|
|
|
"... %lu entr%s skipped ... \n",
|
|
|
|
|
nskip,
|
|
|
|
|
nskip == 1 ? "y" : "ies");
|
|
|
|
|
}
|
2008-04-17 15:40:45 +00:00
|
|
|
st->marker++;
|
x86-64, espfix: Don't leak bits 31:16 of %esp returning to 16-bit stack
The IRET instruction, when returning to a 16-bit segment, only
restores the bottom 16 bits of the user space stack pointer. This
causes some 16-bit software to break, but it also leaks kernel state
to user space. We have a software workaround for that ("espfix") for
the 32-bit kernel, but it relies on a nonzero stack segment base which
is not available in 64-bit mode.
In checkin:
b3b42ac2cbae x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels
we "solved" this by forbidding 16-bit segments on 64-bit kernels, with
the logic that 16-bit support is crippled on 64-bit kernels anyway (no
V86 support), but it turns out that people are doing stuff like
running old Win16 binaries under Wine and expect it to work.
This works around this by creating percpu "ministacks", each of which
is mapped 2^16 times 64K apart. When we detect that the return SS is
on the LDT, we copy the IRET frame to the ministack and use the
relevant alias to return to userspace. The ministacks are mapped
readonly, so if IRET faults we promote #GP to #DF which is an IST
vector and thus has its own stack; we then do the fixup in the #DF
handler.
(Making #GP an IST exception would make the msr_safe functions unsafe
in NMI/MC context, and quite possibly have other effects.)
Special thanks to:
- Andy Lutomirski, for the suggestion of using very small stack slots
and copy (as opposed to map) the IRET frame there, and for the
suggestion to mark them readonly and let the fault promote to #DF.
- Konrad Wilk for paravirt fixup and testing.
- Borislav Petkov for testing help and useful comments.
Reported-by: Brian Gerst <brgerst@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Link: http://lkml.kernel.org/r/1398816946-3351-1-git-send-email-hpa@linux.intel.com
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Andrew Lutomriski <amluto@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Dirk Hohndel <dirk@hohndel.org>
Cc: Arjan van de Ven <arjan.van.de.ven@intel.com>
Cc: comex <comexk@gmail.com>
Cc: Alexander van Heukelum <heukelum@fastmail.fm>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: <stable@vger.kernel.org> # consider after upstream merge
2014-04-29 23:46:09 +00:00
|
|
|
st->lines = 0;
|
2014-01-18 11:48:14 +00:00
|
|
|
pt_dump_seq_printf(m, st->to_dmesg, "---[ %s ]---\n",
|
|
|
|
|
st->marker->name);
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
st->start_address = addr;
|
2008-04-17 15:40:45 +00:00
|
|
|
st->current_prot = new_prot;
|
2018-02-23 08:27:37 +00:00
|
|
|
st->effective_prot = new_eff;
|
2008-04-17 15:40:45 +00:00
|
|
|
st->level = level;
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
|
|
|
|
|
2020-02-04 01:36:42 +00:00
|
|
|
static void ptdump_walk_pgd_level_core(struct seq_file *m,
|
|
|
|
|
struct mm_struct *mm, pgd_t *pgd,
|
2020-02-04 01:36:24 +00:00
|
|
|
bool checkwx, bool dmesg)
|
2008-04-17 15:40:45 +00:00
|
|
|
{
|
2020-02-04 01:36:24 +00:00
|
|
|
const struct ptdump_range ptdump_ranges[] = {
|
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
|
{0, PTRS_PER_PGD * PGD_LEVEL_MULT / 2},
|
2020-02-21 10:38:51 +00:00
|
|
|
{GUARD_HOLE_END_ADDR, ~0UL},
|
2008-04-17 15:40:45 +00:00
|
|
|
#else
|
2020-02-04 01:36:24 +00:00
|
|
|
{0, ~0UL},
|
2017-03-28 10:48:06 +00:00
|
|
|
#endif
|
2020-02-04 01:36:24 +00:00
|
|
|
{0, 0}
|
|
|
|
|
};
|
2017-03-28 10:48:06 +00:00
|
|
|
|
2020-02-04 01:36:24 +00:00
|
|
|
struct pg_state st = {
|
|
|
|
|
.ptdump = {
|
|
|
|
|
.note_page = note_page,
|
2020-06-02 04:49:58 +00:00
|
|
|
.effective_prot = effective_prot,
|
2020-02-04 01:36:24 +00:00
|
|
|
.range = ptdump_ranges
|
|
|
|
|
},
|
2020-02-04 01:36:38 +00:00
|
|
|
.level = -1,
|
2020-02-04 01:36:24 +00:00
|
|
|
.to_dmesg = dmesg,
|
|
|
|
|
.check_wx = checkwx,
|
|
|
|
|
.seq = m
|
|
|
|
|
};
|
2017-03-28 10:48:06 +00:00
|
|
|
|
2020-02-04 01:36:42 +00:00
|
|
|
ptdump_walk_pgd(&st.ptdump, mm, pgd);
|
2008-04-17 15:40:45 +00:00
|
|
|
|
2015-10-05 16:55:20 +00:00
|
|
|
if (!checkwx)
|
|
|
|
|
return;
|
|
|
|
|
if (st.wx_pages)
|
|
|
|
|
pr_info("x86/mm: Checked W+X mappings: FAILED, %lu W+X pages found.\n",
|
|
|
|
|
st.wx_pages);
|
|
|
|
|
else
|
|
|
|
|
pr_info("x86/mm: Checked W+X mappings: passed, no W+X pages found.\n");
|
|
|
|
|
}
|
|
|
|
|
|
2020-02-04 01:36:11 +00:00
|
|
|
void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm)
|
2015-10-05 16:55:20 +00:00
|
|
|
{
|
2020-02-04 01:36:42 +00:00
|
|
|
ptdump_walk_pgd_level_core(m, mm, mm->pgd, false, true);
|
2017-12-04 14:08:05 +00:00
|
|
|
}
|
|
|
|
|
|
2020-02-04 01:36:16 +00:00
|
|
|
void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
|
|
|
|
|
bool user)
|
2017-12-04 14:08:05 +00:00
|
|
|
{
|
2020-02-04 01:36:16 +00:00
|
|
|
pgd_t *pgd = mm->pgd;
|
2017-12-04 14:08:06 +00:00
|
|
|
#ifdef CONFIG_PAGE_TABLE_ISOLATION
|
2019-03-29 19:00:38 +00:00
|
|
|
if (user && boot_cpu_has(X86_FEATURE_PTI))
|
2017-12-04 14:08:06 +00:00
|
|
|
pgd = kernel_to_user_pgdp(pgd);
|
|
|
|
|
#endif
|
2020-02-04 01:36:42 +00:00
|
|
|
ptdump_walk_pgd_level_core(m, mm, pgd, false, false);
|
2017-12-04 14:08:05 +00:00
|
|
|
}
|
|
|
|
|
EXPORT_SYMBOL_GPL(ptdump_walk_pgd_level_debugfs);
|
|
|
|
|
|
2018-08-08 11:16:40 +00:00
|
|
|
void ptdump_walk_user_pgd_level_checkwx(void)
|
2017-12-04 14:08:05 +00:00
|
|
|
{
|
|
|
|
|
#ifdef CONFIG_PAGE_TABLE_ISOLATION
|
2018-07-18 09:41:08 +00:00
|
|
|
pgd_t *pgd = INIT_PGD;
|
2017-12-04 14:08:05 +00:00
|
|
|
|
2018-08-08 11:16:40 +00:00
|
|
|
if (!(__supported_pte_mask & _PAGE_NX) ||
|
2019-03-29 19:00:38 +00:00
|
|
|
!boot_cpu_has(X86_FEATURE_PTI))
|
2017-12-04 14:08:05 +00:00
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
pr_info("x86/mm: Checking user space page tables\n");
|
|
|
|
|
pgd = kernel_to_user_pgdp(pgd);
|
2020-02-04 01:36:42 +00:00
|
|
|
ptdump_walk_pgd_level_core(NULL, &init_mm, pgd, true, false);
|
2017-12-04 14:08:05 +00:00
|
|
|
#endif
|
2008-04-17 15:40:45 +00:00
|
|
|
}
|
|
|
|
|
|
2015-10-05 16:55:20 +00:00
|
|
|
void ptdump_walk_pgd_level_checkwx(void)
|
|
|
|
|
{
|
2020-02-04 01:36:42 +00:00
|
|
|
ptdump_walk_pgd_level_core(NULL, &init_mm, INIT_PGD, true, false);
|
2015-10-05 16:55:20 +00:00
|
|
|
}
|
|
|
|
|
|
2015-11-20 01:07:55 +00:00
|
|
|
static int __init pt_dump_init(void)
|
2008-04-17 15:40:45 +00:00
|
|
|
{
|
x86/mm: Implement ASLR for kernel memory regions
Randomizes the virtual address space of kernel memory regions for
x86_64. This first patch adds the infrastructure and does not randomize
any region. The following patches will randomize the physical memory
mapping, vmalloc and vmemmap regions.
This security feature mitigates exploits relying on predictable kernel
addresses. These addresses can be used to disclose the kernel modules
base addresses or corrupt specific structures to elevate privileges
bypassing the current implementation of KASLR. This feature can be
enabled with the CONFIG_RANDOMIZE_MEMORY option.
The order of each memory region is not changed. The feature looks at the
available space for the regions based on different configuration options
and randomizes the base and space between each. The size of the physical
memory mapping is the available physical memory. No performance impact
was detected while testing the feature.
Entropy is generated using the KASLR early boot functions now shared in
the lib directory (originally written by Kees Cook). Randomization is
done on PGD & PUD page table levels to increase possible addresses. The
physical memory mapping code was adapted to support PUD level virtual
addresses. This implementation on the best configuration provides 30,000
possible virtual addresses in average for each memory region. An
additional low memory page is used to ensure each CPU can start with a
PGD aligned virtual address (for realmode).
x86/dump_pagetable was updated to correctly display each region.
Updated documentation on x86_64 memory layout accordingly.
Performance data, after all patches in the series:
Kernbench shows almost no difference (-+ less than 1%):
Before:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.63 (1.2695)
User Time 1034.89 (1.18115) System Time 87.056 (0.456416) Percent CPU 1092.9
(13.892) Context Switches 199805 (3455.33) Sleeps 97907.8 (900.636)
After:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.489 (1.10636)
User Time 1034.86 (1.36053) System Time 87.764 (0.49345) Percent CPU 1095
(12.7715) Context Switches 199036 (4298.1) Sleeps 97681.6 (1031.11)
Hackbench shows 0% difference on average (hackbench 90 repeated 10 times):
attemp,before,after 1,0.076,0.069 2,0.072,0.069 3,0.066,0.066 4,0.066,0.068
5,0.066,0.067 6,0.066,0.069 7,0.067,0.066 8,0.063,0.067 9,0.067,0.065
10,0.068,0.071 average,0.0677,0.0677
Signed-off-by: Thomas Garnier <thgarnie@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Alexander Kuleshov <kuleshovmail@gmail.com>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lv Zheng <lv.zheng@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1466556426-32664-6-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-22 00:47:02 +00:00
|
|
|
/*
|
|
|
|
|
* Various markers are not compile-time constants, so assign them
|
|
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* here.
|
|
|
|
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*/
|
|
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#ifdef CONFIG_X86_64
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address_markers[LOW_KERNEL_NR].start_address = PAGE_OFFSET;
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address_markers[VMALLOC_START_NR].start_address = VMALLOC_START;
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address_markers[VMEMMAP_START_NR].start_address = VMEMMAP_START;
|
2018-02-14 11:16:52 +00:00
|
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#ifdef CONFIG_MODIFY_LDT_SYSCALL
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address_markers[LDT_NR].start_address = LDT_BASE_ADDR;
|
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|
#endif
|
2018-02-14 11:16:55 +00:00
|
|
|
#ifdef CONFIG_KASAN
|
|
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|
|
address_markers[KASAN_SHADOW_START_NR].start_address = KASAN_SHADOW_START;
|
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|
|
|
address_markers[KASAN_SHADOW_END_NR].start_address = KASAN_SHADOW_END;
|
|
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|
|
#endif
|
x86/mm: Implement ASLR for kernel memory regions
Randomizes the virtual address space of kernel memory regions for
x86_64. This first patch adds the infrastructure and does not randomize
any region. The following patches will randomize the physical memory
mapping, vmalloc and vmemmap regions.
This security feature mitigates exploits relying on predictable kernel
addresses. These addresses can be used to disclose the kernel modules
base addresses or corrupt specific structures to elevate privileges
bypassing the current implementation of KASLR. This feature can be
enabled with the CONFIG_RANDOMIZE_MEMORY option.
The order of each memory region is not changed. The feature looks at the
available space for the regions based on different configuration options
and randomizes the base and space between each. The size of the physical
memory mapping is the available physical memory. No performance impact
was detected while testing the feature.
Entropy is generated using the KASLR early boot functions now shared in
the lib directory (originally written by Kees Cook). Randomization is
done on PGD & PUD page table levels to increase possible addresses. The
physical memory mapping code was adapted to support PUD level virtual
addresses. This implementation on the best configuration provides 30,000
possible virtual addresses in average for each memory region. An
additional low memory page is used to ensure each CPU can start with a
PGD aligned virtual address (for realmode).
x86/dump_pagetable was updated to correctly display each region.
Updated documentation on x86_64 memory layout accordingly.
Performance data, after all patches in the series:
Kernbench shows almost no difference (-+ less than 1%):
Before:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.63 (1.2695)
User Time 1034.89 (1.18115) System Time 87.056 (0.456416) Percent CPU 1092.9
(13.892) Context Switches 199805 (3455.33) Sleeps 97907.8 (900.636)
After:
Average Optimal load -j 12 Run (std deviation): Elapsed Time 102.489 (1.10636)
User Time 1034.86 (1.36053) System Time 87.764 (0.49345) Percent CPU 1095
(12.7715) Context Switches 199036 (4298.1) Sleeps 97681.6 (1031.11)
Hackbench shows 0% difference on average (hackbench 90 repeated 10 times):
attemp,before,after 1,0.076,0.069 2,0.072,0.069 3,0.066,0.066 4,0.066,0.068
5,0.066,0.067 6,0.066,0.069 7,0.067,0.066 8,0.063,0.067 9,0.067,0.065
10,0.068,0.071 average,0.0677,0.0677
Signed-off-by: Thomas Garnier <thgarnie@google.com>
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Alexander Kuleshov <kuleshovmail@gmail.com>
Cc: Alexander Popov <alpopov@ptsecurity.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Cc: Baoquan He <bhe@redhat.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Borislav Petkov <bp@suse.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Dave Young <dyoung@redhat.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jan Beulich <JBeulich@suse.com>
Cc: Joerg Roedel <jroedel@suse.de>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Lv Zheng <lv.zheng@intel.com>
Cc: Mark Salter <msalter@redhat.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephen Smalley <sds@tycho.nsa.gov>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Toshi Kani <toshi.kani@hpe.com>
Cc: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: kernel-hardening@lists.openwall.com
Cc: linux-doc@vger.kernel.org
Link: http://lkml.kernel.org/r/1466556426-32664-6-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2016-06-22 00:47:02 +00:00
|
|
|
#endif
|
2008-04-17 15:40:45 +00:00
|
|
|
#ifdef CONFIG_X86_32
|
2010-07-20 22:19:46 +00:00
|
|
|
address_markers[VMALLOC_START_NR].start_address = VMALLOC_START;
|
|
|
|
|
address_markers[VMALLOC_END_NR].start_address = VMALLOC_END;
|
2008-04-17 15:40:45 +00:00
|
|
|
# ifdef CONFIG_HIGHMEM
|
2010-07-20 22:19:46 +00:00
|
|
|
address_markers[PKMAP_BASE_NR].start_address = PKMAP_BASE;
|
2008-04-17 15:40:45 +00:00
|
|
|
# endif
|
2010-07-20 22:19:46 +00:00
|
|
|
address_markers[FIXADDR_START_NR].start_address = FIXADDR_START;
|
2017-12-20 17:51:31 +00:00
|
|
|
address_markers[CPU_ENTRY_AREA_NR].start_address = CPU_ENTRY_AREA_BASE;
|
2018-07-18 09:41:10 +00:00
|
|
|
# ifdef CONFIG_MODIFY_LDT_SYSCALL
|
|
|
|
|
address_markers[LDT_NR].start_address = LDT_BASE_ADDR;
|
|
|
|
|
# endif
|
2008-04-17 15:40:45 +00:00
|
|
|
#endif
|
2008-04-17 15:40:45 +00:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
__initcall(pt_dump_init);
|