2019-05-27 06:55:08 +00:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2013-07-04 09:35:46 +00:00
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*/
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2020-08-04 23:17:29 +00:00
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#include <linux/bits.h>
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2013-07-04 09:35:46 +00:00
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include "clk.h"
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/**
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* struct clk_fixup_mux - imx integer fixup multiplexer clock
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* @mux: the parent class
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* @ops: pointer to clk_ops of parent class
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* @fixup: a hook to fixup the write value
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*
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* The imx fixup multiplexer clock is a subclass of basic clk_mux
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* with an addtional fixup hook.
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*/
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struct clk_fixup_mux {
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struct clk_mux mux;
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const struct clk_ops *ops;
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void (*fixup)(u32 *val);
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};
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static inline struct clk_fixup_mux *to_clk_fixup_mux(struct clk_hw *hw)
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{
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struct clk_mux *mux = to_clk_mux(hw);
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return container_of(mux, struct clk_fixup_mux, mux);
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}
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static u8 clk_fixup_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw);
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return fixup_mux->ops->get_parent(&fixup_mux->mux.hw);
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}
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static int clk_fixup_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_fixup_mux *fixup_mux = to_clk_fixup_mux(hw);
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struct clk_mux *mux = to_clk_mux(hw);
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2020-02-12 09:03:00 +00:00
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unsigned long flags;
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2013-07-04 09:35:46 +00:00
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u32 val;
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spin_lock_irqsave(mux->lock, flags);
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val = readl(mux->reg);
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val &= ~(mux->mask << mux->shift);
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val |= index << mux->shift;
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fixup_mux->fixup(&val);
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writel(val, mux->reg);
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spin_unlock_irqrestore(mux->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_fixup_mux_ops = {
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clk: imx: fixup-mux: Add a determine_rate hook
The iMX fixup mux clock implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.
This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidates to
trigger that parent change are either the assigned-clock-parents device
tree property or a call to clk_set_rate(), with determine_rate()
figuring out which parent is the best suited for a given rate.
The other trigger would be a call to clk_set_parent(), but it's far less
used, and it doesn't look like there's any obvious user for that clock.
However, the upstream device trees seem to use assigned-clock-parents on
that clock to force the parent at boot time, so it's likely that the
author intent was to force the parent through the device tree and
prevent any reparenting but through an explicit call to
clk_set_parent().
This case would be equivalent to setting the determine_rate
implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no
determine_rate implementation is provided, clk_round_rate() (through
clk_core_round_rate_nolock()) will call itself on the parent if
CLK_SET_RATE_PARENT is set, and will not change the clock rate
otherwise.
Cc: Abel Vesa <abelvesa@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-27-971d5077e7d2@cerno.tech
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-05-05 11:25:29 +00:00
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.determine_rate = clk_hw_determine_rate_no_reparent,
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2013-07-04 09:35:46 +00:00
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.get_parent = clk_fixup_mux_get_parent,
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.set_parent = clk_fixup_mux_set_parent,
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};
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2019-05-29 12:26:44 +00:00
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struct clk_hw *imx_clk_hw_fixup_mux(const char *name, void __iomem *reg,
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2018-11-14 13:02:00 +00:00
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u8 shift, u8 width, const char * const *parents,
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2013-07-04 09:35:46 +00:00
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int num_parents, void (*fixup)(u32 *val))
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{
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struct clk_fixup_mux *fixup_mux;
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2019-05-29 12:26:44 +00:00
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struct clk_hw *hw;
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2013-07-04 09:35:46 +00:00
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struct clk_init_data init;
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2019-05-29 12:26:44 +00:00
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int ret;
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2013-07-04 09:35:46 +00:00
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if (!fixup)
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return ERR_PTR(-EINVAL);
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fixup_mux = kzalloc(sizeof(*fixup_mux), GFP_KERNEL);
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if (!fixup_mux)
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return ERR_PTR(-ENOMEM);
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init.name = name;
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init.ops = &clk_fixup_mux_ops;
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init.parent_names = parents;
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init.num_parents = num_parents;
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2013-09-04 12:49:04 +00:00
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init.flags = 0;
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2013-07-04 09:35:46 +00:00
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fixup_mux->mux.reg = reg;
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fixup_mux->mux.shift = shift;
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fixup_mux->mux.mask = BIT(width) - 1;
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fixup_mux->mux.lock = &imx_ccm_lock;
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fixup_mux->mux.hw.init = &init;
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fixup_mux->ops = &clk_mux_ops;
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fixup_mux->fixup = fixup;
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2019-05-29 12:26:44 +00:00
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hw = &fixup_mux->mux.hw;
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ret = clk_hw_register(NULL, hw);
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if (ret) {
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2013-07-04 09:35:46 +00:00
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kfree(fixup_mux);
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2019-05-29 12:26:44 +00:00
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return ERR_PTR(ret);
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}
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2013-07-04 09:35:46 +00:00
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2019-05-29 12:26:44 +00:00
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return hw;
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2013-07-04 09:35:46 +00:00
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}
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