2012-10-30 18:25:31 +00:00
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/*
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* Fast Ethernet Controller (ENET) PTP driver for MX6x.
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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2013-04-13 19:03:17 +00:00
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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2012-10-30 18:25:31 +00:00
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/workqueue.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/fec.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <linux/of_net.h>
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#include "fec.h"
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/* FEC 1588 register bits */
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#define FEC_T_CTRL_SLAVE 0x00002000
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#define FEC_T_CTRL_CAPTURE 0x00000800
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#define FEC_T_CTRL_RESTART 0x00000200
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#define FEC_T_CTRL_PERIOD_RST 0x00000030
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#define FEC_T_CTRL_PERIOD_EN 0x00000010
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#define FEC_T_CTRL_ENABLE 0x00000001
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#define FEC_T_INC_MASK 0x0000007f
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#define FEC_T_INC_OFFSET 0
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#define FEC_T_INC_CORR_MASK 0x00007f00
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#define FEC_T_INC_CORR_OFFSET 8
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#define FEC_ATIME_CTRL 0x400
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#define FEC_ATIME 0x404
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#define FEC_ATIME_EVT_OFFSET 0x408
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#define FEC_ATIME_EVT_PERIOD 0x40c
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#define FEC_ATIME_CORR 0x410
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#define FEC_ATIME_INC 0x414
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#define FEC_TS_TIMESTAMP 0x418
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#define FEC_CC_MULT (1 << 31)
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/**
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* fec_ptp_read - read raw cycle counter (to be used by time counter)
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* @cc: the cyclecounter structure
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*
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* this function reads the cyclecounter registers and is called by the
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* cyclecounter structure used to construct a ns counter from the
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* arbitrary fixed point registers
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*/
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static cycle_t fec_ptp_read(const struct cyclecounter *cc)
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{
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struct fec_enet_private *fep =
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container_of(cc, struct fec_enet_private, cc);
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u32 tempval;
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tempval = readl(fep->hwp + FEC_ATIME_CTRL);
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tempval |= FEC_T_CTRL_CAPTURE;
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writel(tempval, fep->hwp + FEC_ATIME_CTRL);
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return readl(fep->hwp + FEC_ATIME);
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}
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/**
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* fec_ptp_start_cyclecounter - create the cycle counter from hw
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* @ndev: network device
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*
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* this function initializes the timecounter and cyclecounter
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* structures for use in generated a ns counter from the arbitrary
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* fixed point cycles registers in the hardware.
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*/
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void fec_ptp_start_cyclecounter(struct net_device *ndev)
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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unsigned long flags;
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int inc;
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2013-02-06 14:59:59 +00:00
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inc = 1000000000 / fep->cycle_speed;
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2012-10-30 18:25:31 +00:00
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/* grab the ptp lock */
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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/* 1ns counter */
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writel(inc << FEC_T_INC_OFFSET, fep->hwp + FEC_ATIME_INC);
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/* use free running count */
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writel(0, fep->hwp + FEC_ATIME_EVT_PERIOD);
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writel(FEC_T_CTRL_ENABLE, fep->hwp + FEC_ATIME_CTRL);
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memset(&fep->cc, 0, sizeof(fep->cc));
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fep->cc.read = fec_ptp_read;
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fep->cc.mask = CLOCKSOURCE_MASK(32);
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fep->cc.shift = 31;
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fep->cc.mult = FEC_CC_MULT;
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/* reset the ns time counter */
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timecounter_init(&fep->tc, &fep->cc, ktime_to_ns(ktime_get_real()));
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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}
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/**
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* fec_ptp_adjfreq - adjust ptp cycle frequency
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* @ptp: the ptp clock structure
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* @ppb: parts per billion adjustment from base
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*
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* Adjust the frequency of the ptp cycle counter by the
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* indicated ppb from the base frequency.
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*
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* Because ENET hardware frequency adjust is complex,
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* using software method to do that.
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*/
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static int fec_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
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{
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u64 diff;
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unsigned long flags;
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int neg_adj = 0;
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2012-11-06 20:14:49 +00:00
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u32 mult = FEC_CC_MULT;
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2012-10-30 18:25:31 +00:00
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struct fec_enet_private *fep =
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container_of(ptp, struct fec_enet_private, ptp_caps);
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if (ppb < 0) {
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ppb = -ppb;
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neg_adj = 1;
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}
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2012-11-06 20:14:49 +00:00
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diff = mult;
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diff *= ppb;
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diff = div_u64(diff, 1000000000ULL);
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2012-10-30 18:25:31 +00:00
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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/*
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* dummy read to set cycle_last in tc to now.
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* So use adjusted mult to calculate when next call
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* timercounter_read.
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*/
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timecounter_read(&fep->tc);
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2012-11-06 20:14:49 +00:00
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fep->cc.mult = neg_adj ? mult - diff : mult + diff;
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2012-10-30 18:25:31 +00:00
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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return 0;
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}
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/**
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* fec_ptp_adjtime
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* @ptp: the ptp clock structure
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* @delta: offset to adjust the cycle counter by
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*
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* adjust the timer by resetting the timecounter structure.
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*/
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static int fec_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
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{
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struct fec_enet_private *fep =
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container_of(ptp, struct fec_enet_private, ptp_caps);
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unsigned long flags;
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u64 now;
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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now = timecounter_read(&fep->tc);
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now += delta;
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/* reset the timecounter */
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timecounter_init(&fep->tc, &fep->cc, now);
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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return 0;
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}
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/**
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* fec_ptp_gettime
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* @ptp: the ptp clock structure
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* @ts: timespec structure to hold the current time value
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*
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* read the timecounter and return the correct value on ns,
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* after converting it into a struct timespec.
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*/
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static int fec_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
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{
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struct fec_enet_private *adapter =
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container_of(ptp, struct fec_enet_private, ptp_caps);
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u64 ns;
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u32 remainder;
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unsigned long flags;
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spin_lock_irqsave(&adapter->tmreg_lock, flags);
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ns = timecounter_read(&adapter->tc);
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spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
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ts->tv_sec = div_u64_rem(ns, 1000000000ULL, &remainder);
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ts->tv_nsec = remainder;
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return 0;
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}
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/**
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* fec_ptp_settime
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* @ptp: the ptp clock structure
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* @ts: the timespec containing the new time for the cycle counter
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*
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* reset the timecounter to use a new base value instead of the kernel
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* wall timer value.
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*/
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static int fec_ptp_settime(struct ptp_clock_info *ptp,
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const struct timespec *ts)
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{
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struct fec_enet_private *fep =
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container_of(ptp, struct fec_enet_private, ptp_caps);
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u64 ns;
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unsigned long flags;
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ns = ts->tv_sec * 1000000000ULL;
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ns += ts->tv_nsec;
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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timecounter_init(&fep->tc, &fep->cc, ns);
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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return 0;
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}
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/**
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* fec_ptp_enable
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* @ptp: the ptp clock structure
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* @rq: the requested feature to change
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* @on: whether to enable or disable the feature
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*
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*/
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static int fec_ptp_enable(struct ptp_clock_info *ptp,
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struct ptp_clock_request *rq, int on)
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{
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return -EOPNOTSUPP;
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}
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/**
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* fec_ptp_hwtstamp_ioctl - control hardware time stamping
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* @ndev: pointer to net_device
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* @ifreq: ioctl data
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* @cmd: particular ioctl requested
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*/
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2013-11-18 23:02:44 +00:00
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int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr)
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2012-10-30 18:25:31 +00:00
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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struct hwtstamp_config config;
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if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
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return -EFAULT;
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/* reserved for future extensions */
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if (config.flags)
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return -EINVAL;
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switch (config.tx_type) {
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case HWTSTAMP_TX_OFF:
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fep->hwts_tx_en = 0;
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break;
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case HWTSTAMP_TX_ON:
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fep->hwts_tx_en = 1;
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break;
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default:
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return -ERANGE;
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}
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switch (config.rx_filter) {
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case HWTSTAMP_FILTER_NONE:
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if (fep->hwts_rx_en)
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fep->hwts_rx_en = 0;
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config.rx_filter = HWTSTAMP_FILTER_NONE;
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break;
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default:
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/*
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* register RXMTRL must be set in order to do V1 packets,
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* therefore it is not possible to time stamp both V1 Sync and
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* Delay_Req messages and hardware does not support
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* timestamping all packets => return error
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*/
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fep->hwts_rx_en = 1;
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config.rx_filter = HWTSTAMP_FILTER_ALL;
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break;
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}
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return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
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-EFAULT : 0;
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}
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2013-11-18 23:02:44 +00:00
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int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr)
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{
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struct fec_enet_private *fep = netdev_priv(ndev);
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struct hwtstamp_config config;
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config.flags = 0;
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config.tx_type = fep->hwts_tx_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
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config.rx_filter = (fep->hwts_rx_en ?
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HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
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return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
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-EFAULT : 0;
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}
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2012-10-30 18:25:31 +00:00
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/**
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* fec_time_keep - call timecounter_read every second to avoid timer overrun
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* because ENET just support 32bit counter, will timeout in 4s
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*/
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static void fec_time_keep(unsigned long _data)
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{
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struct fec_enet_private *fep = (struct fec_enet_private *)_data;
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u64 ns;
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unsigned long flags;
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spin_lock_irqsave(&fep->tmreg_lock, flags);
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ns = timecounter_read(&fep->tc);
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spin_unlock_irqrestore(&fep->tmreg_lock, flags);
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mod_timer(&fep->time_keep, jiffies + HZ);
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}
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/**
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* fec_ptp_init
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* @ndev: The FEC network adapter
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*
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* This function performs the required steps for enabling ptp
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* support. If ptp support has already been loaded it simply calls the
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* cyclecounter init routine and exits.
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*/
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2013-06-07 10:48:00 +00:00
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void fec_ptp_init(struct platform_device *pdev)
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2012-10-30 18:25:31 +00:00
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{
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2013-06-07 10:48:00 +00:00
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struct net_device *ndev = platform_get_drvdata(pdev);
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2012-10-30 18:25:31 +00:00
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struct fec_enet_private *fep = netdev_priv(ndev);
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fep->ptp_caps.owner = THIS_MODULE;
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snprintf(fep->ptp_caps.name, 16, "fec ptp");
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fep->ptp_caps.max_adj = 250000000;
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fep->ptp_caps.n_alarm = 0;
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fep->ptp_caps.n_ext_ts = 0;
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fep->ptp_caps.n_per_out = 0;
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fep->ptp_caps.pps = 0;
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fep->ptp_caps.adjfreq = fec_ptp_adjfreq;
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fep->ptp_caps.adjtime = fec_ptp_adjtime;
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fep->ptp_caps.gettime = fec_ptp_gettime;
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fep->ptp_caps.settime = fec_ptp_settime;
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fep->ptp_caps.enable = fec_ptp_enable;
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2013-02-06 14:59:59 +00:00
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fep->cycle_speed = clk_get_rate(fep->clk_ptp);
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2012-10-30 18:25:31 +00:00
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spin_lock_init(&fep->tmreg_lock);
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fec_ptp_start_cyclecounter(ndev);
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init_timer(&fep->time_keep);
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fep->time_keep.data = (unsigned long)fep;
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fep->time_keep.function = fec_time_keep;
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fep->time_keep.expires = jiffies + HZ;
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add_timer(&fep->time_keep);
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fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
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if (IS_ERR(fep->ptp_clock)) {
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fep->ptp_clock = NULL;
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pr_err("ptp_clock_register failed\n");
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}
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}
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