2020-04-04 10:49:55 +00:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2008-07-24 09:27:36 +00:00
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/*
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* MUSB OTG driver defines
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*
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* Copyright 2005 Mentor Graphics Corporation
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* Copyright (C) 2005-2006 by Texas Instruments
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* Copyright (C) 2006-2007 Nokia Corporation
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*/
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#ifndef __MUSB_CORE_H__
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#define __MUSB_CORE_H__
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/interrupt.h>
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#include <linux/errno.h>
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2009-03-31 19:32:12 +00:00
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#include <linux/timer.h>
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2008-07-24 09:27:36 +00:00
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#include <linux/device.h>
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#include <linux/usb/ch9.h>
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#include <linux/usb/gadget.h>
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#include <linux/usb.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/musb.h>
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2013-09-27 06:23:30 +00:00
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#include <linux/phy/phy.h>
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2013-12-18 19:23:46 +00:00
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#include <linux/workqueue.h>
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2008-07-24 09:27:36 +00:00
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struct musb;
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struct musb_hw_ep;
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struct musb_ep;
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2020-01-15 13:25:42 +00:00
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struct musb_qh;
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2008-07-24 09:27:36 +00:00
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2010-01-29 01:43:44 +00:00
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/* Helper defines for struct musb->hwvers */
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#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
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#define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
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#define MUSB_HWVERS_RC 0x8000
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#define MUSB_HWVERS_1300 0x52C
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#define MUSB_HWVERS_1400 0x590
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#define MUSB_HWVERS_1800 0x720
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#define MUSB_HWVERS_1900 0x784
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#define MUSB_HWVERS_2000 0x800
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2008-07-24 09:27:36 +00:00
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#include "musb_debug.h"
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#include "musb_dma.h"
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#include "musb_io.h"
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#include "musb_gadget.h"
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2010-04-24 21:21:52 +00:00
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#include <linux/usb/hcd.h>
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2008-07-24 09:27:36 +00:00
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#include "musb_host.h"
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/* NOTE: otg and peripheral-only state machines start at B_IDLE.
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* OTG or host-only go to A_IDLE when ID is sensed.
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*/
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#define is_peripheral_active(m) (!(m)->is_host)
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#define is_host_active(m) ((m)->is_host)
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/****************************** CONSTANTS ********************************/
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#ifndef MUSB_C_NUM_EPS
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#define MUSB_C_NUM_EPS ((u8)16)
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#endif
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#ifndef MUSB_MAX_END0_PACKET
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#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
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#endif
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/* host side ep0 states */
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enum musb_h_ep0_state {
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MUSB_EP0_IDLE,
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MUSB_EP0_START, /* expect ack of setup */
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MUSB_EP0_IN, /* expect IN DATA */
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MUSB_EP0_OUT, /* expect ack of OUT DATA */
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MUSB_EP0_STATUS, /* expect ack of STATUS */
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} __attribute__ ((packed));
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/* peripheral side ep0 states */
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enum musb_g_ep0_state {
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2009-03-27 19:52:43 +00:00
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MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
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MUSB_EP0_STAGE_SETUP, /* received SETUP */
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2008-07-24 09:27:36 +00:00
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MUSB_EP0_STAGE_TX, /* IN data */
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MUSB_EP0_STAGE_RX, /* OUT data */
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MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
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MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
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MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
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} __attribute__ ((packed));
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2009-03-31 19:32:12 +00:00
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/*
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* OTG protocol constants. See USB OTG 1.3 spec,
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* sections 5.5 "Device Timings" and 6.6.5 "Timers".
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*/
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2008-07-24 09:27:36 +00:00
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#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
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2009-03-31 19:32:12 +00:00
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#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
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#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
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#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
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2008-07-24 09:27:36 +00:00
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/****************************** FUNCTIONS ********************************/
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#define MUSB_HST_MODE(_musb)\
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{ (_musb)->is_host = true; }
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#define MUSB_DEV_MODE(_musb) \
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{ (_musb)->is_host = false; }
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#define test_devctl_hst_mode(_x) \
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(musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
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#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
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/******************************** TYPES *************************************/
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2014-11-24 19:04:59 +00:00
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struct musb_io;
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2010-10-21 10:56:40 +00:00
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/**
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* struct musb_platform_ops - Operations passed to musb_core by HW glue layer
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2014-11-24 19:04:59 +00:00
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* @quirks: flags for platform specific quirks
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* @enable: enable device
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* @disable: disable device
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* @ep_offset: returns the end point offset
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* @ep_select: selects the specified end point
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* @fifo_mode: sets the fifo mode
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* @fifo_offset: returns the fifo offset
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* @readb: read 8 bits
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* @writeb: write 8 bits
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2020-01-15 13:25:44 +00:00
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* @clearb: could be clear-on-readb or W1C
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2014-11-24 19:04:59 +00:00
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* @readw: read 16 bits
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* @writew: write 16 bits
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2020-01-15 13:25:44 +00:00
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* @clearw: could be clear-on-readw or W1C
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2014-11-24 19:04:59 +00:00
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* @read_fifo: reads the fifo
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* @write_fifo: writes to fifo
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2020-01-15 13:25:42 +00:00
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* @get_toggle: platform specific get toggle function
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* @set_toggle: platform specific set toggle function
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2015-05-01 19:29:28 +00:00
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* @dma_init: platform specific dma init function
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* @dma_exit: platform specific dma exit function
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2010-10-21 10:56:40 +00:00
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* @init: turns on clocks, sets up platform-specific registers, etc
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* @exit: undoes @init
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* @set_mode: forcefully changes operating mode
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2015-02-26 20:20:58 +00:00
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* @try_idle: tries to idle the IP
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* @recover: platform-specific babble recovery
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2010-10-21 10:56:40 +00:00
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* @vbus_status: returns vbus status if possible
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* @set_vbus: forces vbus status
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2015-03-29 10:50:47 +00:00
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* @pre_root_reset_end: called before the root usb port reset flag gets cleared
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* @post_root_reset_end: called after the root usb port reset flag gets cleared
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2015-12-01 05:37:12 +00:00
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* @phy_callback: optional callback function for the phy to call
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2010-10-21 10:56:40 +00:00
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*/
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struct musb_platform_ops {
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2014-11-24 19:04:59 +00:00
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2017-06-16 15:40:56 +00:00
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#define MUSB_G_NO_SKB_RESERVE BIT(9)
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2017-04-17 04:21:18 +00:00
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#define MUSB_DA8XX BIT(8)
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2017-02-02 03:30:19 +00:00
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#define MUSB_PRESERVE_SESSION BIT(7)
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2014-11-24 19:04:59 +00:00
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#define MUSB_DMA_UX500 BIT(6)
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#define MUSB_DMA_CPPI41 BIT(5)
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#define MUSB_DMA_CPPI BIT(4)
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#define MUSB_DMA_TUSB_OMAP BIT(3)
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#define MUSB_DMA_INVENTRA BIT(2)
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#define MUSB_IN_TUSB BIT(1)
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#define MUSB_INDEXED_EP BIT(0)
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u32 quirks;
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2010-10-21 10:56:40 +00:00
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int (*init)(struct musb *musb);
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int (*exit)(struct musb *musb);
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void (*enable)(struct musb *musb);
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void (*disable)(struct musb *musb);
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2014-11-24 19:04:59 +00:00
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u32 (*ep_offset)(u8 epnum, u16 offset);
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void (*ep_select)(void __iomem *mbase, u8 epnum);
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u16 fifo_mode;
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u32 (*fifo_offset)(u8 epnum);
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2015-03-20 19:11:12 +00:00
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u32 (*busctl_offset)(u8 epnum, u16 offset);
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2020-01-15 13:25:44 +00:00
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u8 (*readb)(void __iomem *addr, u32 offset);
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void (*writeb)(void __iomem *addr, u32 offset, u8 data);
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u8 (*clearb)(void __iomem *addr, u32 offset);
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u16 (*readw)(void __iomem *addr, u32 offset);
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void (*writew)(void __iomem *addr, u32 offset, u16 data);
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u16 (*clearw)(void __iomem *addr, u32 offset);
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2014-11-24 19:04:59 +00:00
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void (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
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void (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
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2020-01-15 13:25:42 +00:00
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u16 (*get_toggle)(struct musb_qh *qh, int is_out);
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u16 (*set_toggle)(struct musb_qh *qh, int is_out, struct urb *urb);
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2015-05-01 19:29:28 +00:00
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struct dma_controller *
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(*dma_init) (struct musb *musb, void __iomem *base);
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void (*dma_exit)(struct dma_controller *c);
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2010-10-21 10:56:40 +00:00
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int (*set_mode)(struct musb *musb, u8 mode);
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void (*try_idle)(struct musb *musb, unsigned long timeout);
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2015-02-26 20:20:58 +00:00
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int (*recover)(struct musb *musb);
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2010-10-21 10:56:40 +00:00
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int (*vbus_status)(struct musb *musb);
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void (*set_vbus)(struct musb *musb, int on);
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2011-03-31 02:48:54 +00:00
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2015-03-29 10:50:47 +00:00
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void (*pre_root_reset_end)(struct musb *musb);
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void (*post_root_reset_end)(struct musb *musb);
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2016-05-31 15:05:19 +00:00
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int (*phy_callback)(enum musb_vbus_id_status status);
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2017-01-04 00:13:46 +00:00
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void (*clear_ep_rxintr)(struct musb *musb, int epnum);
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2010-10-21 10:56:40 +00:00
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};
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2008-07-24 09:27:36 +00:00
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/*
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* struct musb_hw_ep - endpoint hardware (bidirectional)
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*
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* Ordered slightly for better cacheline locality.
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*/
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struct musb_hw_ep {
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struct musb *musb;
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void __iomem *fifo;
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void __iomem *regs;
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2014-11-24 19:05:06 +00:00
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#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
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2008-07-24 09:27:36 +00:00
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void __iomem *conf;
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#endif
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/* index in musb->endpoints[] */
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u8 epnum;
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/* hardware configuration, possibly dynamic */
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bool is_shared_fifo;
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bool tx_double_buffered;
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bool rx_double_buffered;
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u16 max_packet_sz_tx;
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u16 max_packet_sz_rx;
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struct dma_channel *tx_channel;
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struct dma_channel *rx_channel;
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2014-11-24 19:05:06 +00:00
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#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
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2008-07-24 09:27:36 +00:00
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/* TUSB has "asynchronous" and "synchronous" dma modes */
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dma_addr_t fifo_async;
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dma_addr_t fifo_sync;
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void __iomem *fifo_sync_va;
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#endif
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/* currently scheduled peripheral endpoint */
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struct musb_qh *in_qh;
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struct musb_qh *out_qh;
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u8 rx_reinit;
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u8 tx_reinit;
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/* peripheral side */
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struct musb_ep ep_in; /* TX */
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struct musb_ep ep_out; /* RX */
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};
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2011-02-16 10:40:05 +00:00
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static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
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2008-07-24 09:27:36 +00:00
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{
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return next_request(&hw_ep->ep_in);
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}
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2011-02-16 10:40:05 +00:00
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static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
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2008-07-24 09:27:36 +00:00
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{
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return next_request(&hw_ep->ep_out);
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}
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2010-12-01 11:53:27 +00:00
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struct musb_csr_regs {
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/* FIFO registers */
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u16 txmaxp, txcsr, rxmaxp, rxcsr;
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u16 rxfifoadd, txfifoadd;
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u8 txtype, txinterval, rxtype, rxinterval;
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u8 rxfifosz, txfifosz;
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u8 txfunaddr, txhubaddr, txhubport;
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u8 rxfunaddr, rxhubaddr, rxhubport;
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};
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struct musb_context_registers {
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u8 power;
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u8 intrusbe;
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u16 frame;
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u8 index, testmode;
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u8 devctl, busctl, misc;
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2011-09-07 16:19:24 +00:00
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u32 otg_interfsel;
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2010-12-01 11:53:27 +00:00
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struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
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};
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2008-07-24 09:27:36 +00:00
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/*
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* struct musb - Driver instance data.
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*/
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struct musb {
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/* device lock */
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spinlock_t lock;
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2016-11-16 19:21:23 +00:00
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spinlock_t list_lock; /* resume work list lock */
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2010-12-01 11:22:05 +00:00
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2014-11-24 19:04:59 +00:00
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struct musb_io io;
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2010-12-01 11:22:05 +00:00
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const struct musb_platform_ops *ops;
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2010-12-01 11:53:27 +00:00
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struct musb_context_registers context;
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2010-12-01 11:22:05 +00:00
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2008-07-24 09:27:36 +00:00
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irqreturn_t (*isr)(int, void *);
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2016-11-16 19:21:24 +00:00
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struct delayed_work irq_work;
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2013-12-18 19:23:46 +00:00
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struct delayed_work deassert_reset_work;
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struct delayed_work finish_resume_work;
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2016-05-31 15:05:14 +00:00
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struct delayed_work gadget_work;
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2009-11-16 15:39:21 +00:00
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u16 hwvers;
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2008-07-24 09:27:36 +00:00
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2012-10-30 18:52:25 +00:00
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u16 intrrxe;
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2012-10-30 18:52:26 +00:00
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u16 intrtxe;
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2008-07-24 09:27:36 +00:00
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/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
|
|
|
|
#define MUSB_PORT_STAT_RESUME (1 << 31)
|
|
|
|
|
|
|
|
u32 port1_status;
|
|
|
|
|
|
|
|
unsigned long rh_timer;
|
|
|
|
|
|
|
|
enum musb_h_ep0_state ep0_stage;
|
|
|
|
|
|
|
|
/* bulk traffic normally dedicates endpoint hardware, and each
|
|
|
|
* direction has its own ring of host side endpoints.
|
|
|
|
* we try to progress the transfer at the head of each endpoint's
|
|
|
|
* queue until it completes or NAKs too much; then we try the next
|
|
|
|
* endpoint.
|
|
|
|
*/
|
|
|
|
struct musb_hw_ep *bulk_ep;
|
|
|
|
|
|
|
|
struct list_head control; /* of musb_qh */
|
|
|
|
struct list_head in_bulk; /* of musb_qh */
|
|
|
|
struct list_head out_bulk; /* of musb_qh */
|
2016-11-16 19:21:23 +00:00
|
|
|
struct list_head pending_list; /* pending work list */
|
2009-03-31 19:32:12 +00:00
|
|
|
|
|
|
|
struct timer_list otg_timer;
|
2017-10-24 10:08:35 +00:00
|
|
|
struct timer_list dev_timer;
|
usb: musb: Adding musb support for OMAP4430
OMAP4430 supports UTMI and ULPI types of transceiver interface.
In UTMI mode: The PHY is embedded within OMAP4430. The transceiver functionality
is split between the twl6030 PMIC chip and OMAP4430. The VBUS, ID pin
sensing and OTG SRP generation part is integrated in TWL6030 and UTMI PHY
functionality is embedded within the OMAP4430.
There is no direct interactions between the MUSB controller and TWL6030
chip to communicate the session-valid, session-end and ID-GND events.
It has to be done through a software by setting/resetting bits in
one of the control module register of OMAP4430 which in turn toggles
the appropriate signals to MUSB controller.
musb driver is register for blocking notifications from the transceiver
driver to get the event notifications for connect/disconnect and ID-GND.
Based on these events call the transceiver init/shutdown function to
configure the transceiver to toggle the VBUS valid, session end and ID_GND
signals to musb and power on/off the internal PHY.
For ID_GND event notifications, toggle the ID_GND signal and then wait for
musb to be configured as "A" device, and then call the transceiver function
to set the VBUS.
In OTG mode and musb as a host, When the Micro A connector used, VBUS is turned on
and session bit set. When the device is connected, enumeration goes through.
When the device disconnected from the other end of the connector(ID is still grounded),
link will detect the disconnect and end the session. When the device is connected back,
there are no events generated in the TWL6030-usb, and link is already down.
So the device is not detected. Removed the session bit disable code which
will recognize the connect of the device.
Limitation: In OTG host mode, if device is connected during boot, it does not get
detected. If disconnect and connect it back or connect after boot only it works.
Fix for this, I will submit seperate patch later.
Signed-off-by: Hema HK <hemahk@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 12:40:51 +00:00
|
|
|
struct notifier_block nb;
|
2008-07-24 09:27:36 +00:00
|
|
|
|
|
|
|
struct dma_controller *dma_controller;
|
|
|
|
|
|
|
|
struct device *controller;
|
|
|
|
void __iomem *ctrl_base;
|
|
|
|
void __iomem *mregs;
|
|
|
|
|
2014-11-24 19:05:06 +00:00
|
|
|
#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
|
2008-07-24 09:27:36 +00:00
|
|
|
dma_addr_t async;
|
|
|
|
dma_addr_t sync;
|
|
|
|
void __iomem *sync_va;
|
2014-05-16 14:19:54 +00:00
|
|
|
u8 tusb_revision;
|
2008-07-24 09:27:36 +00:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* passed down from chip/board specific irq handlers */
|
|
|
|
u8 int_usb;
|
|
|
|
u16 int_rx;
|
|
|
|
u16 int_tx;
|
|
|
|
|
2012-02-13 11:24:02 +00:00
|
|
|
struct usb_phy *xceiv;
|
2013-09-27 06:23:30 +00:00
|
|
|
struct phy *phy;
|
2008-07-24 09:27:36 +00:00
|
|
|
|
2022-10-26 18:26:53 +00:00
|
|
|
enum usb_otg_state otg_state;
|
|
|
|
|
2008-07-24 09:27:36 +00:00
|
|
|
int nIrq;
|
2008-11-24 11:06:53 +00:00
|
|
|
unsigned irq_wake:1;
|
2008-07-24 09:27:36 +00:00
|
|
|
|
|
|
|
struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
|
|
|
|
#define control_ep endpoints
|
|
|
|
|
|
|
|
#define VBUSERR_RETRY_COUNT 3
|
|
|
|
u16 vbuserr_retry;
|
|
|
|
u16 epmask;
|
|
|
|
u8 nr_endpoints;
|
|
|
|
|
|
|
|
u8 min_power; /* vbus for periph, in mA/2 */
|
|
|
|
|
2018-05-21 13:42:15 +00:00
|
|
|
enum musb_mode port_mode;
|
2016-09-13 02:48:28 +00:00
|
|
|
bool session;
|
2016-11-16 19:21:24 +00:00
|
|
|
unsigned long quirk_retries;
|
2008-07-24 09:27:36 +00:00
|
|
|
bool is_host;
|
|
|
|
|
|
|
|
int a_wait_bcon; /* VBUS timeout in msecs */
|
|
|
|
unsigned long idle_timeout; /* Next timeout in jiffies */
|
|
|
|
|
2016-11-16 19:21:22 +00:00
|
|
|
unsigned is_initialized:1;
|
2016-11-16 19:21:23 +00:00
|
|
|
unsigned is_runtime_suspended:1;
|
2016-11-16 19:21:22 +00:00
|
|
|
|
2008-07-24 09:27:36 +00:00
|
|
|
/* active means connected and not suspended */
|
|
|
|
unsigned is_active:1;
|
|
|
|
|
|
|
|
unsigned is_multipoint:1;
|
|
|
|
|
2009-04-03 23:16:17 +00:00
|
|
|
unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
|
|
|
|
unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
|
2009-12-28 11:40:41 +00:00
|
|
|
unsigned dyn_fifo:1; /* dynamic FIFO supported? */
|
2009-04-03 23:16:17 +00:00
|
|
|
|
2009-12-15 09:08:39 +00:00
|
|
|
unsigned bulk_split:1;
|
2021-04-18 17:47:20 +00:00
|
|
|
#define can_bulk_split(musb, type) \
|
2009-12-15 09:08:39 +00:00
|
|
|
(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
|
2008-07-24 09:27:36 +00:00
|
|
|
|
2009-12-15 09:08:39 +00:00
|
|
|
unsigned bulk_combine:1;
|
2021-04-18 17:47:20 +00:00
|
|
|
#define can_bulk_combine(musb, type) \
|
2009-12-15 09:08:39 +00:00
|
|
|
(((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
|
2008-07-24 09:27:36 +00:00
|
|
|
|
|
|
|
/* is_suspended means USB B_PERIPHERAL suspend */
|
|
|
|
unsigned is_suspended:1;
|
|
|
|
|
|
|
|
/* may_wakeup means remote wakeup is enabled */
|
|
|
|
unsigned may_wakeup:1;
|
|
|
|
|
|
|
|
/* is_self_powered is reported in device status and the
|
|
|
|
* config descriptor. is_bus_powered means B_PERIPHERAL
|
|
|
|
* draws some VBUS current; both can be true.
|
|
|
|
*/
|
|
|
|
unsigned is_self_powered:1;
|
|
|
|
unsigned is_bus_powered:1;
|
|
|
|
|
|
|
|
unsigned set_address:1;
|
|
|
|
unsigned test_mode:1;
|
|
|
|
unsigned softconnect:1;
|
2011-02-11 08:00:02 +00:00
|
|
|
|
2017-10-10 03:46:08 +00:00
|
|
|
unsigned flush_irq_work:1;
|
|
|
|
|
2011-02-11 08:00:02 +00:00
|
|
|
u8 address;
|
|
|
|
u8 test_mode_nr;
|
|
|
|
u16 ackpend; /* ep0 */
|
|
|
|
enum musb_g_ep0_state ep0_state;
|
|
|
|
struct usb_gadget g; /* the gadget */
|
|
|
|
struct usb_gadget_driver *gadget_driver; /* its driver */
|
2013-04-10 19:55:45 +00:00
|
|
|
struct usb_hcd *hcd; /* the usb hcd */
|
2011-02-11 08:00:02 +00:00
|
|
|
|
2016-02-24 15:27:16 +00:00
|
|
|
const struct musb_hdrc_config *config;
|
2008-08-08 09:40:54 +00:00
|
|
|
|
2012-08-31 11:09:50 +00:00
|
|
|
int xceiv_old_state;
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
struct dentry *debugfs_root;
|
2008-07-24 09:27:36 +00:00
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
2015-03-20 19:11:12 +00:00
|
|
|
/* This must be included after struct musb is defined */
|
|
|
|
#include "musb_regs.h"
|
|
|
|
|
2008-07-24 09:27:36 +00:00
|
|
|
static inline struct musb *gadget_to_musb(struct usb_gadget *g)
|
|
|
|
{
|
|
|
|
return container_of(g, struct musb, g);
|
|
|
|
}
|
|
|
|
|
2017-08-24 16:38:32 +00:00
|
|
|
static inline char *musb_ep_xfertype_string(u8 type)
|
|
|
|
{
|
|
|
|
char *s;
|
|
|
|
|
|
|
|
switch (type) {
|
|
|
|
case USB_ENDPOINT_XFER_CONTROL:
|
|
|
|
s = "ctrl";
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_ISOC:
|
|
|
|
s = "iso";
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
|
s = "bulk";
|
|
|
|
break;
|
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
|
s = "int";
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
s = "";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return s;
|
|
|
|
}
|
|
|
|
|
2008-12-02 19:33:48 +00:00
|
|
|
static inline int musb_read_fifosize(struct musb *musb,
|
|
|
|
struct musb_hw_ep *hw_ep, u8 epnum)
|
|
|
|
{
|
2012-08-07 11:00:50 +00:00
|
|
|
void __iomem *mbase = musb->mregs;
|
2008-12-02 19:33:48 +00:00
|
|
|
u8 reg = 0;
|
|
|
|
|
|
|
|
/* read from core using indexed model */
|
2014-11-24 19:05:03 +00:00
|
|
|
reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
|
2008-12-02 19:33:48 +00:00
|
|
|
/* 0's returned when no more endpoints */
|
|
|
|
if (!reg)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
musb->nr_endpoints++;
|
|
|
|
musb->epmask |= (1 << epnum);
|
|
|
|
|
|
|
|
hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
|
|
|
|
|
|
|
|
/* shared TX/RX FIFO? */
|
|
|
|
if ((reg & 0xf0) == 0xf0) {
|
|
|
|
hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
|
|
|
|
hw_ep->is_shared_fifo = true;
|
|
|
|
return 0;
|
|
|
|
} else {
|
|
|
|
hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
|
|
|
|
hw_ep->is_shared_fifo = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void musb_configure_ep0(struct musb *musb)
|
|
|
|
{
|
|
|
|
musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
|
|
|
|
musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
|
2009-02-24 23:27:34 +00:00
|
|
|
musb->endpoints[0].is_shared_fifo = true;
|
2008-12-02 19:33:48 +00:00
|
|
|
}
|
2008-07-24 09:27:36 +00:00
|
|
|
|
|
|
|
/***************************** Glue it together *****************************/
|
|
|
|
|
|
|
|
extern const char musb_driver_name[];
|
|
|
|
|
|
|
|
extern void musb_stop(struct musb *musb);
|
2013-10-11 08:38:13 +00:00
|
|
|
extern void musb_start(struct musb *musb);
|
2008-07-24 09:27:36 +00:00
|
|
|
|
|
|
|
extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
|
|
|
|
extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
|
|
|
|
|
2020-01-15 13:25:29 +00:00
|
|
|
extern int musb_set_host(struct musb *musb);
|
|
|
|
extern int musb_set_peripheral(struct musb *musb);
|
|
|
|
|
2008-07-24 09:27:36 +00:00
|
|
|
extern void musb_load_testpacket(struct musb *);
|
|
|
|
|
|
|
|
extern irqreturn_t musb_interrupt(struct musb *);
|
|
|
|
|
|
|
|
extern void musb_hnp_stop(struct musb *musb);
|
|
|
|
|
2016-11-16 19:21:23 +00:00
|
|
|
int musb_queue_resume_work(struct musb *musb,
|
|
|
|
int (*callback)(struct musb *musb, void *data),
|
|
|
|
void *data);
|
|
|
|
|
2010-12-01 11:22:05 +00:00
|
|
|
static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
|
|
|
|
{
|
|
|
|
if (musb->ops->set_vbus)
|
|
|
|
musb->ops->set_vbus(musb, is_on);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void musb_platform_enable(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (musb->ops->enable)
|
|
|
|
musb->ops->enable(musb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void musb_platform_disable(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (musb->ops->disable)
|
|
|
|
musb->ops->disable(musb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
|
|
|
|
{
|
|
|
|
if (!musb->ops->set_mode)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return musb->ops->set_mode(musb, mode);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void musb_platform_try_idle(struct musb *musb,
|
|
|
|
unsigned long timeout)
|
|
|
|
{
|
|
|
|
if (musb->ops->try_idle)
|
|
|
|
musb->ops->try_idle(musb, timeout);
|
|
|
|
}
|
|
|
|
|
2015-02-26 20:20:58 +00:00
|
|
|
static inline int musb_platform_recover(struct musb *musb)
|
2014-04-02 11:58:27 +00:00
|
|
|
{
|
2015-02-26 20:20:58 +00:00
|
|
|
if (!musb->ops->recover)
|
|
|
|
return 0;
|
2014-07-16 12:52:11 +00:00
|
|
|
|
2015-02-26 20:20:58 +00:00
|
|
|
return musb->ops->recover(musb);
|
2014-04-02 11:58:27 +00:00
|
|
|
}
|
|
|
|
|
2010-12-01 11:22:05 +00:00
|
|
|
static inline int musb_platform_get_vbus_status(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (!musb->ops->vbus_status)
|
2015-10-12 14:14:32 +00:00
|
|
|
return -EINVAL;
|
2010-12-01 11:22:05 +00:00
|
|
|
|
|
|
|
return musb->ops->vbus_status(musb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int musb_platform_init(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (!musb->ops->init)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return musb->ops->init(musb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int musb_platform_exit(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (!musb->ops->exit)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return musb->ops->exit(musb);
|
|
|
|
}
|
|
|
|
|
2015-03-29 10:50:47 +00:00
|
|
|
static inline void musb_platform_pre_root_reset_end(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (musb->ops->pre_root_reset_end)
|
|
|
|
musb->ops->pre_root_reset_end(musb);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void musb_platform_post_root_reset_end(struct musb *musb)
|
|
|
|
{
|
|
|
|
if (musb->ops->post_root_reset_end)
|
|
|
|
musb->ops->post_root_reset_end(musb);
|
|
|
|
}
|
|
|
|
|
2017-01-04 00:13:46 +00:00
|
|
|
static inline void musb_platform_clear_ep_rxintr(struct musb *musb, int epnum)
|
|
|
|
{
|
|
|
|
if (musb->ops->clear_ep_rxintr)
|
|
|
|
musb->ops->clear_ep_rxintr(musb, epnum);
|
|
|
|
}
|
|
|
|
|
2022-10-26 18:26:51 +00:00
|
|
|
static inline void musb_set_state(struct musb *musb,
|
|
|
|
enum usb_otg_state otg_state)
|
|
|
|
{
|
2022-10-26 18:26:53 +00:00
|
|
|
if (musb->xceiv)
|
|
|
|
musb->xceiv->otg->state = otg_state;
|
|
|
|
else
|
|
|
|
musb->otg_state = otg_state;
|
2022-10-26 18:26:51 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline enum usb_otg_state musb_get_state(struct musb *musb)
|
|
|
|
{
|
2022-10-26 18:26:53 +00:00
|
|
|
if (musb->xceiv)
|
|
|
|
return musb->xceiv->otg->state;
|
|
|
|
|
|
|
|
return musb->otg_state;
|
2022-10-26 18:26:51 +00:00
|
|
|
}
|
|
|
|
|
2022-10-26 18:26:52 +00:00
|
|
|
static inline const char *musb_otg_state_string(struct musb *musb)
|
|
|
|
{
|
|
|
|
return usb_otg_state_string(musb_get_state(musb));
|
|
|
|
}
|
|
|
|
|
2016-11-21 14:59:28 +00:00
|
|
|
/*
|
|
|
|
* gets the "dr_mode" property from DT and converts it into musb_mode
|
|
|
|
* if the property is not found or not recognized returns MUSB_OTG
|
|
|
|
*/
|
|
|
|
extern enum musb_mode musb_get_mode(struct device *dev);
|
|
|
|
|
2008-07-24 09:27:36 +00:00
|
|
|
#endif /* __MUSB_CORE_H__ */
|