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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-04 09:59:32 +00:00
647 lines
18 KiB
C
647 lines
18 KiB
C
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/*******************************************************************
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* This file is part of the Emulex Linux Device Driver for *
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* Enterprise Fibre Channel Host Bus Adapters. *
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* Refer to the README file included with this package for *
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* driver version and adapter support. *
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* Copyright (C) 2004 Emulex Corporation. *
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* www.emulex.com *
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* *
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* This program is free software; you can redistribute it and/or *
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* modify it under the terms of the GNU General Public License *
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* as published by the Free Software Foundation; either version 2 *
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* of the License, or (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details, a copy of which *
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* can be found in the file COPYING included with this package. *
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*******************************************************************/
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/*
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* $Id: lpfc_mbox.c 1.85 2005/04/13 11:59:11EDT sf_support Exp $
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*/
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#include <linux/blkdev.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include "lpfc_hw.h"
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#include "lpfc_sli.h"
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#include "lpfc_disc.h"
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#include "lpfc_scsi.h"
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#include "lpfc.h"
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#include "lpfc_logmsg.h"
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#include "lpfc_crtn.h"
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#include "lpfc_compat.h"
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/**********************************************/
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/* mailbox command */
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/**********************************************/
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void
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lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
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{
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MAILBOX_t *mb;
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void *ctx;
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mb = &pmb->mb;
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ctx = pmb->context2;
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/* Setup to dump VPD region */
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->mbxCommand = MBX_DUMP_MEMORY;
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mb->un.varDmp.cv = 1;
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mb->un.varDmp.type = DMP_NV_PARAMS;
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mb->un.varDmp.entry_index = offset;
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mb->un.varDmp.region_id = DMP_REGION_VPD;
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mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
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mb->un.varDmp.co = 0;
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mb->un.varDmp.resp_offset = 0;
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pmb->context2 = ctx;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/**********************************************/
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/* lpfc_read_nv Issue a READ NVPARAM */
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/* mailbox command */
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/**********************************************/
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void
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lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->mbxCommand = MBX_READ_NV;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/**********************************************/
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/* lpfc_read_la Issue a READ LA */
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/* mailbox command */
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/**********************************************/
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int
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lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
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{
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MAILBOX_t *mb;
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struct lpfc_sli *psli;
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psli = &phba->sli;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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INIT_LIST_HEAD(&mp->list);
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mb->mbxCommand = MBX_READ_LA64;
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mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
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mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
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mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
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/* Save address for later completion and set the owner to host so that
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* the FW knows this mailbox is available for processing.
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*/
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pmb->context1 = (uint8_t *) mp;
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mb->mbxOwner = OWN_HOST;
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return (0);
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}
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/**********************************************/
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/* lpfc_clear_la Issue a CLEAR LA */
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/* mailbox command */
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/**********************************************/
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void
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lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->un.varClearLA.eventTag = phba->fc_eventTag;
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mb->mbxCommand = MBX_CLEAR_LA;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/**************************************************/
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/* lpfc_config_link Issue a CONFIG LINK */
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/* mailbox command */
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/**************************************************/
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void
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lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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/* NEW_FEATURE
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* SLI-2, Coalescing Response Feature.
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*/
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if (phba->cfg_cr_delay) {
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mb->un.varCfgLnk.cr = 1;
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mb->un.varCfgLnk.ci = 1;
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mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
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mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
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}
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mb->un.varCfgLnk.myId = phba->fc_myDID;
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mb->un.varCfgLnk.edtov = phba->fc_edtov;
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mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
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mb->un.varCfgLnk.ratov = phba->fc_ratov;
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mb->un.varCfgLnk.rttov = phba->fc_rttov;
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mb->un.varCfgLnk.altov = phba->fc_altov;
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mb->un.varCfgLnk.crtov = phba->fc_crtov;
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mb->un.varCfgLnk.citov = phba->fc_citov;
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if (phba->cfg_ack0)
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mb->un.varCfgLnk.ack0_enable = 1;
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mb->mbxCommand = MBX_CONFIG_LINK;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/**********************************************/
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/* lpfc_init_link Issue an INIT LINK */
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/* mailbox command */
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/**********************************************/
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void
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lpfc_init_link(struct lpfc_hba * phba,
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LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
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{
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lpfc_vpd_t *vpd;
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struct lpfc_sli *psli;
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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psli = &phba->sli;
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switch (topology) {
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case FLAGS_TOPOLOGY_MODE_LOOP_PT:
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mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
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mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
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break;
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case FLAGS_TOPOLOGY_MODE_PT_PT:
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mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
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break;
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case FLAGS_TOPOLOGY_MODE_LOOP:
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mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
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break;
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case FLAGS_TOPOLOGY_MODE_PT_LOOP:
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mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
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mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
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break;
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}
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/* NEW_FEATURE
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* Setting up the link speed
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*/
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vpd = &phba->vpd;
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if (vpd->rev.feaLevelHigh >= 0x02){
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switch(linkspeed){
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case LINK_SPEED_1G:
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case LINK_SPEED_2G:
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case LINK_SPEED_4G:
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mb->un.varInitLnk.link_flags |=
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FLAGS_LINK_SPEED;
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mb->un.varInitLnk.link_speed = linkspeed;
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break;
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case LINK_SPEED_AUTO:
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default:
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mb->un.varInitLnk.link_speed =
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LINK_SPEED_AUTO;
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break;
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}
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}
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else
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mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
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mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
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mb->mbxOwner = OWN_HOST;
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mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
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return;
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}
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/**********************************************/
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/* lpfc_read_sparam Issue a READ SPARAM */
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/* mailbox command */
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/**********************************************/
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int
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lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
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{
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struct lpfc_dmabuf *mp;
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MAILBOX_t *mb;
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struct lpfc_sli *psli;
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psli = &phba->sli;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->mbxOwner = OWN_HOST;
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/* Get a buffer to hold the HBAs Service Parameters */
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if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
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((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
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if (mp)
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kfree(mp);
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mb->mbxCommand = MBX_READ_SPARM64;
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/* READ_SPARAM: no buffers */
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lpfc_printf_log(phba,
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KERN_WARNING,
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LOG_MBOX,
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"%d:0301 READ_SPARAM: no buffers\n",
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phba->brd_no);
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return (1);
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}
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INIT_LIST_HEAD(&mp->list);
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mb->mbxCommand = MBX_READ_SPARM64;
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mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
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mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
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mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
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/* save address for completion */
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pmb->context1 = mp;
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return (0);
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}
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/********************************************/
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/* lpfc_unreg_did Issue a UNREG_DID */
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/* mailbox command */
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/********************************************/
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void
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lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->un.varUnregDID.did = did;
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mb->mbxCommand = MBX_UNREG_D_ID;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/***********************************************/
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/* command to write slim */
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/***********************************************/
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void
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lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
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uint32_t value)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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/* addr = 0x090597 is AUTO ABTS disable for ELS commands */
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/* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
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/*
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* Always turn on DELAYED ABTS for ELS timeouts
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*/
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if ((addr == 0x052198) && (value == 0))
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value = 1;
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mb->un.varWords[0] = addr;
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mb->un.varWords[1] = value;
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mb->mbxCommand = MBX_SET_SLIM;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/**********************************************/
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/* lpfc_read_nv Issue a READ CONFIG */
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/* mailbox command */
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/**********************************************/
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void
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lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->mbxCommand = MBX_READ_CONFIG;
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mb->mbxOwner = OWN_HOST;
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return;
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}
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/********************************************/
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/* lpfc_reg_login Issue a REG_LOGIN */
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/* mailbox command */
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/********************************************/
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int
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lpfc_reg_login(struct lpfc_hba * phba,
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uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
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{
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uint8_t *sparam;
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struct lpfc_dmabuf *mp;
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MAILBOX_t *mb;
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struct lpfc_sli *psli;
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psli = &phba->sli;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->un.varRegLogin.rpi = 0;
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mb->un.varRegLogin.did = did;
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mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
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mb->mbxOwner = OWN_HOST;
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/* Get a buffer to hold NPorts Service Parameters */
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if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
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((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
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if (mp)
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kfree(mp);
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mb->mbxCommand = MBX_REG_LOGIN64;
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/* REG_LOGIN: no buffers */
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lpfc_printf_log(phba,
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KERN_WARNING,
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LOG_MBOX,
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"%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
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phba->brd_no,
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(uint32_t) did, (uint32_t) flag);
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return (1);
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}
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INIT_LIST_HEAD(&mp->list);
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sparam = mp->virt;
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/* Copy param's into a new buffer */
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memcpy(sparam, param, sizeof (struct serv_parm));
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/* save address for completion */
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pmb->context1 = (uint8_t *) mp;
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mb->mbxCommand = MBX_REG_LOGIN64;
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mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
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mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
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mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
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return (0);
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}
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/**********************************************/
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/* lpfc_unreg_login Issue a UNREG_LOGIN */
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/* mailbox command */
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/**********************************************/
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void
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lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
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{
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MAILBOX_t *mb;
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mb = &pmb->mb;
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memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
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mb->un.varUnregLogin.rpi = (uint16_t) rpi;
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mb->un.varUnregLogin.rsvd1 = 0;
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mb->mbxCommand = MBX_UNREG_LOGIN;
|
||
|
mb->mbxOwner = OWN_HOST;
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
static void
|
||
|
lpfc_config_pcb_setup(struct lpfc_hba * phba)
|
||
|
{
|
||
|
struct lpfc_sli *psli = &phba->sli;
|
||
|
struct lpfc_sli_ring *pring;
|
||
|
PCB_t *pcbp = &phba->slim2p->pcb;
|
||
|
dma_addr_t pdma_addr;
|
||
|
uint32_t offset;
|
||
|
uint32_t iocbCnt;
|
||
|
int i;
|
||
|
|
||
|
psli->MBhostaddr = (uint32_t *)&phba->slim2p->mbx;
|
||
|
pcbp->maxRing = (psli->num_rings - 1);
|
||
|
|
||
|
iocbCnt = 0;
|
||
|
for (i = 0; i < psli->num_rings; i++) {
|
||
|
pring = &psli->ring[i];
|
||
|
/* A ring MUST have both cmd and rsp entries defined to be
|
||
|
valid */
|
||
|
if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
|
||
|
pcbp->rdsc[i].cmdEntries = 0;
|
||
|
pcbp->rdsc[i].rspEntries = 0;
|
||
|
pcbp->rdsc[i].cmdAddrHigh = 0;
|
||
|
pcbp->rdsc[i].rspAddrHigh = 0;
|
||
|
pcbp->rdsc[i].cmdAddrLow = 0;
|
||
|
pcbp->rdsc[i].rspAddrLow = 0;
|
||
|
pring->cmdringaddr = NULL;
|
||
|
pring->rspringaddr = NULL;
|
||
|
continue;
|
||
|
}
|
||
|
/* Command ring setup for ring */
|
||
|
pring->cmdringaddr =
|
||
|
(void *)&phba->slim2p->IOCBs[iocbCnt];
|
||
|
pcbp->rdsc[i].cmdEntries = pring->numCiocb;
|
||
|
|
||
|
offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
|
||
|
(uint8_t *)phba->slim2p;
|
||
|
pdma_addr = phba->slim2p_mapping + offset;
|
||
|
pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
|
||
|
pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
|
||
|
iocbCnt += pring->numCiocb;
|
||
|
|
||
|
/* Response ring setup for ring */
|
||
|
pring->rspringaddr =
|
||
|
(void *)&phba->slim2p->IOCBs[iocbCnt];
|
||
|
|
||
|
pcbp->rdsc[i].rspEntries = pring->numRiocb;
|
||
|
offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
|
||
|
(uint8_t *)phba->slim2p;
|
||
|
pdma_addr = phba->slim2p_mapping + offset;
|
||
|
pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
|
||
|
pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
|
||
|
iocbCnt += pring->numRiocb;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void
|
||
|
lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
|
||
|
{
|
||
|
MAILBOX_t *mb;
|
||
|
|
||
|
mb = &pmb->mb;
|
||
|
memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
|
||
|
mb->un.varRdRev.cv = 1;
|
||
|
mb->mbxCommand = MBX_READ_REV;
|
||
|
mb->mbxOwner = OWN_HOST;
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
|
||
|
{
|
||
|
int i;
|
||
|
MAILBOX_t *mb = &pmb->mb;
|
||
|
struct lpfc_sli *psli;
|
||
|
struct lpfc_sli_ring *pring;
|
||
|
|
||
|
memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
|
||
|
|
||
|
mb->un.varCfgRing.ring = ring;
|
||
|
mb->un.varCfgRing.maxOrigXchg = 0;
|
||
|
mb->un.varCfgRing.maxRespXchg = 0;
|
||
|
mb->un.varCfgRing.recvNotify = 1;
|
||
|
|
||
|
psli = &phba->sli;
|
||
|
pring = &psli->ring[ring];
|
||
|
mb->un.varCfgRing.numMask = pring->num_mask;
|
||
|
mb->mbxCommand = MBX_CONFIG_RING;
|
||
|
mb->mbxOwner = OWN_HOST;
|
||
|
|
||
|
/* Is this ring configured for a specific profile */
|
||
|
if (pring->prt[0].profile) {
|
||
|
mb->un.varCfgRing.profile = pring->prt[0].profile;
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
/* Otherwise we setup specific rctl / type masks for this ring */
|
||
|
for (i = 0; i < pring->num_mask; i++) {
|
||
|
mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
|
||
|
if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
|
||
|
mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
|
||
|
else
|
||
|
mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
|
||
|
mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
|
||
|
mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
|
||
|
}
|
||
|
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
|
||
|
{
|
||
|
MAILBOX_t *mb = &pmb->mb;
|
||
|
dma_addr_t pdma_addr;
|
||
|
uint32_t bar_low, bar_high;
|
||
|
size_t offset;
|
||
|
HGP hgp;
|
||
|
void __iomem *to_slim;
|
||
|
|
||
|
memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
|
||
|
mb->mbxCommand = MBX_CONFIG_PORT;
|
||
|
mb->mbxOwner = OWN_HOST;
|
||
|
|
||
|
mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
|
||
|
|
||
|
offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
|
||
|
pdma_addr = phba->slim2p_mapping + offset;
|
||
|
mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
|
||
|
mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
|
||
|
|
||
|
/* Now setup pcb */
|
||
|
phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
|
||
|
phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
|
||
|
|
||
|
/* Setup Mailbox pointers */
|
||
|
phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
|
||
|
offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
|
||
|
pdma_addr = phba->slim2p_mapping + offset;
|
||
|
phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
|
||
|
phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
|
||
|
|
||
|
/*
|
||
|
* Setup Host Group ring pointer.
|
||
|
*
|
||
|
* For efficiency reasons, the ring get/put pointers can be
|
||
|
* placed in adapter memory (SLIM) rather than in host memory.
|
||
|
* This allows firmware to avoid PCI reads/writes when updating
|
||
|
* and checking pointers.
|
||
|
*
|
||
|
* The firmware recognizes the use of SLIM memory by comparing
|
||
|
* the address of the get/put pointers structure with that of
|
||
|
* the SLIM BAR (BAR0).
|
||
|
*
|
||
|
* Caution: be sure to use the PCI config space value of BAR0/BAR1
|
||
|
* (the hardware's view of the base address), not the OS's
|
||
|
* value of pci_resource_start() as the OS value may be a cookie
|
||
|
* for ioremap/iomap.
|
||
|
*/
|
||
|
|
||
|
|
||
|
pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
|
||
|
pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
|
||
|
|
||
|
|
||
|
/* mask off BAR0's flag bits 0 - 3 */
|
||
|
phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
|
||
|
(SLIMOFF*sizeof(uint32_t));
|
||
|
if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
|
||
|
phba->slim2p->pcb.hgpAddrHigh = bar_high;
|
||
|
else
|
||
|
phba->slim2p->pcb.hgpAddrHigh = 0;
|
||
|
/* write HGP data to SLIM at the required longword offset */
|
||
|
memset(&hgp, 0, sizeof(HGP));
|
||
|
to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
|
||
|
lpfc_memcpy_to_slim(to_slim, &hgp, sizeof (HGP));
|
||
|
|
||
|
/* Setup Port Group ring pointer */
|
||
|
offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
|
||
|
(uint8_t *)phba->slim2p;
|
||
|
pdma_addr = phba->slim2p_mapping + offset;
|
||
|
phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
|
||
|
phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
|
||
|
|
||
|
/* Use callback routine to setp rings in the pcb */
|
||
|
lpfc_config_pcb_setup(phba);
|
||
|
|
||
|
/* special handling for LC HBAs */
|
||
|
if (lpfc_is_LC_HBA(phba->pcidev->device)) {
|
||
|
uint32_t hbainit[5];
|
||
|
|
||
|
lpfc_hba_init(phba, hbainit);
|
||
|
|
||
|
memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
|
||
|
}
|
||
|
|
||
|
/* Swap PCB if needed */
|
||
|
lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
|
||
|
sizeof (PCB_t));
|
||
|
|
||
|
lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
|
||
|
"%d:0405 Service Level Interface (SLI) 2 selected\n",
|
||
|
phba->brd_no);
|
||
|
}
|
||
|
|
||
|
void
|
||
|
lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
|
||
|
{
|
||
|
struct lpfc_sli *psli;
|
||
|
|
||
|
psli = &phba->sli;
|
||
|
|
||
|
list_add_tail(&mbq->list, &psli->mboxq);
|
||
|
|
||
|
psli->mboxq_cnt++;
|
||
|
|
||
|
return;
|
||
|
}
|
||
|
|
||
|
LPFC_MBOXQ_t *
|
||
|
lpfc_mbox_get(struct lpfc_hba * phba)
|
||
|
{
|
||
|
LPFC_MBOXQ_t *mbq = NULL;
|
||
|
struct lpfc_sli *psli = &phba->sli;
|
||
|
|
||
|
list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
|
||
|
list);
|
||
|
if (mbq) {
|
||
|
psli->mboxq_cnt--;
|
||
|
}
|
||
|
|
||
|
return mbq;
|
||
|
}
|