2013-11-30 11:42:06 +00:00
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/*
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* Broadcom BCM63XX High Speed SPI Controller driver
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*
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* Copyright 2000-2010 Broadcom Corporation
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* Copyright 2012-2013 Jonas Gorski <jogo@openwrt.org>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/spi/spi.h>
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#include <linux/mutex.h>
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2017-03-01 09:08:14 +00:00
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#include <linux/of.h>
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2020-06-16 17:32:35 +00:00
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#include <linux/reset.h>
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2021-02-23 15:18:51 +00:00
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#include <linux/pm_runtime.h>
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2013-11-30 11:42:06 +00:00
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#define HSSPI_GLOBAL_CTRL_REG 0x0
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#define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
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#define GLOBAL_CTRL_CS_POLARITY_MASK 0x000000ff
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#define GLOBAL_CTRL_PLL_CLK_CTRL_SHIFT 8
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#define GLOBAL_CTRL_PLL_CLK_CTRL_MASK 0x0000ff00
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#define GLOBAL_CTRL_CLK_GATE_SSOFF BIT(16)
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#define GLOBAL_CTRL_CLK_POLARITY BIT(17)
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#define GLOBAL_CTRL_MOSI_IDLE BIT(18)
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#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4
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#define HSSPI_INT_STATUS_REG 0x8
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#define HSSPI_INT_STATUS_MASKED_REG 0xc
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#define HSSPI_INT_MASK_REG 0x10
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#define HSSPI_PINGx_CMD_DONE(i) BIT((i * 8) + 0)
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#define HSSPI_PINGx_RX_OVER(i) BIT((i * 8) + 1)
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#define HSSPI_PINGx_TX_UNDER(i) BIT((i * 8) + 2)
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#define HSSPI_PINGx_POLL_TIMEOUT(i) BIT((i * 8) + 3)
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#define HSSPI_PINGx_CTRL_INVAL(i) BIT((i * 8) + 4)
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#define HSSPI_INT_CLEAR_ALL 0xff001f1f
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#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40)
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#define PINGPONG_CMD_COMMAND_MASK 0xf
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#define PINGPONG_COMMAND_NOOP 0
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#define PINGPONG_COMMAND_START_NOW 1
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#define PINGPONG_COMMAND_START_TRIGGER 2
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#define PINGPONG_COMMAND_HALT 3
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#define PINGPONG_COMMAND_FLUSH 4
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#define PINGPONG_CMD_PROFILE_SHIFT 8
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#define PINGPONG_CMD_SS_SHIFT 12
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#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40)
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spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
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#define HSSPI_PINGPONG_STATUS_SRC_BUSY BIT(1)
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2013-11-30 11:42:06 +00:00
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#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20)
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#define CLK_CTRL_FREQ_CTRL_MASK 0x0000ffff
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#define CLK_CTRL_SPI_CLK_2X_SEL BIT(14)
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#define CLK_CTRL_ACCUM_RST_ON_LOOP BIT(15)
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#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20)
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#define SIGNAL_CTRL_LATCH_RISING BIT(12)
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#define SIGNAL_CTRL_LAUNCH_RISING BIT(13)
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#define SIGNAL_CTRL_ASYNC_INPUT_PATH BIT(16)
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#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20)
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#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8
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#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12
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#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16
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#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18
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#define MODE_CTRL_MODE_3WIRE BIT(20)
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#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24
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#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200)
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2015-08-23 20:49:32 +00:00
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#define HSSPI_OP_MULTIBIT BIT(11)
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2013-11-30 11:42:06 +00:00
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#define HSSPI_OP_CODE_SHIFT 13
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#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_OP_SETIRQ (4 << HSSPI_OP_CODE_SHIFT)
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#define HSSPI_BUFFER_LEN 512
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#define HSSPI_OPCODE_LEN 2
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#define HSSPI_MAX_PREPEND_LEN 15
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#define HSSPI_MAX_SYNC_CLOCK 30000000
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2017-03-01 09:08:14 +00:00
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#define HSSPI_SPI_MAX_CS 8
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2013-11-30 11:42:06 +00:00
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#define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */
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spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
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#define HSSPI_POLL_STATUS_TIMEOUT_MS 100
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#define HSSPI_WAIT_MODE_POLLING 0
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#define HSSPI_WAIT_MODE_INTR 1
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#define HSSPI_WAIT_MODE_MAX HSSPI_WAIT_MODE_INTR
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2013-11-30 11:42:06 +00:00
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struct bcm63xx_hsspi {
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struct completion done;
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struct mutex bus_mutex;
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spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
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struct mutex msg_mutex;
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2013-11-30 11:42:06 +00:00
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struct platform_device *pdev;
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struct clk *clk;
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2018-08-28 11:44:11 +00:00
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struct clk *pll_clk;
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2013-11-30 11:42:06 +00:00
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void __iomem *regs;
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u8 __iomem *fifo;
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u32 speed_hz;
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u8 cs_polarity;
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spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
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u32 wait_mode;
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};
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static ssize_t wait_mode_show(struct device *dev, struct device_attribute *attr,
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char *buf)
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{
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struct spi_controller *ctrl = dev_get_drvdata(dev);
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struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl);
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return sprintf(buf, "%d\n", bs->wait_mode);
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}
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static ssize_t wait_mode_store(struct device *dev, struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct spi_controller *ctrl = dev_get_drvdata(dev);
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struct bcm63xx_hsspi *bs = spi_master_get_devdata(ctrl);
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u32 val;
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if (kstrtou32(buf, 10, &val))
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return -EINVAL;
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if (val > HSSPI_WAIT_MODE_MAX) {
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dev_warn(dev, "invalid wait mode %u\n", val);
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return -EINVAL;
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}
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mutex_lock(&bs->msg_mutex);
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bs->wait_mode = val;
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/* clear interrupt status to avoid spurious int on next transfer */
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if (val == HSSPI_WAIT_MODE_INTR)
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__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
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mutex_unlock(&bs->msg_mutex);
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return count;
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}
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static DEVICE_ATTR_RW(wait_mode);
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static struct attribute *bcm63xx_hsspi_attrs[] = {
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&dev_attr_wait_mode.attr,
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NULL,
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};
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static const struct attribute_group bcm63xx_hsspi_group = {
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.attrs = bcm63xx_hsspi_attrs,
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2013-11-30 11:42:06 +00:00
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};
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2017-06-27 16:07:10 +00:00
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static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned int cs,
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2013-11-30 11:42:06 +00:00
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bool active)
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{
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u32 reg;
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mutex_lock(&bs->bus_mutex);
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reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
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reg &= ~BIT(cs);
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if (active == !(bs->cs_polarity & BIT(cs)))
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reg |= BIT(cs);
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__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
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mutex_unlock(&bs->bus_mutex);
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}
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static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
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struct spi_device *spi, int hz)
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{
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2017-06-27 16:07:10 +00:00
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unsigned int profile = spi->chip_select;
|
2013-11-30 11:42:06 +00:00
|
|
|
u32 reg;
|
|
|
|
|
|
|
|
reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
|
|
|
|
__raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg,
|
|
|
|
bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));
|
|
|
|
|
|
|
|
reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
|
|
|
|
if (hz > HSSPI_MAX_SYNC_CLOCK)
|
|
|
|
reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH;
|
|
|
|
else
|
|
|
|
reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH;
|
|
|
|
__raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
|
|
|
|
|
|
|
|
mutex_lock(&bs->bus_mutex);
|
|
|
|
/* setup clock polarity */
|
|
|
|
reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
reg &= ~GLOBAL_CTRL_CLK_POLARITY;
|
|
|
|
if (spi->mode & SPI_CPOL)
|
|
|
|
reg |= GLOBAL_CTRL_CLK_POLARITY;
|
|
|
|
__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
mutex_unlock(&bs->bus_mutex);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t)
|
|
|
|
{
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
|
2017-06-27 16:07:10 +00:00
|
|
|
unsigned int chip_select = spi->chip_select;
|
2013-11-30 11:42:06 +00:00
|
|
|
u16 opcode = 0;
|
|
|
|
int pending = t->len;
|
|
|
|
int step_size = HSSPI_BUFFER_LEN;
|
|
|
|
const u8 *tx = t->tx_buf;
|
|
|
|
u8 *rx = t->rx_buf;
|
2023-02-09 20:02:41 +00:00
|
|
|
u32 val = 0;
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
unsigned long limit;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
|
2023-02-09 20:02:40 +00:00
|
|
|
if (!t->cs_off)
|
|
|
|
bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
if (tx && rx)
|
|
|
|
opcode = HSSPI_OP_READ_WRITE;
|
|
|
|
else if (tx)
|
|
|
|
opcode = HSSPI_OP_WRITE;
|
|
|
|
else if (rx)
|
|
|
|
opcode = HSSPI_OP_READ;
|
|
|
|
|
|
|
|
if (opcode != HSSPI_OP_READ)
|
|
|
|
step_size -= HSSPI_OPCODE_LEN;
|
|
|
|
|
2015-08-23 20:49:32 +00:00
|
|
|
if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) ||
|
2023-02-09 20:02:41 +00:00
|
|
|
(opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL)) {
|
2015-08-23 20:49:32 +00:00
|
|
|
opcode |= HSSPI_OP_MULTIBIT;
|
|
|
|
|
2023-02-09 20:02:41 +00:00
|
|
|
if (t->rx_nbits == SPI_NBITS_DUAL)
|
|
|
|
val |= 1 << MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT;
|
|
|
|
if (t->tx_nbits == SPI_NBITS_DUAL)
|
|
|
|
val |= 1 << MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT;
|
|
|
|
}
|
|
|
|
|
|
|
|
__raw_writel(val | 0xff,
|
2013-11-30 11:42:06 +00:00
|
|
|
bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
|
|
|
|
|
|
|
|
while (pending > 0) {
|
|
|
|
int curr_step = min_t(int, step_size, pending);
|
|
|
|
|
2014-02-09 03:06:04 +00:00
|
|
|
reinit_completion(&bs->done);
|
2013-11-30 11:42:06 +00:00
|
|
|
if (tx) {
|
|
|
|
memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
|
|
|
|
tx += curr_step;
|
|
|
|
}
|
|
|
|
|
2023-02-07 06:58:17 +00:00
|
|
|
__raw_writew((u16)cpu_to_be16(opcode | curr_step), bs->fifo);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
/* enable interrupt */
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
if (bs->wait_mode == HSSPI_WAIT_MODE_INTR)
|
|
|
|
__raw_writel(HSSPI_PINGx_CMD_DONE(0),
|
|
|
|
bs->regs + HSSPI_INT_MASK_REG);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
/* start the transfer */
|
|
|
|
__raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT |
|
|
|
|
chip_select << PINGPONG_CMD_PROFILE_SHIFT |
|
|
|
|
PINGPONG_COMMAND_START_NOW,
|
|
|
|
bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
|
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
if (bs->wait_mode == HSSPI_WAIT_MODE_INTR) {
|
|
|
|
if (wait_for_completion_timeout(&bs->done, HZ) == 0)
|
|
|
|
goto err_timeout;
|
|
|
|
} else {
|
|
|
|
/* polling mode checks for status busy bit */
|
|
|
|
limit = jiffies + msecs_to_jiffies(HSSPI_POLL_STATUS_TIMEOUT_MS);
|
|
|
|
while (!time_after(jiffies, limit)) {
|
|
|
|
val = __raw_readl(bs->regs + HSSPI_PINGPONG_STATUS_REG(0));
|
|
|
|
if (val & HSSPI_PINGPONG_STATUS_SRC_BUSY)
|
|
|
|
cpu_relax();
|
|
|
|
else
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (val & HSSPI_PINGPONG_STATUS_SRC_BUSY)
|
|
|
|
goto err_timeout;
|
2013-11-30 11:42:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (rx) {
|
|
|
|
memcpy_fromio(rx, bs->fifo, curr_step);
|
|
|
|
rx += curr_step;
|
|
|
|
}
|
|
|
|
|
|
|
|
pending -= curr_step;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
|
|
|
|
err_timeout:
|
|
|
|
dev_err(&bs->pdev->dev, "transfer timed out!\n");
|
|
|
|
return -ETIMEDOUT;
|
2013-11-30 11:42:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_setup(struct spi_device *spi)
|
|
|
|
{
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master);
|
|
|
|
u32 reg;
|
|
|
|
|
|
|
|
reg = __raw_readl(bs->regs +
|
|
|
|
HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
|
|
|
|
reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING);
|
|
|
|
if (spi->mode & SPI_CPHA)
|
|
|
|
reg |= SIGNAL_CTRL_LAUNCH_RISING;
|
|
|
|
else
|
|
|
|
reg |= SIGNAL_CTRL_LATCH_RISING;
|
|
|
|
__raw_writel(reg, bs->regs +
|
|
|
|
HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select));
|
|
|
|
|
|
|
|
mutex_lock(&bs->bus_mutex);
|
|
|
|
reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
|
|
|
|
/* only change actual polarities if there is no transfer */
|
|
|
|
if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
|
|
|
|
if (spi->mode & SPI_CS_HIGH)
|
|
|
|
reg |= BIT(spi->chip_select);
|
|
|
|
else
|
|
|
|
reg &= ~BIT(spi->chip_select);
|
|
|
|
__raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (spi->mode & SPI_CS_HIGH)
|
|
|
|
bs->cs_polarity |= BIT(spi->chip_select);
|
|
|
|
else
|
|
|
|
bs->cs_polarity &= ~BIT(spi->chip_select);
|
|
|
|
|
|
|
|
mutex_unlock(&bs->bus_mutex);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_transfer_one(struct spi_master *master,
|
|
|
|
struct spi_message *msg)
|
|
|
|
{
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
|
|
|
struct spi_transfer *t;
|
|
|
|
struct spi_device *spi = msg->spi;
|
|
|
|
int status = -EINVAL;
|
|
|
|
int dummy_cs;
|
2023-02-09 20:02:40 +00:00
|
|
|
bool keep_cs = false;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
mutex_lock(&bs->msg_mutex);
|
2013-11-30 11:42:06 +00:00
|
|
|
/* This controller does not support keeping CS active during idle.
|
|
|
|
* To work around this, we use the following ugly hack:
|
|
|
|
*
|
|
|
|
* a. Invert the target chip select's polarity so it will be active.
|
|
|
|
* b. Select a "dummy" chip select to use as the hardware target.
|
|
|
|
* c. Invert the dummy chip select's polarity so it will be inactive
|
|
|
|
* during the actual transfers.
|
|
|
|
* d. Tell the hardware to send to the dummy chip select. Thanks to
|
|
|
|
* the multiplexed nature of SPI the actual target will receive
|
|
|
|
* the transfer and we see its response.
|
|
|
|
*
|
|
|
|
* e. At the end restore the polarities again to their default values.
|
|
|
|
*/
|
|
|
|
|
|
|
|
dummy_cs = !spi->chip_select;
|
|
|
|
bcm63xx_hsspi_set_cs(bs, dummy_cs, true);
|
|
|
|
|
|
|
|
list_for_each_entry(t, &msg->transfers, transfer_list) {
|
|
|
|
status = bcm63xx_hsspi_do_txrx(spi, t);
|
|
|
|
if (status)
|
|
|
|
break;
|
|
|
|
|
|
|
|
msg->actual_length += t->len;
|
|
|
|
|
2019-09-26 10:51:37 +00:00
|
|
|
spi_transfer_delay_exec(t);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2023-02-09 20:02:40 +00:00
|
|
|
/* use existing cs change logic from spi_transfer_one_message */
|
|
|
|
if (t->cs_change) {
|
|
|
|
if (list_is_last(&t->transfer_list, &msg->transfers)) {
|
|
|
|
keep_cs = true;
|
|
|
|
} else {
|
|
|
|
if (!t->cs_off)
|
|
|
|
bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);
|
|
|
|
|
|
|
|
spi_transfer_cs_change_delay_exec(msg, t);
|
|
|
|
|
|
|
|
if (!list_next_entry(t, transfer_list)->cs_off)
|
|
|
|
bcm63xx_hsspi_set_cs(bs, spi->chip_select, true);
|
|
|
|
}
|
|
|
|
} else if (!list_is_last(&t->transfer_list, &msg->transfers) &&
|
|
|
|
t->cs_off != list_next_entry(t, transfer_list)->cs_off) {
|
|
|
|
bcm63xx_hsspi_set_cs(bs, spi->chip_select, t->cs_off);
|
|
|
|
}
|
2013-11-30 11:42:06 +00:00
|
|
|
}
|
|
|
|
|
2023-02-09 20:02:40 +00:00
|
|
|
bcm63xx_hsspi_set_cs(bs, dummy_cs, false);
|
|
|
|
if (status || !keep_cs)
|
|
|
|
bcm63xx_hsspi_set_cs(bs, spi->chip_select, false);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
mutex_unlock(&bs->msg_mutex);
|
2013-11-30 11:42:06 +00:00
|
|
|
msg->status = status;
|
|
|
|
spi_finalize_current_message(master);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id)
|
|
|
|
{
|
|
|
|
struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id;
|
|
|
|
|
|
|
|
if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)
|
|
|
|
return IRQ_NONE;
|
|
|
|
|
|
|
|
__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
|
|
|
|
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
|
|
|
|
|
|
|
complete(&bs->done);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct spi_master *master;
|
|
|
|
struct bcm63xx_hsspi *bs;
|
|
|
|
void __iomem *regs;
|
|
|
|
struct device *dev = &pdev->dev;
|
2018-08-28 11:44:11 +00:00
|
|
|
struct clk *clk, *pll_clk = NULL;
|
2013-11-30 11:42:06 +00:00
|
|
|
int irq, ret;
|
2017-03-01 09:08:14 +00:00
|
|
|
u32 reg, rate, num_cs = HSSPI_SPI_MAX_CS;
|
2020-06-16 17:32:35 +00:00
|
|
|
struct reset_control *reset;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
2019-07-30 18:15:41 +00:00
|
|
|
if (irq < 0)
|
2017-08-08 04:59:44 +00:00
|
|
|
return irq;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2019-09-04 13:58:49 +00:00
|
|
|
regs = devm_platform_ioremap_resource(pdev, 0);
|
2013-11-30 11:42:06 +00:00
|
|
|
if (IS_ERR(regs))
|
|
|
|
return PTR_ERR(regs);
|
|
|
|
|
2013-12-09 10:20:45 +00:00
|
|
|
clk = devm_clk_get(dev, "hsspi");
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
if (IS_ERR(clk))
|
|
|
|
return PTR_ERR(clk);
|
|
|
|
|
2020-06-16 17:32:35 +00:00
|
|
|
reset = devm_reset_control_get_optional_exclusive(dev, NULL);
|
|
|
|
if (IS_ERR(reset))
|
|
|
|
return PTR_ERR(reset);
|
|
|
|
|
2018-04-26 07:28:02 +00:00
|
|
|
ret = clk_prepare_enable(clk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
2020-06-16 17:32:35 +00:00
|
|
|
ret = reset_control_reset(reset);
|
|
|
|
if (ret) {
|
|
|
|
dev_err(dev, "unable to reset device: %d\n", ret);
|
|
|
|
goto out_disable_clk;
|
|
|
|
}
|
|
|
|
|
2013-11-30 11:42:06 +00:00
|
|
|
rate = clk_get_rate(clk);
|
2017-03-01 09:08:12 +00:00
|
|
|
if (!rate) {
|
2018-08-28 11:44:11 +00:00
|
|
|
pll_clk = devm_clk_get(dev, "pll");
|
2017-03-01 09:08:12 +00:00
|
|
|
|
2018-04-26 07:28:02 +00:00
|
|
|
if (IS_ERR(pll_clk)) {
|
|
|
|
ret = PTR_ERR(pll_clk);
|
|
|
|
goto out_disable_clk;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(pll_clk);
|
|
|
|
if (ret)
|
|
|
|
goto out_disable_clk;
|
2017-03-01 09:08:12 +00:00
|
|
|
|
|
|
|
rate = clk_get_rate(pll_clk);
|
2018-04-26 07:28:02 +00:00
|
|
|
if (!rate) {
|
|
|
|
ret = -EINVAL;
|
2018-08-28 11:44:11 +00:00
|
|
|
goto out_disable_pll_clk;
|
2018-04-26 07:28:02 +00:00
|
|
|
}
|
2017-03-01 09:08:12 +00:00
|
|
|
}
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
master = spi_alloc_master(&pdev->dev, sizeof(*bs));
|
|
|
|
if (!master) {
|
|
|
|
ret = -ENOMEM;
|
2018-08-28 11:44:11 +00:00
|
|
|
goto out_disable_pll_clk;
|
2013-11-30 11:42:06 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bs = spi_master_get_devdata(master);
|
|
|
|
bs->pdev = pdev;
|
|
|
|
bs->clk = clk;
|
2018-08-28 11:44:11 +00:00
|
|
|
bs->pll_clk = pll_clk;
|
2013-11-30 11:42:06 +00:00
|
|
|
bs->regs = regs;
|
|
|
|
bs->speed_hz = rate;
|
|
|
|
bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
bs->wait_mode = HSSPI_WAIT_MODE_POLLING;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
mutex_init(&bs->bus_mutex);
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
mutex_init(&bs->msg_mutex);
|
2014-02-09 03:06:04 +00:00
|
|
|
init_completion(&bs->done);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2017-03-01 09:08:14 +00:00
|
|
|
master->dev.of_node = dev->of_node;
|
|
|
|
if (!dev->of_node)
|
|
|
|
master->bus_num = HSSPI_BUS_NUM;
|
|
|
|
|
|
|
|
of_property_read_u32(dev->of_node, "num-cs", &num_cs);
|
|
|
|
if (num_cs > 8) {
|
|
|
|
dev_warn(dev, "unsupported number of cs (%i), reducing to 8\n",
|
|
|
|
num_cs);
|
|
|
|
num_cs = HSSPI_SPI_MAX_CS;
|
|
|
|
}
|
|
|
|
master->num_chipselect = num_cs;
|
2013-11-30 11:42:06 +00:00
|
|
|
master->setup = bcm63xx_hsspi_setup;
|
|
|
|
master->transfer_one_message = bcm63xx_hsspi_transfer_one;
|
2015-08-23 20:49:32 +00:00
|
|
|
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH |
|
|
|
|
SPI_RX_DUAL | SPI_TX_DUAL;
|
2013-11-30 11:42:06 +00:00
|
|
|
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
|
|
|
master->auto_runtime_pm = true;
|
|
|
|
|
|
|
|
platform_set_drvdata(pdev, master);
|
|
|
|
|
|
|
|
/* Initialize the hardware */
|
|
|
|
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
|
|
|
|
|
|
|
/* clean up any pending interrupts */
|
|
|
|
__raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
|
|
|
|
|
|
|
|
/* read out default CS polarities */
|
|
|
|
reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
|
|
|
|
__raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF,
|
|
|
|
bs->regs + HSSPI_GLOBAL_CTRL_REG);
|
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
if (irq > 0) {
|
|
|
|
ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED,
|
|
|
|
pdev->name, bs);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
if (ret)
|
|
|
|
goto out_put_master;
|
|
|
|
}
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2021-02-23 15:18:51 +00:00
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
if (sysfs_create_group(&pdev->dev.kobj, &bcm63xx_hsspi_group)) {
|
|
|
|
dev_err(&pdev->dev, "couldn't register sysfs group\n");
|
|
|
|
goto out_pm_disable;
|
|
|
|
}
|
|
|
|
|
2013-11-30 11:42:06 +00:00
|
|
|
/* register and we are done */
|
2013-12-17 20:44:47 +00:00
|
|
|
ret = devm_spi_register_master(dev, master);
|
2013-11-30 11:42:06 +00:00
|
|
|
if (ret)
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
goto out_sysgroup_disable;
|
|
|
|
|
|
|
|
dev_info(dev, "Broadcom 63XX High Speed SPI Controller driver");
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
out_sysgroup_disable:
|
|
|
|
sysfs_remove_group(&pdev->dev.kobj, &bcm63xx_hsspi_group);
|
2021-02-23 15:18:51 +00:00
|
|
|
out_pm_disable:
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
2013-11-30 11:42:06 +00:00
|
|
|
out_put_master:
|
|
|
|
spi_master_put(master);
|
2018-08-28 11:44:11 +00:00
|
|
|
out_disable_pll_clk:
|
|
|
|
clk_disable_unprepare(pll_clk);
|
2013-11-30 11:42:06 +00:00
|
|
|
out_disable_clk:
|
|
|
|
clk_disable_unprepare(clk);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_remove(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct spi_master *master = platform_get_drvdata(pdev);
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
|
|
|
|
|
|
|
/* reset the hardware and block queue progress */
|
|
|
|
__raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
|
2018-08-28 11:44:11 +00:00
|
|
|
clk_disable_unprepare(bs->pll_clk);
|
2013-11-30 11:42:06 +00:00
|
|
|
clk_disable_unprepare(bs->clk);
|
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size 134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-02-07 06:58:18 +00:00
|
|
|
sysfs_remove_group(&pdev->dev.kobj, &bcm63xx_hsspi_group);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-12-17 20:44:48 +00:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2013-11-30 11:42:06 +00:00
|
|
|
static int bcm63xx_hsspi_suspend(struct device *dev)
|
|
|
|
{
|
|
|
|
struct spi_master *master = dev_get_drvdata(dev);
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
|
|
|
|
|
|
|
spi_master_suspend(master);
|
2018-08-28 11:44:11 +00:00
|
|
|
clk_disable_unprepare(bs->pll_clk);
|
2013-12-17 20:44:48 +00:00
|
|
|
clk_disable_unprepare(bs->clk);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int bcm63xx_hsspi_resume(struct device *dev)
|
|
|
|
{
|
|
|
|
struct spi_master *master = dev_get_drvdata(dev);
|
|
|
|
struct bcm63xx_hsspi *bs = spi_master_get_devdata(master);
|
2013-12-17 20:44:48 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = clk_prepare_enable(bs->clk);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2018-08-28 11:44:11 +00:00
|
|
|
if (bs->pll_clk) {
|
|
|
|
ret = clk_prepare_enable(bs->pll_clk);
|
2020-11-03 07:49:11 +00:00
|
|
|
if (ret) {
|
|
|
|
clk_disable_unprepare(bs->clk);
|
2018-08-28 11:44:11 +00:00
|
|
|
return ret;
|
2020-11-03 07:49:11 +00:00
|
|
|
}
|
2018-08-28 11:44:11 +00:00
|
|
|
}
|
|
|
|
|
2013-11-30 11:42:06 +00:00
|
|
|
spi_master_resume(master);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2013-12-17 20:44:48 +00:00
|
|
|
#endif
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2014-02-26 01:28:24 +00:00
|
|
|
static SIMPLE_DEV_PM_OPS(bcm63xx_hsspi_pm_ops, bcm63xx_hsspi_suspend,
|
|
|
|
bcm63xx_hsspi_resume);
|
2013-11-30 11:42:06 +00:00
|
|
|
|
2017-03-01 09:08:14 +00:00
|
|
|
static const struct of_device_id bcm63xx_hsspi_of_match[] = {
|
|
|
|
{ .compatible = "brcm,bcm6328-hsspi", },
|
2023-02-07 06:58:16 +00:00
|
|
|
{ .compatible = "brcm,bcmbca-hsspi-v1.0", },
|
2017-03-01 09:08:14 +00:00
|
|
|
{ },
|
|
|
|
};
|
2017-05-01 20:13:38 +00:00
|
|
|
MODULE_DEVICE_TABLE(of, bcm63xx_hsspi_of_match);
|
2017-03-01 09:08:14 +00:00
|
|
|
|
2013-11-30 11:42:06 +00:00
|
|
|
static struct platform_driver bcm63xx_hsspi_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "bcm63xx-hsspi",
|
2013-12-17 20:44:48 +00:00
|
|
|
.pm = &bcm63xx_hsspi_pm_ops,
|
2017-03-01 09:08:14 +00:00
|
|
|
.of_match_table = bcm63xx_hsspi_of_match,
|
2013-11-30 11:42:06 +00:00
|
|
|
},
|
|
|
|
.probe = bcm63xx_hsspi_probe,
|
|
|
|
.remove = bcm63xx_hsspi_remove,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(bcm63xx_hsspi_driver);
|
|
|
|
|
|
|
|
MODULE_ALIAS("platform:bcm63xx_hsspi");
|
|
|
|
MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver");
|
|
|
|
MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
|
|
|
|
MODULE_LICENSE("GPL");
|